Patents by Inventor Claudio Adragna

Claudio Adragna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11825571
    Abstract: A control circuit includes an output terminal configured to be coupled to a control terminal of a transistor that has a current path coupled to an inductor; a transconductance amplifier configured to produce a sense current based on a current flowing through the current path of the transistor; and a first capacitor. The control circuit is configured to turn on the transistor based on a clock signal, integrate the sense current with an integrating capacitor to generate a first voltage, generate a second voltage across the first capacitor based on a first current, generate a second current based on the second voltage, generate a third voltage based on the second current, turn off the transistor when the first voltage becomes higher than the third voltage; discharge the integrating capacitor when the transistor turns off; and regulate an average output current flowing through the inductor based on the first current.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: November 21, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giovanni Gritti, Claudio Adragna
  • Patent number: 11699956
    Abstract: In an embodiment, a method for operating an ACF converter includes: turning on a low-side transistor that is coupled between a primary winding of a transformer and a reference terminal to cause a forward current to enter the primary winding, turning off the low-side transistor; after turning off the low-side transistor, turning on a high-side transistor that is coupled between the primary winding and a clamp capacitor to cause a reverse current to flow through the primary winding; and after turning on the high-side transistor, when an overcurrent of the reverse current is not detected, keeping the high-side transistor on for a first period of time, and turning off the high-side transistor after the first period of time, and when the overcurrent of the reverse current is detected, turning off the high-side transistor without keeping the high-side transistor on for the first period of time.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: July 11, 2023
    Assignee: STMicroelectronios S.r.l.
    Inventors: Claudio Adragna, Francesco Ferrazza
  • Publication number: 20230156881
    Abstract: A control circuit includes an output terminal configured to be coupled to a control terminal of a transistor that has a current path coupled to an inductor; a transconductance amplifier configured to produce a sense current based on a current flowing through the current path of the transistor; and a first capacitor. The control circuit is configured to turn on the transistor based on a clock signal, integrate the sense current with an integrating capacitor to generate a first voltage, generate a second voltage across the first capacitor based on a first current, generate a second current based on the second voltage, generate a third voltage based on the second current, turn off the transistor when the first voltage becomes higher than the third voltage; discharge the integrating capacitor when the transistor turns off; and regulate an average output current flowing through the inductor based on the first current.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 18, 2023
    Inventors: Giovanni Gritti, Claudio Adragna
  • Publication number: 20230143391
    Abstract: In an embodiment, a method for controlling a synchronous rectifier (SR) transistor of a flyback converter includes: determining a first voltage across conduction terminals of the SR transistor; asserting a turn-on signal when a body diode of the SR transistor is conducting current; asserting a turn-off signal when current flowing through the conduction terminals of the SR transistor decreases below a first threshold; generating a gating signal based on an output voltage of the flyback converter and on the first voltage; turning on the SR transistor based on the turn-on signal and on the gating signal; and turning off the SR transistor based on the turn-off signal.
    Type: Application
    Filed: November 10, 2021
    Publication date: May 11, 2023
    Inventor: Claudio Adragna
  • Publication number: 20230141001
    Abstract: In an embodiment, a method for operating an ACF converter includes: turning on a low-side transistor that is coupled between a primary winding of a transformer and a reference terminal to cause a forward current to enter the primary winding, turning off the low-side transistor; after turning off the low-side transistor, turning on a high-side transistor that is coupled between the primary winding and a clamp capacitor to cause a reverse current to flow through the primary winding; and after turning on the high-side transistor, when an overcurrent of the reverse current is not detected, keeping the high-side transistor on for a first period of time, and turning off the high-side transistor after the first period of time, and when the overcurrent of the reverse current is detected, turning off the high-side transistor without keeping the high-side transistor on for the first period of time.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 11, 2023
    Inventors: Claudio Adragna, Francesco Ferrazza
  • Publication number: 20230123235
    Abstract: An LED lighting system includes switching circuity adjustably driving a string of LEDs and being controlled by a reference current and an enable signal. A controller generates the reference current and enable signal based upon a PWM signal such that the switching circuitry: sources a first LED current to the string of LEDs that is proportional to a duty cycle of the PWM signal when the duty cycle is greater than a threshold duty cycle to thereby perform analog dimming; and sources a second LED current to the string of LEDs that has a duty cycle proportional to the duty cycle of the PWM signal when the duty cycle of the PWM signal is less than the threshold duty cycle, such that an average LED current delivered to the string of LEDs is proportional to the duty cycle of the PWM signal to thereby perform digital dimming.
    Type: Application
    Filed: September 30, 2021
    Publication date: April 20, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giovanni GRITTI, Claudio ADRAGNA
  • Patent number: 11622429
    Abstract: In an embodiment, a control circuit includes: an output terminal configured to be coupled to a control terminal of a transistor that is coupled to an inductor; a logic circuit configured to control the transistor using a first signal; a zero crossing detection circuit configured to generate a freewheeling signal indicative of a demagnetization of the inductor; a comparator having first and second inputs configured to receive a sense voltage indicative of a current flowing through the transistor and a reference voltage, respectively, and an output configured to cause the logic circuit to deassert the first signal; and a reference generator configured to generate the reference voltage and including: a current generator, a capacitor and a resistor coupled to the output of the reference generator, and a switch coupled in series with the resistor and configured to be controlled based on the first signal and the freewheeling signal.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: April 4, 2023
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Claudio Adragna, Giovanni Gritti
  • Publication number: 20230098059
    Abstract: In an embodiment, a control circuit includes: an output terminal configured to be coupled to a control terminal of a transistor that is coupled to an inductor; a logic circuit configured to control the transistor using a first signal; a zero crossing detection circuit configured to generate a freewheeling signal indicative of a demagnetization of the inductor; a comparator having first and second inputs configured to receive a sense voltage indicative of a current flowing through the transistor and a reference voltage, respectively, and an output configured to cause the logic circuit to dessert the first signal; and a reference generator configured to generate the reference voltage and including: a current generator, a capacitor and a resistor coupled to the output of the reference generator, and a switch coupled in series with the resistor and configured to be controlled based on the first signal and the freewheeling signal.
    Type: Application
    Filed: September 28, 2021
    Publication date: March 30, 2023
    Inventors: Claudio Adragna, Giovanni Gritti
  • Publication number: 20230101140
    Abstract: A control circuit includes: a flip-flop having an output configured to be coupled to a control terminal of a transistor and for producing a first signal; a comparator having an output coupled to an input of the flip-flop, and first and second inputs for receiving first and second voltages, respectively; a transconductance amplifier having an input for receiving a sense voltage indicative of a current flowing through the transistor, and an output coupled to the first input of the comparator; a zero crossing detection (ZCD) circuit having an input configured to be coupled to a first current path terminal of the transistor and to an inductor, where the ZCD circuit is configured to detect a demagnetization time of the inductor and produce a third signal based on the detected demagnetization time; and a reference generator configured to generate the second voltage based on the first and third signals.
    Type: Application
    Filed: August 15, 2022
    Publication date: March 30, 2023
    Inventors: Claudio Adragna, Giovanni Gritti
  • Publication number: 20230096383
    Abstract: An active flyback converter is transitioned between a plurality of operational states based on a comparison of a control voltage signal to voltage thresholds and a count of a number of consecutive switching cycles during which a clamp switch is kept off. The plurality of operational states includes a run state, an idle state, a first burst state, and a second burst state. Each set of consecutive switching cycles of the first burst state includes a determined number of switching cycles during which signals are generated to turn the power switch on and off and to maintain an off state of the clamp switch, and a switching cycle in a determined position in the set of switching cycles during which signals are sequentially generated to turn the power switch on, turn the power switch off, turn the clamp switch on and turn the clamp switch off.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 30, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Claudio ADRAGNA, Massimiliano GOBBI, Giuseppe BOSISIO
  • Patent number: 11582843
    Abstract: A control circuit includes: an output terminal configured to be coupled to a control terminal of a transistor that has a current path coupled to an inductor; a transconductance amplifier configured to produce a sense current based on a current flowing through the current path of the transistor; and a first capacitor, where the control circuit is configured to: turn on the transistor based on a clock signal, integrate the sense current with an integrating capacitor to generate a first voltage, generate a second voltage across the first capacitor based on a first current, generate a second current based on the second voltage, generate a third voltage based on the second current, turn off the transistor when the first voltage becomes higher than the third voltage; discharge the integrating capacitor when the transistor turns off; and regulate an average output current flowing through the inductor based on the first current.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: February 14, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giovanni Gritti, Claudio Adragna
  • Patent number: 11552573
    Abstract: In an embodiment, a method for operating an ACF converter includes: turning on a low-side transistor that is coupled between a primary winding of a transformer and a reference terminal to cause a forward current to enter the primary winding, turning off the low-side transistor; after turning off the low-side transistor, turning on a high-side transistor that is coupled between the primary winding and a clamp capacitor to cause a reverse current to flow through the primary winding; and after turning on the high-side transistor, when an overcurrent of the reverse current is not detected, keeping the high-side transistor on for a first period of time, and turning off the high-side transistor after the first period of time, and when the overcurrent of the reverse current is detected, turning off the high-side transistor without keeping the high-side transistor on for the first period of time.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: January 10, 2023
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Claudio Adragna, Francesco Ferrazza
  • Patent number: 11452184
    Abstract: A control circuit includes: a flip-flop having an output configured to be coupled to a control terminal of a transistor and for producing a first signal; a comparator having an output coupled to an input of the flip-flop, and first and second inputs for receiving first and second voltages, respectively; a transconductance amplifier having an input for receiving a sense voltage indicative of a current flowing through the transistor, and an output coupled to the first input of the comparator; a zero crossing detection (ZCD) circuit having an input configured to be coupled to a first current path terminal of the transistor and to an inductor, where the ZCD circuit is configured to detect a demagnetization time of the inductor and produce a third signal based on the detected demagnetization time; and a reference generator configured to generate the second voltage based on the first and third signals.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: September 20, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventors: Claudio Adragna, Giovanni Gritti
  • Patent number: 11387739
    Abstract: A driver circuit for a resonant converter includes a comparator that generates a first control signal indicating when a resonant current changes sign. A first ramp generator circuit outputs a first ramp signal, and a comparison circuit determines whether the first ramp signal reaches a reference threshold. The driver circuit drives a half-bridge via drive signals during consecutive first second switching semi-periods, each of which ends when the comparison circuit indicates the first ramp signal has reached a reference threshold. A control circuit generates in each of the first and the second switching semi-periods control signals indicating a first interval and a second interval. A correction circuit modifies the first ramp signal to have a first gradient value during the first interval and a second gradient value during the second interval. Alternatively, the correction circuit modifies a reference threshold by adding a second ramp signal to an initial threshold value.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 12, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventor: Claudio Adragna
  • Patent number: 11329568
    Abstract: A PWM controlled multi-phase resonant voltage converter may include a plurality of primary windings powered through respective half-bridges, and as many secondary windings connected to an output terminal of the converter and magnetically coupled to the respective primary windings. The primary or secondary windings may be connected such that a real or virtual neutral point is floating.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: May 10, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventors: Claudio Adragna, Giuseppe Gattavari, Paolo Mattavelli, Enrico Orietti, Giorgio Spiazzi
  • Patent number: 11258354
    Abstract: An embodiment PFC control circuit includes a first terminal providing a drive signal to an electronic switch of a boost converter, a second terminal receiving a feedback signal indicative of an output voltage generated by the boost converter, and a third terminal connected to a compensation network. An error amplifier generates a current as a function of the voltage at the second terminal and a reference voltage, wherein an output of the error amplifier is coupled to the third terminal. A driver circuit generates the drive signal as a function of the voltage at the third terminal, and selectively activates or deactivates the generation of the drive signal as a function of a burst mode enable signal. A detection circuit generates the burst mode enable signal as a function of the voltage at the second terminal.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: February 22, 2022
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alfio Pasqua, Salvatore Tumminaro, Marco Sammartano, Claudio Adragna
  • Publication number: 20210226527
    Abstract: An embodiment PFC control circuit comprises a first terminal providing a drive signal to an electronic switch of a boost converter, a second terminal receiving a feedback signal indicative of an output voltage generated by the boost converter, and a third terminal connected to a compensation network. An error amplifier generates a current as a function of the voltage at the second terminal and a reference voltage, wherein an output of the error amplifier is coupled to the third terminal. A driver circuit generates the drive signal as a function of the voltage at the third terminal, and selectively activates or deactivates the generation of the drive signal as a function of a burst mode enable signal. A detection circuit generates the burst mode enable signal as a function of the voltage at the second terminal.
    Type: Application
    Filed: January 18, 2021
    Publication date: July 22, 2021
    Inventors: Alfio Pasqua, Salvatore Tumminaro, Marco Sammartano, Claudio Adragna
  • Publication number: 20210067046
    Abstract: A driver circuit for a resonant converter includes a comparator that generates a first control signal indicating when a resonant current changes sign. A first ramp generator circuit outputs a first ramp signal, and a comparison circuit determines whether the first ramp signal reaches a reference threshold. The driver circuit drives a half-bridge via drive signals during consecutive first second switching semi-periods, each of which ends when the comparison circuit indicates the first ramp signal has reached a reference threshold. A control circuit generates in each of the first and the second switching semi-periods control signals indicating a first interval and a second interval. A correction circuit modifies the first ramp signal to have a first gradient value during the first interval and a second gradient value during the second interval. Alternatively, the correction circuit modifies a reference threshold by adding a second ramp signal to an initial threshold value.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 4, 2021
    Inventor: Claudio ADRAGNA
  • Publication number: 20200350826
    Abstract: A PWM controlled multi-phase resonant voltage converter may include a plurality of primary windings powered through respective half-bridges, and as many secondary windings connected to an output terminal of the converter and magnetically coupled to the respective primary windings. The primary or secondary windings may be connected such that a real or virtual neutral point is floating.
    Type: Application
    Filed: July 20, 2020
    Publication date: November 5, 2020
    Inventors: Claudio Adragna, Giuseppe Gattavari, Paolo Mattavelli, Enrico Orietti, Giorgio Spiazzi
  • Patent number: 10756637
    Abstract: A PWM controlled multi-phase resonant voltage converter may include a plurality of primary windings powered through respective half-bridges, and as many secondary windings connected to an output terminal of the converter and magnetically coupled to the respective primary windings. The primary or secondary windings may be connected such that a real or virtual neutral point is floating.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: August 25, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Claudio Adragna, Giuseppe Gattavari, Paolo Mattavelli, Enrico Orietti, Giorgio Spiazzi