Abstract: Embodiments of the present invention provide wireless control devices that operate in-field wirelessly without removable batteries, have power self-harvesting components, and can be wirelessly programmed over long ranges without interfering with the normal operation of the control devices. Only control devices that have sufficient power available to perform a reprogram cycle (and can function normally until a next power harvest cycle) are selected. Control devices can be selected for wireless reprogramming based on the upcoming functions to be performed by the control device, the amount of energy stored in the control device, the rate of power generation of a solar panel of the control device, and current and upcoming weather conditions, etc. The wireless programming can include updating a firmware of the control device, a bootloader of the control device, and an application program image.

Abstract: Systems and methods facilitate efficient and effective monitoring and control of various activities using a remote self-contained in-field installed device capable of self-harvesting power. A power self harvesting control device comprises: a power sub-system configured to self-harvest energy required of its internal components; a communication sub-system configured to communicate with other external devices; an exterior function interface sub-system configured to generate and receive input/output signals associated with the external component interactions; and a management sub-system configured to manage and coordinate activities of the power control sub-system, the communication sub-system, and external function control sub-system. The management sub-system directs management and coordination of the self-harvested energy supply and consumption. The power sub-subsystem includes a non-removable self contained energy storage component that stores self-harvested energy.

Abstract: An agricultural sensing system includes multiple sensor and/or actuator modules configured to communicate with a relay unit. The sensor and/or actuator modules are powered using solar energy and contain no batteries. The modules feature sleep modes in which some circuits are placed in a low energy mode to conserve energy and remove the need for batteries. Communications to or from the relay unit are optionally timed to avoid interference between transmissions from different sensor and/or actuator modules. The relay units are configured to relay sensor data and send commands to the sensor and/or actuator modules.

Abstract: An agricultural sensing system includes multiple sensor and/or actuator modules configured to communicate with a relay unit. The sensor and/or actuator modules are powered using solar energy and contain no batteries. The modules feature sleep modes in which some circuits are placed in a low energy mode to conserve energy and remove the need for batteries. Communications to or from the relay unit are optionally timed to avoid interference between transmissions from different sensor and/or actuator modules. The relay units are configured to relay sensor data and send commands to the sensor and/or actuator modules.

Abstract: A programmable system includes an input/output (I/O) pin that is configurable into multiple operational states. The programmable system further includes a memory device to store configuration data that, when provided to the I/O pin, causes the I/O pin to reconfigure into one of the operational states. When power is supplied to the system, the memory device is configured to provide the configuration data to the I/O pin prior to a system microcontroller becoming operational responsive to the power.

Abstract: A method for emulating and debugging a microcontroller is described. In one embodiment, an event thread is executed on an emulator that operates in lock-step with the microcontroller. Event information is sampled at selected points. Trace information is also recorded at the selected points. As such, the event information and trace information are effectively pre-filtered. Accordingly, it is not incumbent on a designer to read and understand the event and trace information and sort out the information that is of interest. Instead, this task is essentially done automatically, helping the designer and reducing the probability of error. Furthermore, because only selected event and trace information is recorded, the resources of the in-circuit emulator system are not taxed.

Abstract: A synchronized boot process for an In-Circuit Emulator system. A real microcontroller is operated in lock-step synchronization with a virtual microcontroller to permit In-Circuit Emulation that allows debugging of the real microcontroller without interfering with its real time operation. The synchronized boot is accomplished by running boot code in the real microcontroller while the virtual microcontroller runs dummy code with the same timing as the boot code. Registers and memory contents are then copied from the real microcontroller to the virtual microcontroller to complete initialization and enter a state of readiness for lock-step operation.

Abstract: A system and a method for checking consistency of a lock-step process while debugging a microcontroller code. The virtual microcontroller and the microcontroller simultaneously and independently run a microcontroller code. The microcontroller includes a first memory and the virtual microcontroller residing in the ICE includes a second memory. A host computer copies a content of the first memory and a content of the second memory in the host computer memory when the execution of the code is halted. The host device compares the content of the first memory and the content of the second memory for consistency. In case of a disparity between the content of the first memory and the content of the second memory, a user traces the execution of the code in a trace buffer residing in the ICE and debugs the faulty code accordingly.

Abstract: A breakpoint control mechanism for an In-Circuit Emulation system. Break bits are assigned to each instruction address and stored in a lookup table within a base station containing a virtual microcontroller. As a program counter increments, a determination is made as to whether or not a break is to occur by reading the break bit from the lookup table. When a break is to occur, a breakpoint controller issues a break command over an interface to an actual microcontroller under test, thus freeing the microcontroller under test from having to include a look-up table on board for a breakpoint control or otherwise provide specifically for breakpoint control.

Abstract: A device for monitoring events. The device may have a programmable event engine for detecting events and a memory array coupled to the event engine. The array may store data for programming the event engine to monitor for the events. The device may have an external pin coupled to the event engine. The event engine may monitor a signal on the external pin to detect events external to the device. Alternatively, the device may output a signal on an external pin in response to detecting one of the events.

Abstract: A method and apparatus for performing sleep and stall operations in a system that includes a device under test and that includes an emulator device that operates to perform a sequence of instructions in lock-step fashion with the device under test. When a first signal is received at the device under test, the device under test initiates the sleep function and turns off its clocks. When the clocks are turned off, the emulator device discontinues execution of the sequence of instructions. When the sleep function has been completed by the device under test a second signal is sent to the emulator device. Execution of the sequence of instructions is resumed when the number of clock signals received at the emulator device since the second signal was received equals a predetermined value.

Abstract: An In-Circuit Emulation system. A real microcontroller (device under test) operates in lock-step with a virtual microcontroller so that registers, memory locations and other debugged data can be retrieved from the virtual microcontroller without disrupting operation of a real microcontroller. When an I/O read instruction is carried out followed by a conditional jump instruction dependent upon the I/O read data, the virtual microcontroller does not have adequate time to compute the jump address after receipt of I/O read data from the real microcontroller. Thus, when this sequence of instructions is detected, the virtual microcontroller pre-calculates the jump address and makes the jump decision after receipt of the I/O read data from the real microcontroller.

Abstract: A system and a method for checking consistency of a lock-step process while debugging a microcontroller code. A host device copies a partially copies a production microcontroller in an ICE (in-circuit emulation) to form a virtual microcontroller. The virtual microcontroller and the microcontroller simultaneously and independently run a microcontroller code for debugging purposes. The microcontroller residing on a test circuit includes a first memory and the virtual microcontroller residing in the ICE includes a second memory. A host computer copies a content of the first memory and a content of the second memory in the host computer memory when the execution of the code is halted. Software in the host device compares the content of the first memory and the content of the second memory for consistency.

Abstract: A system and a method for checking consistency of a lock-step process while debugging a microcontroller code. The virtual microcontroller and the microcontroller simultaneously and independently run a microcontroller code. The microcontroller includes a first memory and the virtual microcontroller residing in the ICE includes a second memory. A host computer copies a content of the first memory and a content of the second memory in the host computer memory when the execution of the code is halted. The host device compares the content of the first memory and the content of the second memory for consistency. In case of a disparity between the content of the first memory and the content of the second memory, a user traces the execution of the code in a trace buffer residing in the ICE and debugs the faulty code accordingly.

Abstract: A method for emulating and debugging a microcontroller. In one embodiment, an event thread is executed on an emulator that operates in lock-step with the microcontroller. Event information is sampled at selected points. Trace information is also recorded at the selected points. As such, the event information and trace information are effectively pre-filtered. Accordingly, it is not incumbent on a designer to read and understand the event and trace information and sort out the information that is of interest. Instead, this task is essentially done automatically, helping the designer and reducing the probability of error. Furthermore, because only selected event and trace information is recorded, the resources of the in-circuit emulator system are not taxed.

Abstract: A method for emulating and debugging a microcontroller. In one embodiment, an event thread is executed on an emulator that operates in lock-step with the microcontroller. Event information is sampled at selected points. Trace information is also recorded at the selected points. As such, the event information and trace information are effectively pre-filtered. Accordingly, it is not incumbent on a designer to read and understand the event and trace information and sort out the information that is of interest. Instead, this task is essentially done automatically, helping the designer and reducing the probability of error. Furthermore, because only selected event and trace information is recorded, the resources of the in-circuit emulator system are not taxed.

Abstract: A first touch is sensed at a first button on a capacitive touch sensor. A second button on the capacitive touch sensor is activated using one of a search-and-tap technique or a search-and-lift technique.

Abstract: A halt control gatekeeper for an In-Circuit Emulation system. Halt commands are implemented through a gatekeeper forming a portion of a virtual microcontroller that operates in lock-step synchronization with a real microcontroller under test. When a halt command is received, the gatekeeper determines if the microcontroller is in a sleep mode and, if so, appropriately notifies a host computer and queues up a halt command. If the microcontroller is not in a sleep mode, the gatekeeper simply queues a halt command and notifies the host computer when the microcontroller has halted and it is safe to perform debug operations on the virtual microcontroller.

Abstract: An event architecture. The event architecture may have a number of event engines for monitoring conditions and also chain logic coupled to the event engines. The event architecture may further have a memory array for storing data to configure the chain logic to configure an execution scheme of the event engines. The chain logic may be re-configured by additional data from the memory to re-configure the execution scheme of the event engines.

Abstract: A multi-purpose interface between a host computer and an FPGA. This interface uses an IEEE 1284 compliant EPP mode connection. When the host computer is initialized, a reset of the FPGA is carried out to clear the configuration memory of the FPGA. The data lines of the interface are then used to communicate unidirectional configuration data into the FPGA. The data are clocked by the host computer using the data strobe signal line to clock data into the FPGA. When the FPGA has been fully programmed, including programming an IEEE 1284 compliant EPP mode interface into the FPGA, the data lines are used for bidirectional communication between the host computer and the configured FPGA, in this embodiment operating as a virtual microcontroller.