Abstract: Embodiments of the present invention effectuate a method and system for debugging a device such as a microcontroller in a distributed architectural scheme, where the device may operate at speeds much faster than the debugger program is run, with limited debugging resources physically incorporated into the device itself, and with relatively limited computational capacity, vis-à-vis the platform deploying the debugging software. The embodiments place relatively modest, uncomplicated demands on the debugger software, and the ICE may also be relatively simple. Further, debugging methods and systems according to these embodiments are flexible and adaptable to a variety of different devices that must undergo debugging, yet remain effective, simple, and inexpensive.

Abstract: A watchdog timer control using a gatekeeper in an In-Circuit Emulation system. The In-Circuit Emulation system has a microcontroller operating in lock-step synchronization with a virtual microcontroller. When a watchdog event occurs, the gatekeeper, forming a part of the virtual microcontroller, crowbars the reset line of the virtual microcontroller as well as the real microcontroller. This freezes the state of the virtual microcontroller so that debug operations can be carried out. The gatekeeper operates with its own gatekeeper clock independent of the microcontroller clock. When a watchdog event occurs, the gatekeeper clock is rerouted to the virtual microcontroller to facilitate debug operations of the virtual microcontroller.

Abstract: Programming a plurality of states having respective threads is achieved by an event engine and a computer controlled GUI causing the event engine to monitor a signal and execute an action based thereon. The GUI programs an event and several states and causes the event engine to traverse between the states upon reaching the event. The GUI further programs a logic chain which unifies the threads. A method unifies several threads by selecting and executing a logic operation. The method further configures several states and causes traversing between them. The GUI may be deployed co-functionally with debuggers, logic analyzers, scopes, utilities, and software development tools. The results of the GUI are automatically transformed into program code which programs the event engine to operate during debug of a device under test by monitoring for events and taking action based thereon.

Abstract: An emulation and debugging system that includes an in-circuit emulator couplable to a microcontroller. The in-circuit emulator is adapted to execute an event thread in lock-step with the microcontroller. Event information generated as a result of executing the event thread is sampled at selected points and the sampled event information is stored in memory. Trace information is also recorded at the selected points. The sampled event information and the recorded trace information are time-stamped. In one embodiment, a display device is coupled to the in-circuit emulator. The display device is used for displaying analog and/or digital waveforms representing the sampled event information and the recorded trace information. Accordingly, an in-circuit emulator system can also function as an oscilloscope and/or as a logic analyzer, allowing a user to view event and trace information, along with other information, that are generated as part of the debugging process.

Abstract: Communications between a device and a debugging system are effectuated by programming an ICE with a first logic set, which enables the ICE to establish communications with the device and determine a unique identifier thereof. The ICE communicates the device's unique identifier back to a host computer. The host computer matches the unique identifier to a second logic set and a plug-in module. The host computer then programs the ICE with the second logic set and activates the plug-in module. The second logic set allow the ICE and the device to execute program instructions downloaded with the second logic set in lock-step fashion. The plug-in module allows the host computer to interact in the debugging process as necessary. This achieves flexibility, because any ICE may be programmed to communicate with any device.

Abstract: A combined in-circuit emulation system and device programmer. A pod assembly used in an in-circuit emulation system has both a real microcontroller used in the In-Circuit Emulation and debugging process as well as a socket that accommodates a microcontroller to be programmed (a program microcontroller). Programming can be carried out over a single interface that is shared between the microcontroller and the program microcontroller and which is also used to provide communication between the real microcontroller and the In-Circuit Emulation system to carry out emulation functions. In order to assure that the emulation microcontroller does not interfere with the programming process for a microcontroller placed in a programming socket, a special sleep mode is implemented in the emulation microcontroller. This sleep mode is activated by a process that takes place at power on in which the a reset line is released with a specified data line held in a logic high state.

Abstract: A communication interface for an in-circuit emulation system. The interface uses four pins between a virtual microcontroller (an FPGA emulating a microcontroller) and a real microcontroller under test. The bus is fast enough to allow the two devices to operate in synchronization. I/O reads, interrupt vector information and watchdog information is provided over the bus in a time fast enough to allow execution in lock step. Two data lines are provided, one is bi-directional and one is driven only by the microcontroller. A system clock is provided and the microcontroller supplies its clock signal to the FPGA since the microcontroller can operate at varying clock speeds. The bus is time-dependent so more information can be placed on this reduced-pin count bus. Therefore, instructions and data are distinguished based on the time the information is sent within the sequence. The bus can be used to carry trace information, program the flash memory on the microcontroller, perform test control functions, etc.

Abstract: A power management system and circuit comprising instructions stored in computer memory for the prevention of simultaneous coupling of more than one power source to a device under test (DUT). Instructions stored in memory prevent the simultaneous application of power to the DUT from both the in circuit emulator power grid and an external power source. External power applied to the DUT results in at least one activity signal detected by the computer. If no activity signal appears, a fault condition in the DUT is interpreted. If an activity signal is detected, testing continues under control of Debug Software.

Abstract: A re-configurable combinational logic device. The device comprises combinational logic that inputs a number of signals and a memory array for storing data to define Boolean expressions for a number of states. The states have Boolean expressions of selected signals of the signals input to the combinational logic. The combinational logic is configurable, in response to the data, to select the signals as operands for said Boolean expression and to output a signal that is the result of the Boolean expression. The combinational logic is re-configurable, in response to further data from the memory array, to output a signal that is the result of additional Boolean expressions.

Abstract: A system where a production microcontroller is partially copied in a FPGA of an ICE to form a virtual microcontroller. The virtual microcontroller and the production microcontroller simultaneously and independently run a microcontroller code to be debugged at a high frequency. The debugging logic can substantially reside in the ICE and the ICE can perform all debugging functions. The debug interface, residing in the production microcontroller, can enable the production microcontroller to communicate with the ICE in low frequencies. The production microcontroller may request the ICE to lower its frequency when the production microcontroller encounters a halt due to outside events. A user may command resumption of the operation of both the production microcontroller and the virtual microcontroller when debugging of the codes is completed.

Abstract: Checking the consistency of a lock step process while debugging a microcontroller code is in progress. A method provides a production microcontroller to execute an instruction code and provides the result of the instruction code to an ICE. The ICE, independent from the production microcontroller and simultaneously, executes the same instruction code and produces a result. The ICE compares the result of its computation and the result received from the production microcontroller. The ICE issues a “lock step error” when the result of the comparison is a mismatch. A trace buffer residing in the host device provides the location of the line of code causing the mismatch. After identifying the line of code causing the mismatch the user debugs the erroneous line of code. The debugging process resumes on the next line of code in the microcontroller code under test.

Abstract: A device for executing an event thread. The device has programmable logic for storing data to define a number of states in an event thread to be executed in the event engine. The device also has execution logic coupled to the programmable logic. The execution logic is configurable to execute the current state and re-configurable to execute the next state, in response to data from the programmable logic. In this fashion, the next state may be executed by re-configuring the execution logic. The device also has transition logic coupled to the programmable logic. The transition logic causes the next state in the event thread to be entered by loading new data from the programmable logic. Therefore, the execution logic is re-configurable during execution of the event thread.