Abstract: A field emission device (200, 300, 400, 500) includes a supporting substrate (210, 310, 410, 510), a cathode (215, 315, 415, 515) formed thereon, a plurality of electron emitters (270, 370, 470, 570) and a plurality of gate extraction electrodes (250, 350, 450, 550) proximately disposed to the plurality of electron emitters (270, 370, 470, 570) for effecting electron emission therefrom, a major dielectric surface (248, 348, 448, 548) disposed between the plurality of gate extraction electrodes (250, 350, 450, 550), a charge dissipation layer (252, 352, 452, 552) formed on the major dielectric surface (248, 348, 448, 548), and an anode (280, 380, 480, 580) spaced from the gate extraction electrodes (250, 350, 450, 550).

Abstract: A plurality of edge emitters in a FED array include a plate shaped substrate having parallel, laterally spaced apart grooves formed in a first surface and parallel, laterally spaced apart grooves formed in the opposite surface so that each second groove crosses each first groove at an angle. The combined depths of the grooves is greater than the thickness of the plate substrate so that an opening is formed through the substrate at each point where a second groove crosses a first groove. Gate metal is deposited on the surfaces in the openings and emitter material is deposited on the lands of the first surface to form FED emitters in each opening.

Abstract: An electro-luminescent display (10) utilizes a complementary field effect transistor driver (14) to control an electro-luminescent display element or pixel element (11). Two alternating voltages (23, 24) are utilized to stimulate light emission from the pixel (11). Each voltage (23, 24) is no greater than a threshold voltage of the pixel so that both voltages (23, 24) are required to stimulate light emission. The driver (14) couples a first voltage (24) to one electrode (13) of the pixel while the second voltage (23) is coupled to the other electrode (12) of the pixel.

Abstract: A field emission display includes an insulating layer and an emitting layer disposed on the faceplate. A vacuum chamber is disposed between a backplane and the emitting layer and contains a getter. Apertures are defined through the insulating layer and the emitting layer for communicating contaminates from the faceplate to the vacuum chamber.

Abstract: A ballistic charge transport device including an edge electron emitter defining an elongated central opening therethrough with a receiving terminal (e.g. an anode) at one end of the opening and a getter at the other end. A suitable potential is applied between the emitter and the receiving terminal to attract emitted electrons to the receiving terminal and a different suitable potential is applied between the emitter and the getter so that contaminants, such as ions and other undesirable particles, are accelerated toward and absorbed by the getter.

Abstract: A flat, cold-cathode electron emitter including a substrate having a relatively flat surface with a low work function electron emission material layer for emitting electrons supported on the surface of the substrate. A contact conductive layer is disposed on the electron emission material layer and defines an aperture therethrough. An insulating layer is disposed on the contact conductive layer and has an aperture defined therethrough coextensive and in peripheral alignment with the aperture in the contact conductive layer and a conductive gate layer is disposed on the insulating layer. The contact conductive layer forms the field potential so that emission occurs substantially in the center of the aperture.

Abstract: Manufacturing a single substrate fluorescent display including forming a first conductive layer on a substrate, depositing a first insulating layer on the first conductive layer, depositing a second conductive layer in horizontal rows on the first insulating layer, depositing a second insulating layer on the second conductive layer, and depositing an electron emitting layer of low work function material in columns on the second insulating layer so as to define a plurality of pixels at the column/row intersections. An opening is formed at each pixel extending through the layer of electron emitting material, the second insulating layer, the second conductive layer and the first insulating layer to the first conductive layer. A layer of light emitting material is deposited on the first conductive layer in the opening at each pixel.

Abstract: An ohmic contact to a III-V semiconductor material is fabricated. First, a III-V semiconductor material is provided. Source/drain regions are then formed in the III-V semiconductor material. On the III-V semiconductor material, a contact system is formed which is dry etchable using reactive ions such as chlorine or fluorine and substantially free of arsenic. Subsequently, a portion of the contact system is dry etched using reactive ions such as chlorine or fluorine to leave a portion of the contact system remaining on the source/drain regions. Then, the III-V semiconductor material and the contact system are annealed in an atmosphere substantially free of arsenic at a temperature at which at least a part of the contact system is alloyed with the source/drain regions to form an ohmic contact with the source/drain regions of the III-V semiconductor material.

Abstract: A light emitting diode including a carrier injection layer of semiconductor material, such as diamond, and a light emitting layer of electroluminescent organic material, such as PPV, positioned to form a diode junction therebetween. The semiconductor material being selected to have a wider bandgap than the organic material and the materials being further selected to minimize the discontinuities at the junction which would cause energy spikes.

Abstract: A single substrate, vacuum fluorescent display including a first layer of electrically conductive material positioned on a supporting substrate and a light emitting layer including phosphor positioned on the first layer. A second layer of electrically conductive material is supported on the substrate and electrically insulated from the first layer. An electron emitting layer of low work function material is positioned on the second layer and further positioned so that emitted electrons strike the light emitting layer. Since both the electron emitting and the light emitting layers are supported on the substrate, an encapsulating window is simple and easy to construct. Integrated drivers are optionally formed in the supporting substrate.

Abstract: A light emitting diode including a carrier injection layer of semiconductor material, such as diamond, and a light emitting layer of polycrystalline phosphor, such as zinc oxide, positioned to form a diode junction therebetween. The semiconductor material being selected to have a wider bandgap than the polycrystalline phosphor and the materials being further selected to minimize the discontinuities at the junction which would cause energy spikes.

Abstract: An ohmic contact to a III-V semiconductor material is fabricated. First, a III-V semiconductor material is provided. Source/drain regions are then formed in the III-V semiconductor material. On the III-V semiconductor material, a contact system is formed which is dry etchable using reactive ions such as chlorine or fluorine and substantially free of arsenic. Subsequently, a portion of the contact system is dry etched using reactive ions such as chlorine or fluorine to leave a portion of the contact system remaining on the source/drain regions. Then, the III-V semiconductor material and the contact system are annealed in an atmosphere substantially free of arsenic at a temperature at which at least a part of the contact system is alloyed with the source/drain regions to form an ohmic contact with the source/drain regions of the III-V semiconductor material.

Abstract: An optical semiconductor device is formed by using one controlled etch to form a "T" shaped contact structure on the device (20). The etch rate is controlled by judicious selection of materials to provide a cladding layer (17) that has a predetermined etch rate in hydrofluoric acid, a support layer (10) and a contact layer (18) that are not affected by hydrofluoric acid, a lift-off layer (19) that is dissolved by hydrofluoric acid, and a barrier layer (21). Dissolving of the lift-off layer (19) facilitates removing the barrier layer (21).

Abstract: A method of reducing the leakage current of a III-V compound semiconductor device (10) includes providing the device with a confinement layer having two sections (13, 14). A first section (14) has a higher doping concentration than a second section (13). An energy barrier that confines minority carriers to an active layer (12) of the device (10) is formed by diffusing a dopant into a portion of the active layer (12) and the two sections (13, 14) of the confinement layer. During the diffusion, the conductivity type of a portion of the lower doped second section (13) is inverted while the higher doped first section (14) is not inverted.

Abstract: A method for making a self-aligned IID structure for an LED (10) is provided. This self-aligned IID structure is accomplished by depositing a dopant layer (17) over the LED structure. A polymeric material is deposited over layer (17). The polymeric layer and dopant containing layer (17) are etched to a predetermined position. The remaining polymeric material is removed from the LED (10) structure. The LED (10) structure is annealed to produce an IID structure by laterally diffusing dopants from layer (17) into at least one side wall of the LED (10).

Abstract: A configurable display comprising a distributed Bragg reflector having a plurality of flexible, compressible polymer layers is provided. The polymer layers are transparent and comprise alternating layers of differential index of refraction material so that a reflective surface is formed at each interface between the alternating layers. The polymer layers are sandwiched between a first electrode which is transparent and a second electrode. Thickness of each of the layers is designed such that light reflecting from the reflective surfaces interferes constructively at predetermined wavelengths. The thickness of each of the layers is altered by application of a static potential between the first and second electrodes which deforms the polymer layers thereby shifting the wavelength at which constructive interference occurs. In this manner wavelength and amplitude of reflective light can be modulated by a voltage applied between the first and second electrodes.

Abstract: A method of filtering an AC signal using a piezoelectric beam is provided. A piezoelectric film is formed on a mechanical support and a portion of the piezoelectric film forms a beam which extends beyond the mechanical support so that a cavity is formed underneath the beam, and the beam is free to vibrate in the cavity at a resonant frequency when an acoustic wave is propagated in the piezoelectric layer.A depletion region is formed under a Schottky contact which serves as a drive electrode. An unfiltered AC signal is coupled to the drive electrode thereby establishing an acoustic wave when the unfiltered AC signal comprises a component at the resonant frequency. Surface charge on the piezoelectric film resulting from vibration of the beam allows the resonant frequency component of the unfiltered AC signal to pass through the depletion region. Alternatively, the resonant frequency component can be passed by a tunnel current through the cavity.

Abstract: A light emitting diode is provided comprising a substrate which is transparent to the emitted light upon which a plurality of semiconductor layers, including a quantum well active layer, are formed. The materials are chosen not only for their optical characteristics but also so that many of the layers act as etch stops for layers which are formed on top of them. In addition to operational semiconductor layes which form the light emitting diode, two sacrificial semiconductor layers are formed on the substrate which serve as masks during processing and are removed prior to device metallization. An initial pattern is formed in the uppermost semiconductor layer and is transferred down through lower layers using the etch stop layers and selective etches so that further photolithography steps are unnecessary. Electrodes are formed on one side of the device by conventional metal deposition techniques and are self aligned to the LED junction.

Abstract: A heterojunction bipolar transistor (HBT) is provided having a silicon substrate in which a conventional junction base is formed. A coherently strained layer of semiconductor material having a wider band gap than silicon, such as gallium phosphide, is formed over the base to form a first portion of an emitter multilayer. A second portion of the emitter multilayer comprises silicon which can be epitaxially grown on the coherently strained layer. A thin heteropotential barrier is thus formed at the base-emitter junction which preferentially allows electrons to move from emitter to base while significantly reducing hole current from base to emitter, thereby improving emitter injection efficiency and current gain.

Abstract: A vertical III-V compound MESFET is provided. The MESFET has a buried P-type layer which separates the source and the drain regions. A small N-type region in the buried P layer connects the source channel to the drain area. This opening in the buried P layer is located underneath the Schottky gate.