Abstract: A unit for supplying a substrate-treating liquid is provided with a first reservoir and a second reservoir between which a differential pressure is constantly maintained to establish a flow rate, along with a substrate-treating apparatus having the unit for supplying the substrate-treating liquid. The unit for supplying the substrate-treating liquid includes a supply reservoir module and a buffer reservoir module. The supply reservoir module includes a first reservoir for supplying the substrate-treating liquid to an inkjet head unit for jetting the substrate-treating liquid onto a substrate, and a second reservoir for recovering the substrate-treating liquid that remains unused in the inkjet head unit. The buffer reservoir module is configured to provide the substrate-treating liquid to the first reservoir. Differential pressure is constantly maintained between the first reservoir and the second reservoir.

Abstract: Provided are a nozzle inspection method and a nozzle inspection apparatus capable of accurately detecting a defect in an inkjet head nozzle within a short time. The nozzle inspection method comprises discharging a plurality of droplets into a first region of interest of a substrate using a first nozzle to form an inspection pattern, and determining whether the first nozzle is defective based on the inspection pattern.

Abstract: The present embodiments relate to a steering assist device and method, and a steering system. The steering assist device comprises: first and second input-side steering control modules for controlling an input-side steering motor so that an input-side instrument connected to a steering wheel is assisted; and first and second output-side steering control modules for controlling an output-side steering motor so that an output-side instrument mechanically separated from the input-side instrument and connected to a wheel is assisted, wherein the first and second input-side steering control modules and the first and second output-side steering control modules arbitrate a role assignment and can control a corresponding steering motor from among the input-side steering motor and the output-side steering motor according to the role assignment arbitration result.

Abstract: Provided are a substrate treating liquid supply unit for constantly maintaining a liquid level of a nozzle of an inkjet head unit through real-time water level measurement, and a substrate treating apparatus including the same. The substrate treating liquid supply unit includes: a first reservoir connected to an inkjet head unit for jetting a substrate treating liquid onto a substrate and providing the substrate treating liquid to the inkjet head unit; a water level sensor measuring a water level of the substrate treating liquid stored in the first reservoir; and a pressure control module compensating for a pressure provided to the first reservoir based on an amount variation in the water level of the substrate treating liquid, wherein a liquid level of a nozzle of the inkjet head unit is constantly maintained.

Abstract: Provided is an apparatus for treating a substrate. The apparatus for treating the substrate includes: a first process chamber having a first treating space therein; a second process chamber having a second treating space therein; and an exhaust unit configured to exhaust atmospheres of the first treating space and the second treating space, in which the exhaust unit includes an integrated exhaust line in which a pressure reduction unit is installed, a first exhaust line configured to connect the first process chamber and a first point of the integrated exhaust line, a second exhaust line configured to connect the first process chamber and a second point of the integrated exhaust line, and an interference alleviation unit configured to alleviate exhaust interference between the first process chamber and the second process chamber.

Abstract: A storage device may include a plurality of memory devices and a memory controller in communication with the plurality of memory devices through a plurality of channels. The memory controller may select candidate channels to be activated among the plurality of channels, determine a threshold number of channel activation based on a number of channels in an active state before a first time point, and activate one or more target channels among the candidate channels so that a number of the target channels to be activated at the first time point is within the threshold number.

Abstract: A controller for controlling a memory device including memory cells, the controller includes: a memory suitable for storing offset level information which is determined based on a sample read level according to characteristics of the memory cells and Gaussian modeling of the memory cells; and a processor suitable for generating an estimated read level based on the Gaussian madding and data read from the memory cells, and applying a compensated read voltage to control the memory device to perform read operations of the memory cells, wherein the compensated read voltage is generated by applying the offset level information to the estimated read level.

Abstract: A memory system determines a level of a read voltage, which is used for reading or recognizing data stored in non-volatile memory cells, in response to a change of a threshold voltage distribution which gradually widens due to charge loss or charge transfer in the non-volatile memory cells over time, so that it is possible to provide an apparatus and method which can avoid or reduce an error in a read operation.

Abstract: A data processing device includes a plurality of variable nodes configured to receive and store a plurality of target bits; a plurality of check nodes each configured to receive stored target bits from one or more corresponding variable nodes of the plurality of variable nodes, check whether received target bits have an error bit, and transmit a check result to the corresponding variable nodes; and a group state value manager configured to determine group state values of variable node groups into which the plurality of variable nodes are grouped.

Abstract: A method of controlling a user interface using an input image is provided. The method includes storing operation executing information of each of one or more gesture forms according to each of a plurality of functions, detecting a gesture form from the input image, and identifying the operation executing information mapped on the detected gesture form to execute an operation according to a function which is currently operated.

Abstract: A storage device having improved performance includes: a plurality of memory devices, each memory device including a plurality of memory blocks, the plurality of memory devices coupled to a channel; and a memory controller coupled to the channel to be in communication with the plurality of memory devices to provide a read command for instructing a read operation on the plurality of memory blocks to read out data and provide a read enable signal to the memory devices during at least part of an idle time of the channel, which occurs while the read operation is being performed. The plurality of memory devices output first data to the memory controller through the channel in response to the read enable signal, wherein the first data is different from the data previously read out by the read operation that provides the read enable signal in response to the read command.

Abstract: Devices for using a neural network to choose an optimal error correction algorithm are disclosed. An example device includes a decoding controller inputting at least one of the number of primary unsatisfied check nodes (UCNs), the number of UCNs respectively corresponding to at least one iteration, and the number of correction bits respectively corresponding to the at least one iteration to a trained artificial neural network, and selecting any one of a first error correction decoding algorithm and a second error correction decoding algorithm based on an output of the trained artificial neural network corresponding to the input, and an error correction decoder performing error correction decoding on a read vector using the selected error correction decoding algorithm. The output of the trained artificial neural network may include a first predicted value indicating a possibility that a first error correction decoding using the first error correction decoding algorithm is successful.

Abstract: An ECC decoder includes: a memory comprising a memory region; a first converter configured to transmit a hard bit, received from a channel, to the memory to store the hard bit in a first area of the memory region; a second converter configured to receive the hard bit read from the first area and output a reliability value corresponding to the hard bit, whenever a hard decoding operation on the hard bit is iterated; and a variable node configured to perform the hard decoding operation using the reliability value.

Abstract: A memory system includes a memory device and a memory controller. The memory controller transmits a data read command to the memory device, inputs N read enable toggle signals to the memory device in order for the memory device to output the data requested by the data read command requests, and inputs an additional read enable toggle signal to the memory device. The memory device outputs status information of the memory device to the memory controller in response to the additional read enable toggle signal.

Abstract: The present disclosure relates to an yttrium-based granular powder for thermal spraying. More particularly, the yttrium-based granular powder is a mixture including one or more yttrium compound powders selected from among Y2O3, YOF, YF3, Y4Al2O9, Y3Al5O12, and YAlO3, and a silica (SiO2) powder. A Y—Si—O intermediate phase is included therein in a content of less than 10 wt %. The thermal spray coating manufactured using the same has a low porosity, and forms a very dense thin film, thus ensuring excellent plasma resistance.

Abstract: The controller that controls a memory device includes: a processor suitable for controlling the memory device to perform a first soft read operation by using first soft read voltages; and an error correction code (ECC) codec suitable for performing a first soft decision decoding operation based on first soft read data obtained through the first soft read operation, wherein the processor controls the memory device to perform a second soft read operation with an additional read voltage, of second soft read voltages, that is different than any of the first soft read voltages and which is determined based on the first soft read data, according to whether the first soft decision decoding operation failed, and wherein the ECC codec performs a second soft decision decoding operation based on the first soft read data and second soft read data obtained through the second soft read operation.

Abstract: The present technology relates to an electronic device. More specifically, the present technology relates to a memory controller and a method of operating the same. According to an embodiment, a memory controller includes an error corrector configured to receive read data from a memory device and output a first message obtained by performing error correction decoding on the read data based on a parity check matrix, a randomizer configured to generate a second message by inverting the first message, and an operation controller configured to output the second message, wherein the parity check matrix is a matrix in which a number of elements, each of which is one (1) among elements included in each row, is an even number or a matrix in which an exclusive OR on elements included in each row is zero (0).

Abstract: The present technology includes an electronic device and a method of operating the same using an artificial neural network. The electronic device according to the present technology includes a decoding controller inputting a primary syndrome vector generated based on a read vector and a parity check matrix to a trained artificial neural, and selecting any one of a first error correction decoding algorithm and a second error correction decoding algorithm based on an output of the trained artificial neural network corresponding to the input, and an error correction decoder performing error correction decoding on a read vector using the selected error correction decoding algorithm. The output of the trained artificial neural network includes a first predicted value indicating a probability that a first error correction decoding using the first error correction decoding algorithm is successful.

Abstract: The present technology relates to an error correction circuit. According to the present technology, an error correction circuit performing error correction encoding on a plurality of messages to be stored in a memory device includes a first error correction encoder and a second error correction encoder. The first error correction encoder generates a plurality of codewords by performing first error correcting encoding on each of the plurality of messages. The second error correction encoder performs a second error correction encoding operation by performing an exclusive OR operation on symbols of an identical column layer within the codewords. The second error correction encoder determines a data unit as a target of the second error correction encoding operation based on a use period of the memory device.

Abstract: A memory system includes a memory device including a plane including a plurality of memory blocks for storing multi-bit data; and a controller configured to detect, when a problem-causing operation is performed on a first memory block among the memory blocks, remaining memory blocks, except the first memory block, in the plane as being in a problem occurrence candidate group, search for a table, when a read command for a second memory block of the problem occurrence candidate group is received, for a read voltage application order corresponding to the second memory block, and control the memory device to perform a read operation on the second memory block by sequentially applying a plurality of read voltages according to the searched read voltage application order, wherein the problem-causing operation is a program operation or an erase operation.