Patents by Inventor Daniel Worledge

Daniel Worledge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8686520
    Abstract: Magnetoresistive structures, devices, memories, and methods for forming the same are presented. For example, a magnetoresistive structure includes a first ferromagnetic layer, a first nonmagnetic spacer layer proximate to the first ferromagnetic layer, a second ferromagnetic layer proximate to the first nonmagnetic spacer layer, and a first antiferromagnetic layer proximate to the second ferromagnetic layer. For example, the first ferromagnetic layer may comprise a first pinned ferromagnetic layer, the second ferromagnetic layer may comprise a free ferromagnetic layer, and the first antiferromagnetic layer may comprise a free antiferromagnetic layer.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: April 1, 2014
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Patent number: 7901588
    Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: March 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Eugene J. O'Sullivan, Daniel Worledge
  • Publication number: 20100302690
    Abstract: Magnetoresistive structures, devices, memories, and methods for forming the same are presented. For example, a magnetoresistive structure includes a first ferromagnetic layer, a first nonmagnetic spacer layer proximate to the first ferromagnetic layer, a second ferromagnetic layer proximate to the first nonmagnetic spacer layer, and a first antiferromagnetic layer proximate to the second ferromagnetic layer. For example, the first ferromagnetic layer may comprise a first pinned ferromagnetic layer, the second ferromagnetic layer may comprise a free ferromagnetic layer, and the first antiferromagnetic layer may comprise a free antiferromagnetic layer.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 2, 2010
    Applicant: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Patent number: 7685708
    Abstract: A nanoprobe includes a substrate having a layer, which forms a projected portion. A plurality of conductive lines is adhered to the projected portion and the lines extend beyond an end of the projected portion by a distance to form contact points, wherein the lines are connected to material of the projected portion to provide stiffness and the contact points provide flexibility during use.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: March 30, 2010
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Patent number: 7619409
    Abstract: A method of electrically characterizing a magnetic tunnel junction film stack having three metal layers separated by two dielectric layers comprises three steps. In a first step, four or more probes are electrically coupled to a surface of the magnetic tunnel junction film stack. In a second step, electrical resistance is determined with the four or more probes for each of a plurality of spacings between the probes. Finally, in a third step, the plurality of resistance measurements are fitted with one or more equations that relate electrical resistance to probe spacing.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: November 17, 2009
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Patent number: 7535069
    Abstract: A semiconductor device formed between a wordline and a bitline comprises a growth layer, an antiferromagnetic layer formed on the growth layer, a pinned layer formed on the antiferromagnetic layer, a tunnel barrier layer formed on the pinned layer, and a free layer formed on the tunnel barrier. The wordline and bitline are arranged substantially orthogonal to one another. The growth layer, in turn, comprises tantalum and has a thickness greater than about 75 Angstroms. Moreover, the pinned layer comprises one or more pinned ferromagnetic sublayers. The tunnel barrier comprises magnesium oxide. Finally, the free layer comprises two or more free ferromagnetic sublayers, each free ferromagnetic sublayer having a magnetic anisotropy axis that is oriented about 45 degrees from the wordline and bitline. The semiconductor device may comprise, for example, a magnetic tunnel junction for use in magnetoresistive random access memory (MRAM) circuitry.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: May 19, 2009
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, Stephen L. Brown, Stuart P. Parkin, Daniel Worledge
  • Publication number: 20080164872
    Abstract: A method of electrically characterizing a magnetic tunnel junction film stack having three metal layers separated by two dielectric layers comprises three steps. In a first step, four or more probes are electrically coupled to a surface of the magnetic tunnel junction film stack. In a second step, electrical resistance is determined with the four or more probes for each of a plurality of spacings between the probes. Finally, in a third step, the plurality of resistance measurements are fitted with one or more equations that relate electrical resistance to probe spacing.
    Type: Application
    Filed: January 4, 2007
    Publication date: July 10, 2008
    Inventor: Daniel Worledge
  • Publication number: 20080156664
    Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.
    Type: Application
    Filed: July 16, 2007
    Publication date: July 3, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eugene J. O'Sullivan, Daniel Worledge
  • Patent number: 7337536
    Abstract: A nanoprobe includes a substrate having a layer, which forms a projected portion. A plurality of conductive lines is adhered to the projected portion and the lines extend beyond an end of the projected portion by a distance to form contact points, wherein the lines are connected to material of the projected portion to provide stiffness and the contact points provide flexibility during use.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: March 4, 2008
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Publication number: 20070297218
    Abstract: A semiconductor device formed between a wordline and a bitline comprises a growth layer, an antiferromagnetic layer formed on the growth layer, a pinned layer formed on the antiferromagnetic layer, a tunnel barrier layer formed on the pinned layer, and a free layer formed on the tunnel barrier. The wordline and bitline are arranged substantially orthogonal to one another. The growth layer, in turn, comprises tantalum and has a thickness greater than about 75 Angstroms. Moreover, the pinned layer comprises one or more pinned ferromagnetic sublayers. The tunnel barrier comprises magnesium oxide. Finally, the free layer comprises two or more free ferromagnetic sublayers, each free ferromagnetic sublayer having a magnetic anisotropy axis that is oriented about 45 degrees from the wordline and bitline. The semiconductor device may comprise, for example, a magnetic tunnel junction for use in magnetoresistive random access memory (MRAM) circuitry.
    Type: Application
    Filed: June 14, 2006
    Publication date: December 27, 2007
    Applicant: International Business Machines Corporation
    Inventors: David Abraham, Stephen Brown, Stuart Parkin, Daniel Worledge
  • Patent number: 7258809
    Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: August 21, 2007
    Assignee: International Business Machines Corporation
    Inventors: Eugene J. O'Sullivan, Daniel Worledge
  • Publication number: 20070097731
    Abstract: Apparatus and methods for optimizing a toggle window for a magnetic tunnel junction (MTJ) having a multicomponent free layer are provided. In accordance with an aspect of the invention, a MTJ comprises a free layer, a pinned layer, and a barrier layer formed between the free layer and the pinned layer. The free layer, in turn, includes a plurality of free magnetic sublayers while the pinned layer includes a plurality of pinned magnetic sublayers. Each of the pinned magnetic sublayers exerts a magnetic field on the free magnetic sublayers. To optimize the toggle window for the device, the dimensions of each of the pinned magnetic sublayers are selected to substantially equalize average magnetic fields acting on each of the free magnetic sublayers.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 3, 2007
    Applicant: International Business Machines Corporation
    Inventors: David Abraham, Daniel Worledge
  • Patent number: 7205163
    Abstract: A magnetic memory cell that uses a curved magnetic region to create magnetic anisotropy is provided by the present invention. The magnetic memory cell is created from a free magnetic layer, a barrier layer and a reference magnetic layer. The magnetic layers are constructed such that they have portions that are curved with respect to a first axis and straight with respect to a second perpendicular axis. These curved portions result in a magnetic memory cell that has an easy axis that is parallel to the first axis and a hard axis that is perpendicular to the easy axis. In addition, the resulting magnetic memory cell's coercivity is independent of it's thickness. Thus, the magnetic memory cell is well adapted to being scaled down without increasing the likelihood of thermally induced errors.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: April 17, 2007
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Publication number: 20060289381
    Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.
    Type: Application
    Filed: June 8, 2005
    Publication date: December 28, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eugene O'Sullivan, Daniel Worledge
  • Patent number: 7102916
    Abstract: A method for determining a desired anisotropy axis angle for a magnetic random access memory (MRAM) device includes selecting a plurality of initial values for the anisotropy axis angle and determining, for each selected initial value, a minimum thickness for at least one ferromagnetic layer of the MRAM device. The minimum thickness corresponds to a predefined activation energy of an individual cell within the MRAM device. For each selected value, a minimum applied magnetic field value in a wordline direction and a bitline direction of the MRAM device is also determined so as maintain the predefined activation energy. For each selected value, an applied power per bit value is calculated, wherein the desired anisotropy axis angle is the selected anisotropy axis angle corresponding to a minimum power per bit value.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: Philip L. Trouilloud, David W. Abraham, John K. DeBrosse, Daniel Worledge
  • Publication number: 20060118845
    Abstract: Techniques for exchange coupling of magnetic layers in semiconductor devices are provided. In one aspect, a semiconductor device is provided. The device comprises at least two magnetic layers, and a spacer layer formed between the magnetic layers, the spacer layer being configured to provide ferromagnetic exchange coupling between the layers, the magnetic layers experiencing anti-ferromagnetic dipole coupling, such that a net coupling of the magnetic layers is anti-ferromagnetic in a zero applied magnetic field. The semiconductor device may comprise magnetic random access memory (MRAM). In another aspect, a method for coupling magnetic layers in a semiconductor device comprising at least two magnetic layers and a spacer layer therebetween, the method comprises the following step.
    Type: Application
    Filed: January 24, 2006
    Publication date: June 8, 2006
    Applicant: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Patent number: 7034519
    Abstract: An improved method and apparatus for determining a property based upon at least two measurements uses simultaneous probe signals having two different frequencies. The probe signals are produced simultaneously such that the position of the probes is identical when the probe signals are produced. The responses to the two probe signals have frequencies that correspond to the probe signals. The individual responses are isolated from each other based upon their differing frequencies by frequency lock-in circuits. By performing the measurements simultaneously, positional errors that are introduced due to small changes that occur in the position of the probes if the measurements are taken sequentially are eliminated.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: April 25, 2006
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, Daniel Worledge
  • Patent number: 7009414
    Abstract: A method for determining properties of a sample surface using an atomic force microscope includes applying a first voltage between the sample and a probe, moving the probe towards the surface of the sample, and stopping movement of the probe towards the surface of the sample when current in the probe is initially detected. An oscillating magnetic field is applied to the probe such that the probe obtains stable contact with the surface of the sample.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: March 7, 2006
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Publication number: 20060037194
    Abstract: A nanoprobe includes a substrate having a layer, which forms a projected portion. A plurality of conductive lines is adhered to the projected portion and the lines extend beyond an end of the projected portion by a distance to form contact points, wherein the lines are connected to material of the projected portion to provide stiffness and the contact points provide flexibility during use.
    Type: Application
    Filed: October 17, 2005
    Publication date: February 23, 2006
    Inventor: Daniel Worledge
  • Patent number: 7002194
    Abstract: A magnetic storage structure comprises a first magnetic layer; a second magnetic layer; and a nonmagnetic spacer layer disposed between the first and second layers for coupling the first and second layers to be parallel in a zero field condition. According to another embodiment of the invention a magnetic memory cell exhibits a hysteresis loop wherein in small fields the thin layer switches, reversibly, leaving the layers coupled anti parallel. At larger fields the thick layer switches making the layers parallel. According to yet another embodiment of the invention, a magnetic memory structure comprises two magnetic layers wherein the layers are magnetically coupled in a substantially parallel mode in zero field, and switches via the anti parallel state.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: February 21, 2006
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge