Patents by Inventor Daniel Worledge

Daniel Worledge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060002179
    Abstract: A method for determining a desired anisotropy axis angle for a magnetic random access memory (MRAM) device includes selecting a plurality of initial values for the anisotropy axis angle and determining, for each selected initial value, a minimum thickness for at least one ferromagnetic layer of the MRAM device. The minimum thickness corresponds to a predefined activation energy of an individual cell within the MRAM device. For each selected value, a minimum applied magnetic field value in a wordline direction and a bitline direction of the MRAM device is also determined so as maintain the predefined activation energy. For each selected value, an applied power per bit value is calculated, wherein the desired anisotropy axis angle is the selected anisotropy axis angle corresponding to a minimum power per bit value.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Applicant: INTERNATIOANL BUSINESS MACHAINES CORPORATION
    Inventors: Philip Trouilloud, David Abraham, John DeBrosse, Daniel Worledge
  • Publication number: 20050285168
    Abstract: The present invention provides techniques for data storage. In one aspect of the invention, a semiconductor device is provided. The semiconductor device comprises at least one free layer and at least one fixed layer, with at least one barrier layer therebetween. At least one pinned magnetic layer is separated from the at least one free layer by at least one non-magnetic layer, the at least one pinned magnetic layer and non-magnetic layer being configured to cancel out at least a portion of a Neel coupling between the at least one free layer and the at least one fixed layer.
    Type: Application
    Filed: June 28, 2004
    Publication date: December 29, 2005
    Applicants: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Daniel Worledge, Ulrich Klostermann
  • Patent number: 6975124
    Abstract: A nanoprobe includes a substrate having a layer, which forms a projected portion. A plurality of conductive lines is adhered to the projected portion and the lines extend beyond an end of the projected portion by a distance to form contact points, wherein the lines are connected to material of the projected portion to provide stiffness and the contact points provide flexibility during use.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: December 13, 2005
    Assignee: International Business Machines Corp.
    Inventor: Daniel Worledge
  • Publication number: 20050268207
    Abstract: Techniques for data storage are provided. In one aspect, a method for writing one or more magnetic memory cells comprises the following steps. Data is written to one or more of the magnetic memory cells. It is detected whether there are any errors in the data written to the one or more magnetic memory cells. The data is rewritten to each of the one or more previously written magnetic memory cells in which an error is detected.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 1, 2005
    Applicant: International Business Machines Corporation
    Inventors: William Gallagher, Daniel Worledge
  • Publication number: 20050253128
    Abstract: Techniques for reducing switching fields in semiconductor devices are provided. In one aspect, a semiconductor device comprising at least a first magnetic layer and a second magnetic layer with a spacer layer therebetween is provided. The semiconductor device is configured such that a thickness of at least one of the first magnetic layer and the second magnetic layer maintains a desired activation energy of the semiconductor device in the presence of an applied offsetting magnetic field. A method of reducing a switching field of a semiconductor device having at least a first magnetic layer and a second magnetic layer with a spacer layer therebetween is also provided.
    Type: Application
    Filed: April 26, 2004
    Publication date: November 17, 2005
    Applicant: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Patent number: 6943571
    Abstract: A system and method for measuring a resistance or a resistance per square, Rsq, of a material having a surface using a multi-point probe including four or more collinear contact points placed in the interior of the sample, the method including: making a first measurement using a first set of probe electrodes for inducing a current and a second set of probe electrodes for measuring the voltage difference when the current is induced; making a second measurement using a set of probe electrodes different from the first set for inducing a current and a set of probe electrodes different from the second set for measuring the voltage difference when the current is induced; and using a known relationship among the currents induced, the voltages measured, the nominal probe positions and the resistance per square to determine the resistance per square such that measurement errors resulting from positioning of the probes are reduced.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: September 13, 2005
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Publication number: 20050151552
    Abstract: An improved method and apparatus for determining a property based upon at least two measurements uses simultaneous probe signals having two different frequencies. The probe signals are produced simultaneously such that the position of the probes is identical when the probe signals are produced. The responses to the two probe signals have frequencies that correspond to the probe signals. The individual responses are isolated from each other based upon their differing frequencies by frequency lock-in circuits. By performing the measurements simultaneously, positional errors that are introduced due to small changes that occur in the position of the probes if the measurements are taken sequentially are eliminated.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 14, 2005
    Inventors: David Abraham, Daniel Worledge
  • Publication number: 20050117389
    Abstract: Techniques for improved semiconductor device performance are provided. In one aspect, a semiconductor device is provided. The device comprises at least one free magnetic layer, and a magnetic amplifier interacting with the free magnetic layer comprising two or more magnetic layers with at least one nonmagnetic layer therebetween. The nonmagnetic layer may be configured to provide parallel exchange coupling J of the magnetic layers in a range of 0 < J < 4 ? ? ? ? ? t 2 ? M S 2 ? n y b , the magnetic layers having a long axis and a short axis, wherein t is a thickness of each magnetic layer, Ms is magnetization, ny is a demagnetizing factor defined along the short axis of the magnetic layers and b is a diameter along a short axis of the magnetic layers. A method for switching a semiconductor device having at least one free magnetic layer is also provided.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Applicant: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Publication number: 20050093039
    Abstract: Techniques for exchange coupling of magnetic layers in semiconductor devices are provided. In one aspect, a semiconductor device is provided. The device comprises at least two magnetic layers, and a spacer layer formed between the magnetic layers, the spacer layer being configured to provide ferromagnetic exchange coupling between the layers, the magnetic layers experiencing anti-ferromagnetic dipole coupling, such that a net coupling of the magnetic layers is anti-ferromagnetic in a zero applied magnetic field. The semiconductor device may comprise magnetic random access memory (MRAM). In another aspect, a method for coupling magnetic layers in a semiconductor device comprising at least two magnetic layers and a spacer layer therebetween, the method comprises the following step.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 5, 2005
    Applicant: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Publication number: 20050088905
    Abstract: A magnetic memory cell that uses a curved magnetic region to create magnetic anisotropy is provided by the present invention. The magnetic memory cell is created from a free magnetic layer, a barrier layer and a reference magnetic layer. The magnetic layers are constructed such that they have portions that are curved with respect to a first axis and straight with respect to a second perpendicular axis. These curved portions result in a magnetic memory cell that has an easy axis that is parallel to the first axis and a hard axis that is perpendicular to the easy axis. In addition, the resulting magnetic memory cell's coercivity is independent of it's thickness. Thus, the magnetic memory cell is well adapted to being scaled down without increasing the likelihood of thermally induced errors.
    Type: Application
    Filed: November 3, 2004
    Publication date: April 28, 2005
    Inventor: Daniel Worledge
  • Publication number: 20050081609
    Abstract: A method for determining properties of a sample surface using an atomic force microscope includes applying a first voltage between the sample and a probe, moving the probe towards the surface of the sample, and stopping movement of the probe towards the surface of the sample when current in the probe is initially detected. An oscillating magnetic field is applied to the probe such that the probe obtains stable contact with the surface of the sample.
    Type: Application
    Filed: October 17, 2003
    Publication date: April 21, 2005
    Applicant: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Publication number: 20050062488
    Abstract: A nanoprobe includes a substrate having a layer, which forms a projected portion. A plurality of conductive lines is adhered to the projected portion and the lines extend beyond an end of the projected portion by a distance to form contact points, wherein the lines are connected to material of the projected portion to provide stiffness and the contact points provide flexibility during use.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 24, 2005
    Inventor: Daniel Worledge
  • Publication number: 20050014342
    Abstract: An improved scalable, resistive element for use in a semiconductor device that can be produced with a small feature size and precise resistance is provided by the present invention. The resistive element includes a base layer positioned on top of a metal line. A seed layer of is deposited on top of the base layer. A thin barrier layer of Al is deposited on top of the seed layer and oxidized. A non-magnetic metal layer is then deposited on top of the barrier layer. The base layer and the non-magnetic metal layer form electrodes on either side of the barrier layer. The barrier layer is thin enough that a tunneling current can travel between the electrodes. The resulting resistive element may be constructed with a high resistance and a very small feature size.
    Type: Application
    Filed: July 18, 2003
    Publication date: January 20, 2005
    Applicant: International Business Machines Corporation
    Inventors: Daniel Worledge, Ulrich Klostermann, Wolfgang Raberg, Stephen Brown
  • Publication number: 20050012127
    Abstract: A magnetic storage structure comprises a first magnetic layer; a second magnetic layer; and a nonmagnetic spacer layer disposed between the first and second layers for coupling the first and second layers to be parallel in a zero field condition. According to another embodiment of the invention a magnetic memory cell exhibits a hysteresis loop wherein in small fields the thin layer switches, reversibly, leaving the layers coupled anti parallel. At larger fields the thick layer switches making the layers parallel. According to yet another embodiment of the invention, a magnetic memory structure comprises two magnetic layers wherein the layers are magnetically coupled in a substantially parallel mode in zero field, and switches via the anti parallel state.
    Type: Application
    Filed: July 18, 2003
    Publication date: January 20, 2005
    Inventor: Daniel Worledge
  • Patent number: 6833573
    Abstract: A magnetic memory cell that uses a curved magnetic region to create magnetic anisotropy is provided by the present invention. The magnetic memory cell is created from a free magnetic layer, a barrier layer and a reference magnetic layer. The magnetic layers are constructed such that they have portions that are curved with respect to a first axis and straight with respect to a second perpendicular axis. These curved portions result in a magnetic memory cell that has an easy axis that is parallel to the first axis and a hard axis that is perpendicular to the easy axis. In addition, the resulting magnetic memory cell's coercivity is independent of it's thickness. Thus, the magnetic memory cell is well adapted to being scaled down without increasing the likelihood of thermally induced errors.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: December 21, 2004
    Assignee: International Business Machines Corporation
    Inventor: Daniel Worledge
  • Publication number: 20040183554
    Abstract: A system and method for measuring a resistance or a resistance per square, Rsq, of a material having a surface using a multi-point probe comprising four or more collinear contact points placed in the interior of the sample, the method comprising: making a first measurement using a first set of probe electrodes for inducing a current and a second set of probe electrodes for measuring the voltage difference when the current is induced; making a second measurement using a set of probe electrodes different from the first set for inducing a current and a set of probe electrodes different from the second set for measuring the voltage difference when the current is induced; and using a known relationship among the currents induced, the voltages measured, the nominal probe positions and the resistance per square to determine the resistance per square such that measurement errors resulting from positioning of the probes are reduced.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 23, 2004
    Applicant: International Business Machines Corporation
    Inventor: Daniel Worledge