Abstract: A network device includes at least one network port, a masks table, a rules table, a pointers table, and a fast filter processor. The masks table contains filter information and a mask key. The rules table contains corresponding rules to the filter information and is related to the mask table by the mask key. The pointers table contains boundary data related to the rules for corresponding filter information. The fast filter processor is coupled to the mask table, the rules table and the pointers table, and configured to perform at least one binary search for at least one rule related to a data packet received by the network device at the at least one network port, the binary search being limited based on the boundary data in the pointers table.

Abstract: A golf club head that allows a user to customize the location of the center of gravity. The golf club head comprises a club head having a hollow cavity with a weighting port. The weighting port allows a user to place weighting material inside the hollow cavity, customizing the location of the center of gravity, the swing weight, the total weight, and the balance of the golf club.

Abstract: A network device including a memory, a queue management unit, a memory management unit, and a search switching unit. The memory includes a plurality of memory banks. The queue management unit is configured to receive a plurality of search requests and to prioritize the search requests. The memory management unit is coupled to the queue management unit and the memory, and is configured to initiate a plurality of binary searches based on the plurality of search requests. Each binary search is executed simultaneously in different banks of the plurality of memory banks. The search switching unit is coupled to the memory and the memory management unit, and is configured to switch each binary search from one memory bank of to another memory bank after a predetermined number of search steps are performed by each binary search.

Abstract: A network device including at least one network port, a clock, address resolution logic (ARL) tables, and address resolution logic. The clock generates a timing signal. The ARL tables are configured to store and maintain data related to port addresses of the network device. The address resolution logic is coupled to the ARL tables and the clock, and configured to search the ARL tables and to perform learning concurrently during alternating slots of the timing signal. Upon receiving a data packet at the at least one port, the address resolution logic is configured to search the ARL tables for a destination address based on the data packet. When the destination address is found, the address resolution logic is configured to update a related record of the ARL tables based on the learning, the address resolution logic configured to perform searches and updates.

Abstract: A network device including at least one network port, a clock, address resolution (ARL) tables, and address resolution logic. The at least one network port is configured to send and receive a data packet. The clock is for generating a timing signal. The ARL tables are configured to store and maintain data related to port addresses of the network device. The address resolution logic is coupled to the ARL tables and configured to perform a search and an update to data into the ARL tables based on the data packet, to calculate a current range of the search, to determine an intended result of the update, and to block the update when the intended result will move data out of the current range of the search, the search and the update being performed concurrently during alternating slots of the timing signal.

Abstract: A network device including a memory, a queue management unit, a memory management unit, and a search switching unit. The memory includes a plurality of memory banks. The queue management unit is configured to receive a plurality of search requests and to prioritize the search requests. The memory management unit is coupled to the queue management unit and the memory, and is configured to initiate a plurality of binary searches based on the plurality of search requests. Each binary search is executed simultaneously in different banks of the plurality of memory banks. The search switching unit is coupled to the memory and the memory management unit, and is configured to switch each binary search from one memory bank of to another memory bank after a predetermined number of search steps are performed by each binary search.

Abstract: A network device including a memory, a queue management unit, a memory management unit, and a search switching unit. The memory includes a plurality of memory banks. The queue management unit is configured to receive a plurality of search requests and to prioritize the search requests. The memory management unit is coupled to the queue management unit and the memory, and is configured to initiate a plurality of binary searches based on the plurality of search requests. Each binary search is executed simultaneously in different banks of the plurality of memory banks. The search switching unit is coupled to the memory and the memory management unit, and is configured to switch each binary search from one memory bank of to another memory bank after a predetermined number of search steps are performed by each binary search.

Abstract: A network device includes at least one network port, a masks table, a rules table, a pointers table, and a fast filter processor. The masks table contains filter information and a mask key. The rules table contains corresponding rules to the filter information and is related to the mask table by the mask key. The pointers table contains boundary data related to the rules for corresponding filter information. The fast filter processor is coupled to the mask table, the rules table and the pointers table, and configured to perform at least one binary search for at least one rule related to a data packet received by the network device at the at least one network port, the binary search being limited based on the boundary data in the pointers table.

Abstract: A network device including at least one network port, a clock, address resolution logic (ARL) tables, and address resolution logic. The clock generates a timing signal. The ARL tables are configured to store and maintain data related to port addresses of the network device. The address resolution logic is coupled to the ARL tables and the clock, and configured to search the ARL tables and to perform learning concurrently during alternating slots of the timing signal. Upon receiving a data packet at the at least one port, the address resolution logic is configured to search the ARL tables for a destination address based on the data packet. When the destination address is found, the address resolution logic is configured to update a related record of the ARL tables based on the learning, the address resolution logic configured to perform searches and updates.

Abstract: A network device including at least one network port, a clock, address resolution (ARL) tables, and address resolution logic. The at least one network port is configured to send and receive a data packet. The clock is for generating a timing signal. The ARL tables are configured to store and maintain data related to port addresses of the network device. The address resolution logic is coupled to the ARL tables and configured to perform a search and an update to data into the ARL tables based on the data packet, to calculate a current range of the search, to determine an intended result of the update, and to block the update when the intended result will move data out of the current range of the search, the search and the update being performed concurrently during alternating slots of the timing signal.

Abstract: A network device including a memory, a queue management unit, a memory management unit, and a search switching unit. The memory includes a plurality of memory banks. The queue management unit is configured to receive a plurality of search requests and to prioritize the search requests. The memory management unit is coupled to the queue management unit and the memory, and is configured to initiate a plurality of binary searches based on the plurality of search requests. Each binary search is executed simultaneously in different banks of the plurality of memory banks. The search switching unit is coupled to the memory and the memory management unit, and is configured to switch each binary search from one memory bank of to another memory bank after a predetermined number of search steps are performed by each binary search.

Abstract: A mechanism limits the flow of topology information to only those nodes of a computer network that require the information. The mechanism comprises a filter having a plurality of conditions that are evaluated by a node of the network prior to forwarding the topology information to another node. Specifically, the conditions are evaluated with respect to lists of nodes that are defined according to the configuration of the network. By applying the filtering conditions to the defined lists, each node may selectively propagate the topology information throughout the network, thereby substantially reducing the amount of information flowing over the network.

Abstract: A mold assembly having a first mold half and a second mold half forms a cavity when the first and second mold halves are mated together. Pins or projections, which extend into the cavity, are provided by the mold halves. A semiconductor leadframe rests on the pins provided by the lower mold half and are spaced a short distance from the pins provided by the upper mold half. The pins from the lower mold half support the leadframe whereas the upper mold half pins restrict the movement of the leadframe during an encapsulating procedure. By shortening the pins from the upper mold half the entire upper surface of the leadframe is encapsulated. This eliminates the necessity of having to backfill the holes left in the encapsulating material after the encapsulating procedure.