Abstract: Plasma is generated using elemental hydrogen, a weak oxidizing agent, and a fluorine containing gas. An inert gas is introduced to the plasma downstream of the plasma source and upstream of a showerhead that directs gas mixture into the reaction chamber where the mixture reacts with the high-dose implant resist. The process removes both the crust and bulk resist layers at a high strip rate, and leaves the work piece surface substantially residue free with low silicon loss.

Abstract: Improved methods and apparatus for stripping photoresist and removing ion implant related residues from a work piece surface are provided. According to various embodiments, the workpiece is exposed to a passivation plasma, allowed to cool for a period of time, and then exposed to an oxygen-based or hydrogen-based plasma to remove the photoresist and ion implant related residues. Aspects of the invention include reducing silicon loss, leaving little or no residue while maintaining an acceptable strip rate. In certain embodiments, methods and apparatus remove photoresist material after high-dose ion implantation processes.

Abstract: A method of cleaning a low dielectric constant film in a lithographic process includes providing a dielectric film having thereover a resist composition, the dielectric film having a dielectric constant no greater than about 4.0, and stripping the resist composition to leave a substantially silicon-containing ash residue on the dielectric film. The method then includes contacting the ash residue with plasma comprising an ionized, essentially pure noble gas such as helium to remove the resist residue without substantially affecting the underlying dielectric film.

Abstract: Improved methods for stripping photoresist and removing etch-related residues from dielectric materials are provided. In one aspect of the invention, methods involve removing material from a dielectric layer using a hydrogen-based etch process employing a weak oxidizing agent and fluorine-containing compound. Substrate temperature is maintained at a level of about 160° C. or less, e.g., less than about 90° C.

Abstract: A biocompatible, resorbable biphasic collagen membrane having a first area of relatively higher tensile strength and stiffness and lower porosity and a second area of relatively lower tensile strength and stiffness and higher porosity, and a method of manufacturing the such a membrane.

Abstract: Plasma is generated using elemental hydrogen, a weak oxidizing agent, and a fluorine containing gas. An inert gas is introduced to the plasma downstream of the plasma source and upstream of a showerhead that directs gas mixture into the reaction chamber where the mixture reacts with the high-dose implant resist. The process removes both the crust and bulk resist layers at a high strip rate, and leaves the work piece surface substantially residue free with low silicon loss.

Abstract: A fragrance emitting apparatus includes a casing having an interior region, a USB connector attached to the casing and configured for connection to a USB port, and a heating element positioned in the interior region of the casing and electrically connected to the USB connector. The heating element generates heat when the USB connector is connected to a USB port. The fragrance emitting apparatus includes a fragrance cartridge slidably and removably attached to the casing. The fragrance cartridge has a fragrance member that provides a fragrance, scent or aroma when the fragrance member is heated. The fragrance member is positioned near the heating element when the fragrance cartridge is slidably attached to the casing.

Abstract: Provided are methods and systems for removing polysilicon on a wafer. A wafer can include a polysilicon layer and an exposed nitride and/or oxide structure. An etchant with a hydrogen-based species, such as hydrogen gas, and a fluorine-based species, such as nitrogen trifluoride, can be introduced. The hydrogen-based species and the fluorine-based species can be activated with a remote plasma source. The layer of polysilicon on the wafer can be removed at a selectivity over the exposed nitride and/or oxide structure that is greater than about 500:1.

Abstract: Provided are methods and systems for removing a native silicon oxide layer on a wafer. In a non-sequential approach, a wafer is provided with a native silicon oxide layer on a polysilicon layer. An etchant including a hydrogen-based species and a fluorine-based species is introduced, exposed to a plasma, and flowed onto the wafer at a relatively low temperature. The wafer is then heated to a slightly elevated temperature to substantially remove the native oxide layer. In a sequential approach, a wafer is provided with a native silicon oxide layer. A first etchant including a hydrogen-based species and a fluorine-based species is flowed onto the wafer. Then the wafer is heated to a slightly elevated temperature, a second etchant is flowed towards the wafer, and the second etchant is exposed to a plasma to complete the removal of the native silicon oxide layer and to initiate removal of another layer such as a polysilicon layer.

Abstract: A virtual router spans a number of physical routing devices. A set of physical ports on one of the physical routing devices is logically represented as a trunk. A respective port priority value is associated with each of those ports, and a device priority value is associated with the physical routing device. If a port in the trunk is out-of-service, then the device priority value can be adjusted by the port priority value associated with the out-of-service port. A corrective action can be implemented if the device priority value fails to satisfy a condition. For example, the physical routing device may failover to another one of the physical routing devices spanned by the virtual router.

Abstract: Improved methods for stripping photoresist and removing etch-related residues from dielectric materials are provided. In one aspect of the invention, methods involve removing material from a dielectric layer using a hydrogen-based etch process employing a weak oxidizing agent and fluorine-containing compound. Substrate temperature is maintained at a level of about 160° C. or less, e.g., less than about 90° C.

Abstract: Embodiments described herein discuss an approach to implementing load-balancing across multiple monitoring servers. One such embodiment describes a network monitoring device. The network monitoring device includes an ingress port, for receiving mirrored network packets, and a number of egress ports. The egress ports are associated with a number of monitoring servers, and used to forward the mirrored network packets to the monitoring servers. A packet classifier, coupled to the ingress port, examines the mirrored network packets, and determines which of the monitoring servers should receive the packets.

Abstract: A fragrance emitting apparatus includes a casing having an interior region, a USB connector attached to the casing and configured for connection to a USB port, and a heating element positioned in the interior region of the casing and electrically connected to the USB connector. The heating element generates heat when the USB connector is connected to a USB port. The fragrance emitting apparatus includes a fragrance cartridge slidably and removably attached to the casing. The fragrance cartridge has a fragrance member that provides a fragrance, scent or aroma when the fragrance member is heated. The fragrance member is positioned near the heating element when the fragrance cartridge is slidably attached to the casing.

Abstract: A method and apparatus for cleaning a wafer. The wafer is heated and moved to a processing station within the apparatus that has a platen either permanently in a platen down position or is transferable from a platen up position to the platen down position. The wafer is positioned over the platen so as not to contact the platen and provide a gap between the platen and wafer. The gap may be generated by positioning the platen in a platen down position. A plasma flows into the gap to enable the simultaneous removal of material from the wafer front side, backside and edges. The apparatus may include a single processing station having the gap residing therein, or the apparatus may include a plurality of processing stations, each capable of forming the gap therein for simultaneously removing additional material from the wafer front side, backside and edges.

Abstract: Systems and methods employ functional instruments to close incisions and wounds using a suture knot in combination with a biocompatible material composition. The systems and methods are well suited for use, for example, at a vascular puncture site following a vascular access procedure.

Abstract: Provided herein are methods and apparatus of hydrogen-based photoresist strip operations that reduce dislocations in a silicon wafer or other substrate. According to various embodiments, the hydrogen-based photoresist strip methods can employ one or more of the following techniques: 1) minimization of hydrogen budget by using short processes with minimal overstrip duration, 2) providing dilute hydrogen, e.g., 2%-16% hydrogen concentration, 3) minimization of material loss by controlling process conditions and chemistry, 4) using a low temperature resist strip, 5) controlling implant conditions and concentrations, and 6) performing one or more post-strip venting processes. Apparatus suitable to perform the photoresist strip methods are also provided.

Abstract: A biocompatible, self-supporting, curved, collagen membrane adapted to be secured by bone tacks or bone screws over exposed bone at a desired bone graft site in the alveolar ridge of a patient such that the membrane defines a space having a predetermined height and width over the exposed bone, in which the membrane maintains its structural integrity for at least 4 months after implantation at the bone graft site and then naturally breaks down and is resorbed by the patient's body, a method of making such a membrane, and a method of using such a membrane for vertical augmentation of the alveolar ridge of the patient.

Abstract: A multi-processor architecture for a network device that includes a plurality of barrel cards, each including: a plurality of processors, a PCIe switch coupled to each of the plurality of processors, and packet processing logic coupled to the PCIe switch. The PCIe switch on each barrel card provides high speed flexible data paths for the transmission of incoming/outgoing packets to/from the processors on the barrel card. An external PCIe switch is commonly coupled to the PCIe switches on the barrel cards, as well as to a management processor, thereby providing high speed connections between processors on separate barrel cards, and between the management processor and the processors on the barrel cards.