Abstract: A voltage multiplier includes a supply voltage, at least two multiplier stages electrically connected together, each stage having a trigger voltage terminal, an input terminal, an output terminal, and a capacitor, and each stage connected to the supply voltage, an input stage electrically connected to a first of the at least two multiplier stages, and an output stage electrically connected to a final of the at least two multiplier stages.

Abstract: A mechanical method for producing micro-scale and nano-scale textures that facilitates, for example, the cost-effective production of nanostructures on large-scale substrates, e.g., during the large-scale production of thin-film solar cells. A “scratcher” (multi-pointed abrasion mechanism) is maintained in a precise position relative to a target substrate such that micron-level features (protrusions) extending from the scratcher's base structure are precisely positioned to contact a surface material layer of the target substrate with a predetermined amount of force, and then moved relative to the substrate (e.g., by way of a conveying mechanism) while maintaining the pressing force such that the micron-level features define elongated parallel nano-scale grooves and/or form nano-scale ridges in the surface material layer (i.e., by mechanically displacing) portions of the surface material layer to form the nano-scale grooves/ridges).

Abstract: A memory circuit has a ferroelectric memory cell having a word line and a bit line, an input transistor connected to the bit line, a gain element electrically connected the bit line, wherein the gain element includes a feedback capacitor, and an output terminal. A method of reading a memory cell includes applying a voltage to a word line of the memory cell, causing charge to transfer from the memory cell to a feedback capacitor, generating a voltage, amplifying the voltage by applying a gain having a magnitude of less than three, sensing an output voltage at an output node to determine a state of the memory cell, and storing the memory state in a latch.

Abstract: A voltage multiplier includes a supply voltage, at least two multiplier stages electrically connected together, each stage having a trigger voltage terminal, an input terminal, an output terminal, and a capacitor, and each stage connected to the supply voltage, an input stage electrically connected to a first of the at least two multiplier stages, and an output stage electrically connected to a final of the at least two multiplier stages.

Abstract: A heat switch has a first contact, a plug of thermally conductive material, and a mechanical actuator attached to the plug of thermally conductive material, the mechanical actuator arranged to move the plug into contact with the first contact in a first position and to move the plug out of contact with the first contact in a second position responsive to an input signal.

Abstract: A method for generating a microchannel heat pipe on a substrate surface includes co-extruding a primary material and a secondary material such that the primary material forms side walls that are spaced apart by the secondary material to form a composite structure. After the primary material hardens, the secondary material is removed, whereby the hardened primary material forms a pipe body structure having an elongated central channel defined between opposing end openings. A working fluid is then inserted into the elongated central channel, and sealing structures are then formed over both end openings to encapsulate the working fluid. The co-extrusion process is modified such that the side and upper walls are self-formed either while flowing inside a co-extrusion printhead, or immediately upon exiting the printhead.

Abstract: A pulse generator circuit is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator.

Abstract: A method for generating a microchannel heat pipe on a substrate surface includes co-extruding a primary material and a secondary material such that the primary material forms side walls that are spaced apart by the secondary material to form a composite structure. After the primary material hardens, the secondary material is removed, whereby the hardened primary material forms a pipe body structure having an elongated central channel defined between opposing end openings. A working fluid is then inserted into the elongated central channel, and sealing structures are then formed over both end openings to encapsulate the working fluid.

Abstract: A thermal switch has a first substrate, a thermally conductive region on the first substrate, a thermally insulative region on the first substrate adjacent the thermally conductive region, a second substrate arranged adjacent the first substrate, a droplet of thermally conductive liquid between the first and second substrate adjacent the thermally conductive region and the thermally insulative region, and an actuator arranged on one of the first or second substrates to cause the droplet to move between the thermally conductive region and the thermally insulative region on the first substrate.

Abstract: A pulse generator circuit with ferroelectric memory element is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator. The ferroelectric memory element is coupled to the output node such that a pulse on the output node may change a state of the ferroelectric memory element.

Abstract: Ferroelectric memory cell configurations, a system for controlling writing and reading to those configurations and a method for employing those configurations for writing and reading ferroelectric memories are provided. Ferroelectric memory cells according to the disclosed configurations are read without disturbing the stored data, i.e., not requiring any modification of the stored polarization state of the ferroelectric memory cell to read the stored data, thus providing a “non-destructive” reading process. Ferroelectric memory cells are read without requiring that a charge or sense amplifier be a part of the ferroelectric memory cell. Various transistor configurations provide a capability to read a signal effect through a transistor channel as an indication of capacitance of a ferroelectric memory cell polarization state.

Abstract: A system and method are provided for reading ferroelectric memories in a manner that does away with a conventional requirement for inclusion of a charge or sense amplifier associated with each ferroelectric memory cell. Simple circuits are employed for modulating an AC signal that is generated and input, including wirelessly, to the circuits where a capacitance of a ferroelectric capacitor acts as a filter. Depending upon whether the ferroelectric memory (capacitor) is charged or discharged, it will have a different capacitance, which will affect the impedance that the signal sees. An ability to remotely read that signal difference, as an indication of capacitance, rather than an indication of charge, is provided to expand the use of ferroelectric memories to a broader spectrum of applications including use in RFID tags.

Abstract: A pulse generator circuit is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator.

Abstract: A pulse generator circuit with ferroelectric memory element is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator.

Abstract: A pulse generator circuit is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator.

Abstract: Multiple thin film transistors are aligned in serial and parallel orientation. A second source region is disposed between a first source region and a first drain region. A second drain region is disposed between the first source region and the first drain region. The second drain region and the second source region substantially coincide. A first gate is disposed between the first source region and the coinciding second source and second drain regions. A second gate region is disposed between the first drain region and the coinciding second source and second drain regions. An semiconductor is disposed between the first source region, the first drain region, and the coinciding second source and second drain regions. A dielectric material is disposed between the semiconductor substrate and the first and second gates.

Abstract: A centralized server-based system and method for managing and reserving parking spaces capable of charging an EV, that is, a plug-in hybrid or fully electric vehicle, treats sets of parking spaces as interchangeable pooled resources. An EV motorist can book a reservation with charging of the EV by specifying parking in a desired location. Parking spaces serve dual uses for parking alone or parking with charging. The parking spaces are handled as a common parking pool, such as on one side of a city block, and each space has equal access to a charging station. The server determines charging capacity availability within a time window and the motorist can choose a parking time up to or beyond, if permitted, the maximum charging time needed to charge the EV. Non-EV motorists can similarly reserve parking within a parking pool with the server ensuring optimal use of charging capacity and parking spaces.

Abstract: A system and method are provided for reading ferroelectric memories in a manner that does away with a conventional requirement for inclusion of a charge or sense amplifier associated with each ferroelectric memory cell. Simple circuits are employed for modulating an AC signal that is generated and input, including wirelessly, to the circuits where a capacitance of a ferroelectric capacitor acts as a filter. Depending upon whether the ferroelectric memory (capacitor) is charged or discharged, it will have a different capacitance, which will affect the impedance that the signal sees. An ability to remotely read that signal difference, as an indication of capacitance, rather than an indication of charge, is provided to expand the use of ferroelectric memories to a broader spectrum of applications including use in RFID tags.

Abstract: Ferroelectric memory cell configurations, a system for controlling writing and reading to those configurations and a method for employing those configurations for writing and reading ferroelectric memories are provided. Ferroelectric memory cells according to the disclosed configurations are read without disturbing the stored data, i.e., not requiring any modification of the stored polarization state of the ferroelectric memory cell to read the stored data, thus providing a “non-destructive” reading process. Ferroelectric memory cells are read without requiring that a charge or sense amplifier be a part of the ferroelectric memory cell. Various transistor configurations provide a capability to read a signal effect through a transistor channel as an indication of capacitance of a ferroelectric memory cell polarization state.

Abstract: A device has a passive cooling device having a surface, at least one active cooling device on the surface of the passive cooling device, and a thermal switch coupled to the passive cooling device, the switch having a first position that connects the active cooling device to a path of high thermal conductivity and a second position that connects the passive cooling device to the path of high thermal conductivity.