Patents by Inventor David H. Gracias

David H. Gracias has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140191524
    Abstract: A lithographically structured device has an actuation layer and a control layer operatively connected to the actuation layer. The actuation layer includes a stress layer and a neutral layer that is constructed of materials and with a structure such that it stores torsional energy upon being constructed. The control layer is constructed to maintain the actuation layer substantially in a first configuration in a local environmental condition and is responsive to a change in the local environmental condition such that it permits a release of stored torsional energy to cause a change in a structural configuration of the lithographically structured device to a second configuration, the control layer thereby providing a trigger mechanism. The lithographically structured device has a maximum dimension that is less than about 10 mm when it is in the second configuration.
    Type: Application
    Filed: March 12, 2014
    Publication date: July 10, 2014
    Applicant: The Johns Hopkins University
    Inventors: DAVID H. GRACIAS, Timothy G. Leong
  • Patent number: 8709829
    Abstract: The present invention relates to a nanoscale or microscale particle for encapsulation and delivery of materials or substances, including, but not limited to, cells, drugs, tissue, gels and polymers contained within the particle, with subsequent release of the therapeutic materials in situ, methods of fabricating the particle by folding a 2D precursor into the 3D particle, and the use of the particle in in-vivo or in-vitro applications The particle can be in any polyhedral shape and its surfaces can have either no perforations or nano/microscale perforations The particle is coated with a biocompatible metal, e g gold, or polymer e g parvlene, layer and the surfaces and hinges of the particle are made of any metal or polymer combinations.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: April 29, 2014
    Assignee: The Johns Hopkins University
    Inventors: David H. Gracias, Timothy Gar-Ming Leong, Hongke Ye
  • Publication number: 20130210148
    Abstract: A method of producing curved, folded or reconfigurable structures includes providing a polymer film, exposing the polymer film to at least one of patterned radiation or patterned chemical contact, and conditioning the polymer film subsequent to the exposing. The polymer film includes a polymer that is active to cross-linking of polymer chains in response to the exposing. The exposing is performed such that at least one exposed region of the polymer film develops a gradient in an amount of cross-linking of polymer chains along a cross-sectional direction of the polymer film, and the conditioning of the polymer film removes uncross-linked polymer chains to provide a curved, folded or reconfigurable structure.
    Type: Application
    Filed: October 25, 2011
    Publication date: August 15, 2013
    Applicant: The Johns Hopkins University
    Inventors: David H. Gracias, Mustapha Jamal
  • Publication number: 20130116541
    Abstract: The present invention relates to a nanoscale or microscale particle for encapsulation and delivery of materials or substances, including, but not limited to, cells, drugs, tissue, gels and polymers contained within the particle, with subsequent release of the therapeutic materials in situ, methods of fabricating the particle by folding a 2D precursor into the 3D particle, and the use of the particle in in-vivo or in-vitro applications The particle can be in any polyhedral shape and its surfaces can have either no perforations or nano/microscale perforations The particle is coated with a biocompatible metal, e g gold, or polymer e g parvlene, layer and the surfaces and hinges of the particle are made of any metal or polymer combinations.
    Type: Application
    Filed: August 20, 2012
    Publication date: May 9, 2013
    Applicant: JOHNS HOPKINS UNIVERSITY
    Inventors: David H. Gracias, Timothy Gar-Ming Leong, Hongke Ye
  • Publication number: 20130095258
    Abstract: An array structure includes a plurality of containers arranged in a predetermined pattern. Each container of the plurality of containers has a maximum outer dimension that is less than about 1 cm, and each container of the plurality of containers has a substantially predetermined porosity.
    Type: Application
    Filed: June 24, 2011
    Publication date: April 18, 2013
    Applicant: The Johns Hopkins University
    Inventors: David H. Gracias, Yevgeniy Vladimirovich Kalinin, Christina Lee Randall
  • Publication number: 20130045530
    Abstract: A sub-centimeter structure includes a first structural component, a second structural component arranged proximate the first structural component, and a joint connecting the first and second structural components. The joint includes a material that has a first phase that is substantially rigid to hold the first and second structural components in a substantially rigid configuration while the material is in the first phase. The material of the joint has a second phase such that the joint is at least partially fluid to allow the first and second structural components to move relative to each other while the material is in the second phase. The joint interacts with the first and second structural components while the material is in the second phase to cause the first and second structural components to move relative to each other. And, the first and second structural components include a polymer.
    Type: Application
    Filed: April 27, 2011
    Publication date: February 21, 2013
    Applicant: THE JOHN HOPKINS UNIVERSITY
    Inventors: David H. Gracias, Anum Azam
  • Patent number: 8246917
    Abstract: The present invention relates to a nanoscale or microscale particle for encapsulation and delivery of materials or substances, including, but not limited to, cells, drugs, tissue, gels and polymers contained within the particle, with subsequent release of the therapeutic materials in situ, methods of fabricating the particle by folding a 2D precursor into the 3D particle, and the use of the particle in in-vivo or in-vitro applications The particle can be in any polyhedral shape and its surfaces can have either no perforations or nano/microscale perforations The particle is coated with a biocompatible metal, e g gold, or polymer e g parvlene, layer and the surfaces and hinges of the particle are made of any metal or polymer combinations.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: August 21, 2012
    Assignee: Johns Hopkins University
    Inventors: David H. Gracias, Timothy Gar-Ming Leong, Hongke Ye
  • Patent number: 8236259
    Abstract: The present invention relates to a nanoscale or microscale container for encapsulation and delivery of materials or substances, including, but not limited to, cells, drugs, tissue, gels and polymers contained within the container, with subsequent release of the therapeutic materials in situ, methods of fabricating the container by folding a 2D precursor into the 3D container, and the use of the container in in-vivo or in-vitro applications. The container can be in any polyhedral shape and its surfaces can have either no perforations or nano/microscale perforations. The container is coated with a biocompatible metal, e.g. gold, or polymer, e.g. parylene, layer and the surfaces and hinges of the container are made of any metal or polymer combinations.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: August 7, 2012
    Assignee: Johns Hopkins University
    Inventors: David H. Gracias, Barjor Gimi, Zaver M Bhujwalla
  • Publication number: 20120135237
    Abstract: The self-assembly of polyhedral nanostructures having at least one dimension of about 100 nm to about 900 nm with electron-beam lithographically patterned surfaces is provided. The presently disclosed three-dimensional nanostructures spontaneous assemble from two-dimensional, tethered panels during plasma or wet chemical etching of the underlying silicon substrate. Any desired surface pattern with a width as small as fifteen nanometers can be precisely defined in all three dimensions. The formation of curving, continuous nanostructures using extrinsic stress also is disclosed.
    Type: Application
    Filed: April 28, 2010
    Publication date: May 31, 2012
    Applicant: THE JOHNS HOPKINS UNIVERSITY
    Inventors: David H. Gracias, Jeong-Hyun Cho
  • Patent number: 7724541
    Abstract: Techniques for self assembly of macro-scale objects, optionally defining electrical circuitry, are described, as well as articles formed by self assembly. Components can be joined, during self-assembly by minimization of free energy, capillary attraction, or a combination.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: May 25, 2010
    Assignee: President and Fellows of Harvard College
    Inventors: David H. Gracias, Joe Tien, George M. Whitesides
  • Publication number: 20090311190
    Abstract: The present invention relates to a nanoscale or microscale particle for encapsulation and delivery of materials or substances, including, but not limited to, cells, drugs, tissue, gels and polymers contained within the particle, with subsequent release of the therapeutic materials in situ, methods of fabricating the particle by folding a 2D precursor into the 3D particle, and the use of the particle in in-vivo or in-vitro applications The particle can be in any polyhedral shape and its surfaces can have either no perforations or nano/microscale perforations The particle is coated with a biocompatible metal, e g gold, or polymer e g parvlene, layer and the surfaces and hinges of the particle are made of any metal or polymer combinations.
    Type: Application
    Filed: June 25, 2007
    Publication date: December 17, 2009
    Applicant: JOHNS HOPKINS UNIVERSITY
    Inventors: David H. Gracias, Timothy Gar-Ming Leong, Hongke Ye
  • Patent number: 7268075
    Abstract: Embodiments of the present invention provide methods to reduce the copper line roughness for increased electrical conductivity in narrow interconnects having a width of less than 100 nm. These methods reduce the copper line roughness by first smoothing the surface on which the copper lines are formed by performing a short electrochemical etch of the surface. The electrical conductivity of the interconnects is increased by reducing the copper line roughness that in turn reduces the resistivity of the copper lines.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: September 11, 2007
    Assignee: Intel Corporation
    Inventors: David H. Gracias, Chih-I Wu
  • Patent number: 7238604
    Abstract: A thin hard mask is formed over a semiconductor substrate. The thin hard mask allows diffusion of a sacrificial material or pore-forming agent therethrough to form an underlying air gap or porous dielectric region. The thin hard mask may be a polymer or an initially porous material that may be later densified. The thin hard mask may be used to prevent etch steps used in forming an unlanded via from reaching layers below the hard mask.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: July 3, 2007
    Assignee: Intel Corporation
    Inventors: Grant M. Kloster, Kevin P. O'Brien, David H. Gracias, Hyun-Mog Park, Vijayakumar S. Ramachandrarao
  • Patent number: 7239019
    Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: July 3, 2007
    Assignee: Intel Corporation
    Inventors: Jihperng Leu, Grant M. Kloster, David H. Gracias, Lee D. Rockford, Peter K. Moon, Chris E. Barns
  • Patent number: 7208455
    Abstract: Methods and solutions for forming self assembled organic monolayers that are covalently bound to metal interfaces are presented along with a device containing a self assembled organic monolayer. Embodiments of the present invention utilize self assembled thiolate monolayers to prevent the electromigration and surface diffusion of copper atoms while minimizing the resistance of the interconnect lines. Self assembled thiolate monolayers are used to cap the copper interconnect lines and chemically hold the copper atoms at the top of the lines in place, thus preventing surface diffusion. The use of self assembled thiolate monolayers minimizes the resistance of copper interconnect lines because only a single monolayer of approximately 10 ? and 20 ? in thickness is used.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: April 24, 2007
    Assignee: Intel Corporation
    Inventor: David H. Gracias
  • Patent number: 7205663
    Abstract: Methods and solutions for forming self assembled organic monolayers that are covalently bound to metal interfaces are presented along with a device containing a self assembled organic monolayer. Embodiments of the present invention utilize self assembled thiolate monolayers to prevent the electromigration and surface diffusion of copper atoms while minimizing the resistance of the interconnect lines. Self assembled thiolate monolayers are used to cap the copper interconnect lines and chemically hold the copper atoms at the top of the lines in place, thus preventing surface diffusion. The use of self assembled thiolate monolayers minimizes the resistance of copper interconnect lines because only a single monolayer of approximately 10 ? and 20 ? in thickness is used.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: April 17, 2007
    Assignee: Intel Corporation
    Inventor: David H. Gracias
  • Patent number: 7179757
    Abstract: Processing problems associated with porous low-k dielectric materials are often severe. Exposure of low-k materials to plasma during feature etching, ashing, and priming steps has deleterious consequences. For porous, silicon-based low-k dielectric materials, the plasma depletes a surface organic group, raising the dielectric constant of the material. In the worst case, the damaged dielectric is destroyed during the wet etch removal of the antireflective coating in the via-first copper dual-damascene integration scheme. This issue is addressed by exposing the dielectric to silane coupling agents at various stages of etching and cleaning. Chemical reactions with the silane coupling agent both replenish the dielectric surface organic group and passivate the dielectric surface relative to the surface of the antireflective coating.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: February 20, 2007
    Assignee: Intel Corporation
    Inventors: Vijayakumar S. RamachandraRao, David H. Gracias
  • Patent number: 7175680
    Abstract: Methods and solutions for forming self assembled organic monolayers that are covalently bound to metal interfaces are presented along with a device containing a self assembled organic monolayer. Embodiments of the present invention utilize self assembled thiolate monolayers to prevent the electromigration and surface diffusion of copper atoms while minimizing the resistance of the interconnect lines. Self assembled thiolate monolayers are used to cap the copper interconnect lines and chemically hold the copper atoms at the top of the lines in place, thus preventing surface diffusion. The use of self assembled thiolate monolayers minimizes the resistance of copper interconnect lines because only a single monolayer of approximately 10 ? and 20 ? in thickness is used.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: February 13, 2007
    Assignee: Intel Corporation
    Inventor: David H. Gracias
  • Patent number: 7018918
    Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: March 28, 2006
    Assignee: Intel Corporation
    Inventors: Grant M. Kloster, Kevin P. O'brien, Michael D. Goodner, Jihperng Leu, David H. Gracias, Lee D. Rockford, Peter K. Moon, Chris E. Barns
  • Patent number: 7007370
    Abstract: Techniques for self assembly of macro-scale objects, optionally defining electrical circuitry, are described, as well as articles formed by self assembly. Components can be joined, during self-assembly by minimization of free energy, capillary attraction, or a combination.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: March 7, 2006
    Assignee: President and Fellows of Harvard College
    Inventors: David H. Gracias, Joe Tien, George M. Whitesides