Patents by Inventor David L. Harmon
David L. Harmon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240131013Abstract: The present disclosure provides tetrahydro-1H-pyrido[3,4-b]indole compounds or a pharmaceutically acceptable salt, solvate, hydrate, prodrug, stereoisomer, tautomer, rotamer, N-oxide and/or substituted derivative or, optionally in a pharmaceutical composition, for the modulation of disorders mediated by estrogen, or other disorders as more fully described herein.Type: ApplicationFiled: May 1, 2023Publication date: April 25, 2024Inventors: David C. Myles, Peter J. Kushner, Cyrus L. Harmon
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Patent number: 10968619Abstract: A construction technique, for example for residential, light commercial and multifamily building construction, involving pre-fabricated elements. The elements include prefabricated structural components and prefabricated surface components. A technique of incremental building includes assembling a building structure using these pre-fabricated elements.Type: GrantFiled: July 12, 2019Date of Patent: April 6, 2021Inventor: David L. Harmon
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Publication number: 20200018057Abstract: A construction technique, for example for residential, light commercial and multifamily building construction, involving pre-fabricated elements. The elements include prefabricated structural components and prefabricated surface components. A technique of incremental building includes assembling a building structure using these pre-fabricated elements.Type: ApplicationFiled: July 12, 2019Publication date: January 16, 2020Inventor: David L. Harmon
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Patent number: 8796108Abstract: Disclosed is a Zener diode having a scalable reverse-bias breakdown voltage (Vb) as a function of the position of a cathode contact region relative to the interface between adjacent cathode and anode well regions. Specifically, cathode and anode contact regions are positioned adjacent to corresponding cathode and anode well regions and are further separated by an isolation region. However, while the anode contact region is contained entirely within the anode well region, one end of the cathode contact region extends laterally into the anode well region. The length of this end can be predetermined in order to selectively adjust the Vb of the diode (e.g., increasing the length reduces Vb of the diode and vice versa). Also disclosed are an integrated circuit, incorporating multiple instances of the diode with different reverse-bias breakdown voltages, a method of forming the diode and a design structure for the diode.Type: GrantFiled: July 19, 2013Date of Patent: August 5, 2014Assignee: International Business Machines CorporationInventors: Frederick G. Anderson, Natalie B. Feilchenfeld, David L. Harmon, Richard A. Phelps, Yun Shi, Michael J. Zierak
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Publication number: 20130299938Abstract: Disclosed is a Zener diode having a scalable reverse-bias breakdown voltage (Vb) as a function of the position of a cathode contact region relative to the interface between adjacent cathode and anode well regions. Specifically, cathode and anode contact regions are positioned adjacent to corresponding cathode and anode well regions and are further separated by an isolation region. However, while the anode contact region is contained entirely within the anode well region, one end of the cathode contact region extends laterally into the anode well region. The length of this end can be predetermined in order to selectively adjust the Vb of the diode (e.g., increasing the length reduces Vb of the diode and vice versa). Also disclosed are an integrated circuit, incorporating multiple instances of the diode with different reverse-bias breakdown voltages, a method of forming the diode and a design structure for the diode.Type: ApplicationFiled: July 19, 2013Publication date: November 14, 2013Inventors: Frederick G. Anderson, Natalie B. Feilchenfeld, David L. Harmon, Richard A. Phelps, Yun Shi, Michael J. Zierak
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Patent number: 8492866Abstract: Disclosed is a Zener diode having a scalable reverse-bias breakdown voltage (Vb) as a function of the position of a cathode contact region relative to the interface between adjacent cathode and anode well regions. Specifically, cathode and anode contact regions are positioned adjacent to corresponding cathode and anode well regions and are further separated by an isolation region. However, while the anode contact region is contained entirely within the anode well region, one end of the cathode contact region extends laterally into the anode well region. The length of this end can be predetermined in order to selectively adjust the Vb of the diode (e.g., increasing the length reduces Vb of the diode and vice versa). Also disclosed are an integrated circuit, incorporating multiple instances of the diode with different reverse-bias breakdown voltages, a method of forming the diode and a design structure for the diode.Type: GrantFiled: January 9, 2012Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Frederick G. Anderson, Natalie B. Feilchenfeld, David L. Harmon, Richard A. Phelps, Yun Shi, Michael J. Zierak
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Patent number: 8486796Abstract: A method of forming a semiconductor structure includes: forming a resistor over a substrate; forming at least one first contact in contact with the resistor; and forming at least one second contact in contact with the resistor. The resistor is structured and arranged such that current flows from the at least one first contact to the at least one second contact through a central portion of the resistor. The resistor includes at least one extension extending laterally outward from the central portion in a direction parallel to the current flow. The method includes sizing the at least one extension based on a thermal diffusion length of the resistor.Type: GrantFiled: November 19, 2010Date of Patent: July 16, 2013Assignee: International Business Machines CorporationInventors: David L. Harmon, Joseph M. Lukaitis, Stewart E. Rauch, III, Robert R. Robison, Dustin K. Slisher, Jeffrey H. Sloan, Timothy D. Sullivan, Kimball M. Watson
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Publication number: 20130175656Abstract: Disclosed is a Zener diode having a scalable reverse-bias breakdown voltage (Vb) as a function of the position of a cathode contact region relative to the interface between adjacent cathode and anode well regions. Specifically, cathode and anode contact regions are positioned adjacent to corresponding cathode and anode well regions and are further separated by an isolation region. However, while the anode contact region is contained entirely within the anode well region, one end of the cathode contact region extends laterally into the anode well region. The length of this end can be predetermined in order to selectively adjust the Vb of the diode (e.g., increasing the length reduces Vb of the diode and vice versa). Also disclosed are an integrated circuit, incorporating multiple instances of the diode with different reverse-bias breakdown voltages, a method of forming the diode and a design structure for the diode.Type: ApplicationFiled: January 9, 2012Publication date: July 11, 2013Applicant: International Business Machines CorporationInventors: Frederick G. Anderson, Natalie B. Feilchenfeld, David L. Harmon, Richard A. Phelps, Yun Shi, Michael J. Zierak
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Patent number: 8480302Abstract: The present invention provides a micro-electro-mechanical-system (MEMS) temperature sensor that employs a suspended spiral comprising a material with a positive coefficient of thermal expansion. The thermal expansion of the suspended spiral is guided to by a set of guideposts to provide a linear movement of the free end of the suspended spiral, which is converted to an electrical signal by a set of conductive rotor azimuthal fins that are interdigitated with a set of conductive stator azimuthal fins by measuring the amount of capacitive coupling therebetween. Real time temperature may thus be measured through the in-situ measurement of the capacitive coupling. Optionally, the MEMS temperature sensor may have a ratchet and a pawl to enable ex-situ measurement.Type: GrantFiled: September 28, 2010Date of Patent: July 9, 2013Assignee: International Business Machines CorporationInventors: Jason P. Gill, David L. Harmon, Timothy D. Sullivan
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Publication number: 20120126370Abstract: A method of forming a semiconductor structure includes: forming a resistor over a substrate; forming at least one first contact in contact with the resistor; and forming at least one second contact in contact with the resistor. The resistor is structured and arranged such that current flows from the at least one first contact to the at least one second contact through a central portion of the resistor. The resistor includes at least one extension extending laterally outward from the central portion in a direction parallel to the current flow. The method includes sizing the at least one extension based on a thermal diffusion length of the resistor.Type: ApplicationFiled: November 19, 2010Publication date: May 24, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David L. HARMON, Joseph M. LUKAITIS, Stewart E. RAUCH, III, Robert R. ROBISON, Dustin K. SLISHER, Jeffrey H. SLOAN, Timothy D. SULLIVAN, Kimball M. WATSON
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Publication number: 20120076172Abstract: The present invention provides a micro-electro-mechanical-system (MEMS) temperature sensor that employs a suspended spiral comprising a material with a positive coefficient of thermal expansion. The thermal expansion of the suspended spiral is guided to by a set of guideposts to provide a linear movement of the free end of the suspended spiral, which is converted to an electrical signal by a set of conductive rotor azimuthal fins that are interdigitated with a set of conductive stator azimuthal fins by measuring the amount of capacitive coupling therebetween. Real time temperature may thus be measured through the in-situ measurement of the capacitive coupling. Optionally, the MEMS temperature sensor may have a ratchet and a pawl to enable ex-situ measurement.Type: ApplicationFiled: September 28, 2010Publication date: March 29, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jason P. Gill, David L. Harmon, Timothy D. Sullivan
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Patent number: 7511378Abstract: An electronic structure having wiring, and an associated method of designing the structure, for limiting a temperature gradient in the wiring. The electronic structure includes a substrate having a layer that includes a first and second wire which do not physically touch each other. The first and second wires are adapted to be at an elevated temperature due to Joule heating in relation to electrical current density in the first and second wires. The first wire is electrically and thermally coupled to the second wire by an electrically and thermally conductive structure that exists outside of the layer. The width of the second wire is tailored so as to limit a temperature gradient in the first wire to be below a threshold value that is predetermined to be sufficiently small so as to substantially mitigate adverse effects of electromigration in the first wire.Type: GrantFiled: May 30, 2006Date of Patent: March 31, 2009Assignee: International Business Machines CorporationInventors: Jason P. Gill, David L. Harmon, Deborah M. Massey, Alvin W. Strong, Timothy D. Sullivan, Junichi Furukawa
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Patent number: 7132318Abstract: Disclosed is a method and structure for altering an integrated circuit design having silicon over insulator (SOI) transistors. The method/structure prevents damage from charging during processing to the gate of SOI transistors by tracing electrical nets in the integrated circuit design, identifying SOI transistors that may have a voltage differential between the source/drain and gate as potentially damaged SOI transistors (based on the tracing of the electrical nets), and connecting a shunt device across the source/drain and the gate of each of the potentially damaged SOI transistors. Alternatively, the method/structure provides for connecting compensating conductors through a series device.Type: GrantFiled: December 4, 2004Date of Patent: November 7, 2006Assignee: International Business Machines CorporationInventors: Henry A. Bonges, III, David L. Harmon, Terence B. Hook, Wing L. Lai
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Patent number: 7096450Abstract: An electronic structure having wiring, and an associated method of designing the structure, for limiting a temperature gradient in the wiring. The electronic structure includes a substrate having a layer that includes a first and second wire which do not physically touch each other. The first and second wires are adapted to be at an elevated temperature due to Joule heating in relation to electrical current density in the first and second wires. The first wire is electrically and thermally coupled to the second wire by an electrically and thermally conductive structure that exists outside of the layer. The width of the second wire is tailored so as to limit a temperature gradient in the first wire to be below a threshold value that is predetermined to be sufficiently small so as to substantially mitigate adverse effects of electromigration in the first wire.Type: GrantFiled: June 28, 2003Date of Patent: August 22, 2006Assignee: International Business Machines CorporationInventors: Jason P. Gill, David L. Harmon, Deborah M. Massey, Alvin W. Strong, Timothy D. Sullivan, Junichi Furukawa
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Patent number: 7067886Abstract: A method and structure alters an integrated circuit design having silicon over insulator (SOI) transistors. The method/structure prevents damage from charging during processing to the gate of SOI transistors by tracing electrical nets in the integrated circuit design, identifying SOI transistors that have a voltage differential between the source/drain and gate as potentially damaged SOI transistors (based on the tracing of the electrical nets), and connecting a shunt device across the source/drain and the gate of each of the potentially damaged SOI transistors. Alternatively, the method/structure provides for connecting compensating conductors through a series device.Type: GrantFiled: November 4, 2003Date of Patent: June 27, 2006Assignee: International Business Machines CorporationInventors: Henry A. Bonges, III, David L. Harmon, Terence B. Hook, Wing L. Lai
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Publication number: 20040262031Abstract: An electronic structure having wiring, and an associated method of designing the structure, for limiting a temperature gradient in the wiring. The electronic structure includes a substrate having a layer that includes a first and second wire which do not physically touch each other. The first and second wires are adapted to be at an elevated temperature due to Joule heating in relation to electrical current density in the first and second wires. The first wire is electrically and thermally coupled to the second wire by an electrically and thermally conductive structure that exists outside of the layer. The width of the second wire is tailored so as to limit a temperature gradient in the first wire to be below a threshold value that is predetermined to be sufficiently small so as to substantially mitigate adverse effects of electromigration in the first wire.Type: ApplicationFiled: June 28, 2003Publication date: December 30, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jason P. Gill, David L. Harmon, Deborah M. Massey, Alvin W. Strong, Timothy D. Sullivan, Junichi Furukawa
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Patent number: 5618379Abstract: Disclosed is a process for depositing a conformal polymer coating on selected areas of a silicon substrate. The substrate is first exposed through a mask to a gaseous plasma so as to form a film of desired pattern, the plasma comprising a compound having strong electron donating characteristics. Then, the patterned film and the remaining substrate not covered by the film are exposed to the vapor of a monomer, which condenses and polymerizes on the exposed substrate surfaces, but not on the film. The film serves to inhibit substantial deposition of the coating, so as to provide a selective deposition, where the coating is formed only on those areas of the substrate where desired.Type: GrantFiled: April 1, 1991Date of Patent: April 8, 1997Assignee: International Business Machines CorporationInventors: Michael D. Armacost, Steven A. Grundon, David L. Harmon, Son V. Nguyen, John F. Rembetski
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Patent number: 5539154Abstract: A plasma enhanced chemical vapor deposition process for producing a fluorinated silicon nitride film on a substrate is disclosed. The process utilizes a mixture of silane, perfluorosilane and nitrogen to produce films of high conformality and stability. The silane and perfluorosilane in the mixture are in a ratio of 0.05 to 1 on a volume basis. The preferred silane is SiH.sub.4 and the preferred perfluorosilane is SiF.sub.4. Films prepared by the process are disclosed and their properties are described.Type: GrantFiled: April 27, 1995Date of Patent: July 23, 1996Assignee: International Business Machines CorporationInventors: Son V. Nguyen, David M. Dobuzinsky, Douglas J. Dopp, David L. Harmon
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Patent number: 5462812Abstract: A plasma enhanced chemical vapor deposition process for producing a fluorinated silicon nitride film on a substrate is disclosed. The process utilizes a mixture of silane, perfluorosilane and nitrogen to produce films of high conformality and stability. The silane and perfluorosilane in the mixture are in a ratio of 0.05 to 1 on a volume basis. The preferred silane is SiH.sub.4 and the preferred perfluorosilane is SiF.sub.4. Films prepared by the process are disclosed and their properties are described.Type: GrantFiled: December 29, 1992Date of Patent: October 31, 1995Inventors: Son V. Nguyen, David M. Dobuzinsky, Douglas J. Dopp, David L. Harmon
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Patent number: D674514Type: GrantFiled: May 18, 2011Date of Patent: January 15, 2013Inventor: David L. Harmon