Abstract: A system is disclosed. The system includes a substrate, and a first chip on the substrate, where a load circuit is integrated on the first chip. The system also includes a second chip on the substrate, where a power delivery circuit is configured to deliver current to the load circuit according to a regulated voltage at a node. The power delivery circuit includes a first circuit configured to generate an error signal based at least in part on the regulated voltage, and a voltage generator including power switches configured to modify the regulated voltage according to the error signal, where the first circuit of the power delivery circuit is integrated on the first chip, and where at least a portion of the power switches of the power delivery circuit are integrated on the second chip.

Abstract: An electronic system includes a circuit board including a power plane. An integrated circuit (e.g., processor) is attached to a first side of the circuit board and is arranged to receive power from the power plane. A plurality of DC-to-DC converters are attached to a second side of the circuit board and are arranged to transfer power to the power plane. Each DC-to-DC converter includes a respective voltage sense input that is electrically connected to a separate location on the power plane. A telemetry circuit is coupled to each of the plurality of DC-to-DC converters and is configured to detect a quantity of power transferred to the common power plane from each of the plurality of power conversion devices.

Abstract: A system is disclosed. The system includes a substrate, and a first chip on the substrate, where a load circuit is integrated on the first chip. The system also includes a second chip on the substrate, where a power delivery circuit is configured to deliver current to the load circuit according to a regulated voltage at a node. The power delivery circuit includes a first circuit configured to generate an error signal based at least in part on the regulated voltage, and a voltage generator including power switches configured to modify the regulated voltage according to the error signal, where the first circuit of the power delivery circuit is integrated on the first chip, and where at least a portion of the power switches of the power delivery circuit are integrated on the second chip.

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) prefluxing the inductor then charging the capacitor causing an increased current to flow in the inductor and (2) prefluxing the inductor then discharging the capacitor causing increased current to flow in the inductor. The inductor prefluxing steps enable the circuit to provide increased output voltage and/or increased output current.

Abstract: A system is disclosed. The system includes a substrate, and a first chip on the substrate, where a load circuit is integrated on the first chip. The system also includes a second chip on the substrate, where a power delivery circuit is configured to deliver current to the load circuit according to a regulated voltage at a node. The power delivery circuit includes a first circuit configured to generate an error signal based at least in part on the regulated voltage, and a voltage generator including power switches configured to modify the regulated voltage according to the error signal, where the first circuit of the power delivery circuit is integrated on the first chip, and where at least a portion of the power switches of the power delivery circuit are integrated on the second chip.

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) prefluxing the inductor then charging the capacitor causing an increased current to flow in the inductor and (2) prefluxing the inductor then discharging the capacitor causing increased current to flow in the inductor. The inductor prefluxing steps enable the circuit to provide increased output voltage and/or increased output current.

Abstract: A system is disclosed. The system includes a substrate, and a first chip on the substrate, where a load circuit is integrated on the first chip. The system also includes a second chip on the substrate, where a power delivery circuit is configured to deliver current to the load circuit according to a regulated voltage at a node. The power delivery circuit includes a first circuit configured to generate an error signal based at least in part on the regulated voltage, and a voltage generator including power switches configured to modify the regulated voltage according to the error signal, where the first circuit of the power delivery circuit is integrated on the first chip, and where at least a portion of the power switches of the power delivery circuit are integrated on the second chip.

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) charging the capacitor causing a current to flow in the inductor and (2) discharging the capacitor causing current to flow in the inductor. The power regulator circuit may be configured to operate with zero current switching at frequencies in the range of 100 MHz, enabling it to be fabricated on a unitary silicon die along with the load that it powers.

Abstract: A power circuit is disclosed. The power circuit includes an input node, a plurality of inductors each connected to an output node, a plurality of phases each configured to provide current to one of the inductors, and a control circuit configured to trigger the phases. The phases are configured to provide current to one of the inductors in response to being triggered by the control circuit, the control circuit is configured to determine a variable time difference between a first phase being triggered and a second phase being triggered, and the time difference is based at least in part on a voltage difference between an input voltage at the input node and an output voltage at the output node.

Abstract: A power circuit is disclosed. The power circuit includes an input node, a plurality of inductors each connected to an output node, a plurality of phases each configured to provide current to one of the inductors, and a control circuit configured to trigger the phases. The phases are configured to provide current to one of the inductors in response to being triggered by the control circuit, the control circuit is configured to determine a variable time difference between a first phase being triggered and a second phase being triggered, and the time difference is based at least in part on a voltage difference between an input voltage at the input node and an output voltage at the output node.

Abstract: A system is disclosed. The system includes a substrate, and a first chip on the substrate, where a load circuit is integrated on the first chip. The system also includes a second chip on the substrate, where a power delivery circuit is configured to deliver current to the load circuit according to a regulated voltage at a node. The power delivery circuit includes a first circuit configured to generate an error signal based at least in part on the regulated voltage, and a voltage generator including power switches configured to modify the regulated voltage according to the error signal, where the first circuit of the power delivery circuit is integrated on the first chip, and where at least a portion of the power switches of the power delivery circuit are integrated on the second chip.

Abstract: Devices and techniques for controlling voltage regulation are disclosed. A voltage regulation system may include one or more loads disposed on an integrated circuit, a DC-to-DC voltage regulation device at least partially disposed on the integrated circuit, and a second device disposed external to the integrated circuit and comprising circuitry configured to communicate with the controller of the voltage regulation device. The voltage regulation device may include one or more voltage regulation modules and a controller configured to control the one or more voltage regulation modules. The one or more voltage regulation modules may be configured to supply one or more voltage levels, respectively, to the one or more loads. The controller may be configured to disable at least one of the one or more voltage regulation modules based on a determination that the second device is not suitable for use with the voltage regulation device.

Abstract: A circuit is disclosed. The circuit includes a power supply node and a system configured to receive current from the power supply node at a regulated voltage and to generate one or more control signals indicating an anticipated change in the current. The circuit also includes a voltage regulator configured to provide the current to the power supply node and to drive the power supply node with the regulated voltage, where the value of the regulated voltage is based at least in part on the one or more control signals.

Abstract: A system is disclosed. The system includes a substrate, and a first chip on the substrate, where a load circuit is integrated on the first chip. The system also includes a second chip on the substrate, where a power delivery circuit is configured to deliver current to the load circuit according to a regulated voltage at a node. The power delivery circuit includes a first circuit configured to generate an error signal based at least in part on the regulated voltage, and a voltage generator including power switches configured to modify the regulated voltage according to the error signal, where the first circuit of the power delivery circuit is integrated on the first chip, and where at least a portion of the power switches of the power delivery circuit are integrated on the second chip.

Abstract: A system is disclosed. The system includes a substrate, and a first chip on the substrate, where a load circuit is integrated on the first chip. The system also includes a second chip on the substrate, where a power delivery circuit is configured to deliver current to the load circuit according to a regulated voltage at a node. The power delivery circuit includes a first circuit configured to generate an error signal based at least in part on the regulated voltage, and a voltage generator including power switches configured to modify the regulated voltage according to the error signal, where the first circuit of the power delivery circuit is integrated on the first chip, and where at least a portion of the power switches of the power delivery circuit are integrated on the second chip.

Abstract: Devices and techniques for controlling voltage regulation are disclosed. A voltage regulation system may include one or more loads disposed on an integrated circuit, a DC-to-DC voltage regulation device at least partially disposed on the integrated circuit, and a second device disposed external to the integrated circuit and comprising circuitry configured to communicate with the controller of the voltage regulation device. The voltage regulation device may include one or more voltage regulation modules and a controller configured to control the one or more voltage regulation modules. The one or more voltage regulation modules may be configured to supply one or more voltage levels, respectively, to the one or more loads. The controller may be configured to disable at least one of the one or more voltage regulation modules based on a determination that the second device is not suitable for use with the voltage regulation device.

Abstract: A power conversion circuit includes a plurality of solid-state switches coupled between an input terminal and a ground. An output terminal is positioned between two of the plurality of solid-state switches and an inductor is coupled between the output terminal and a load. A capacitor is coupled in parallel with two of the serially connected solid-state switches. A controller controls the plurality of solid-state switches to generate a current in the inductor by repetitively (1) charging the capacitor causing a temporary increase in the current in the inductor, (2) entering a first wait state that configures the plurality of solid-state switches to maintain the capacitor in a charged state, (3) discharging the capacitor causing a temporary increase in the current in the inductor and (4) entering a second wait state that configures the plurality of solid-state switches to maintain the capacitor in a discharged state.

Abstract: A system is disclosed. The system includes a substrate, and a first chip on the substrate, where a load circuit is integrated on the first chip. The system also includes a second chip on the substrate, where a power delivery circuit is configured to deliver current to the load circuit according to a regulated voltage at a node. The power delivery circuit includes a first circuit configured to generate an error signal based at least in part on the regulated voltage, and a voltage generator including power switches configured to modify the regulated voltage according to the error signal, where the first circuit of the power delivery circuit is integrated on the first chip, and where at least a portion of the power switches of the power delivery circuit are integrated on the second chip.

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) charging the capacitor causing a current to flow in the inductor and (2) discharging the capacitor causing current to flow in the inductor. The power regulator circuit may be configured to operate with zero current switching at frequencies in the range of 100 MHz, enabling it to be fabricated on a unitary silicon die along with the load that it powers.

Abstract: A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) charging the capacitor causing an increase in current flow in the inductor followed by a decrease in current flow in the inductor and before the current flow in the inductor stops, (2) discharging the capacitor causing an increase in current flow in the inductor followed by a decrease in current flow in the inductor and before the current flow in the inductor stops, repeating (1).