Patents by Inventor David V. Caletka

David V. Caletka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6433283
    Abstract: A ribbon cable includes electrical conductors surrounded by an insulator and vent tubes positioned adjacent and parallel to the conductors and insulator. The vent tubes allow airflow between an internal area of the enclosure and an external atmosphere and prevent access to the internal area of the enclosure.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: August 13, 2002
    Assignee: International Business Machines Corporation
    Inventors: William L. Brodsky, David V. Caletka, William Infantolino
  • Patent number: 6410988
    Abstract: A method of making a flip chip package that maintains flatness over a wide temperature range and provides good heat dissipation is described. A laminate substrate is electrically connected to electrical contacts disposed on a chip and underfill material is applied between the soldered connections. A body, for example an uncured dielectric material, is applied to the chip, the laminate substrate, a thermally conductive member or combinations thereof, and thermally conductive member is disposed adjacent to the surface of the chip that is opposite the surface connected to the laminate substrate. The body is extruded between the chip and the thermally conductive member. The thickness of the thermally conductive member is determined by balancing the stiffness and the CTE of both the thermally conductive member and the laminate substrate, and the length and width of the thermally conductive member may vary but are at least the size of the corresponding length and width of the chip.
    Type: Grant
    Filed: May 15, 2000
    Date of Patent: June 25, 2002
    Assignee: International Business Machines Corporation
    Inventors: David V. Caletka, Jean Dery, Eric Duchesne, Michael A. Gaynes, Eric A. Johnson, Luis J. Matienzo, James R. Wilcox
  • Patent number: 6333551
    Abstract: A method and structure for coupling a heat conductor (e.g., heat spreader, heat sink) to a semiconductor chip. In a first embodiment, a thermally conductive shape is formed on the heat conductor, a material in an uncured or partially cured state is dispensed on the chip and on peripheral portions of the chip, and the heat conductor is applied to the material to push the thermally conductive shape into the material such that the material is redistributed to contact both the thermally conductive shape and the chip. The material is then cured (e.g., by pressurization at elevated temperature). In a second embodiment, a thermally conductive shape is formed on the chip, a material (e.g., epoxy) in an uncured or partially cured state is dispensed on the thermally conductive shape and on peripheral portions of the chip, and the heat conductor is pushed into the material to make the material contact both the thermally conductive shape and the heat conductor. The material is then cured (e.g.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: David V. Caletka, Eric A. Johnson
  • Publication number: 20010045445
    Abstract: A method and an arrangement for measuring the cooling rate and temperature differential between the top and bottom surfaces of a printed circuit board. The method is intended to facilitate control over the temperature differential which is encountered between the top and bottom of the printed circuit board so as to prevent warpage thereof during the formation of solder joints in a reflow solder oven.
    Type: Application
    Filed: March 7, 2001
    Publication date: November 29, 2001
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David V. Caletka, Kevin Knadle, Charles G. Woychik
  • Patent number: 6293455
    Abstract: A method and an arrangement for measuring the cooling rate and thermal gradient between the top and bottom surfaces of a printed circuit board. Moreover, it is intended to facilitate control over the temperature gradient which is encountered between the top and bottom of the PCB so as to prevent warpage thereof during the formation of solder joints in a reflow solder oven.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: September 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: David V. Caletka, Kevin Knadle, Charles G. Woychik
  • Publication number: 20010020541
    Abstract: A ribbon cable includes electrical conductors surrounded by an insulator and vent tubes positioned adjacent and parallel to the conductors and insulator. The vent tubes allow airflow between an internal area of the enclosure and an external atmosphere and prevent access to the internal area of the enclosure.
    Type: Application
    Filed: May 21, 2001
    Publication date: September 13, 2001
    Inventors: William L. Brodsky, David V. Caletka, William Infantolino
  • Patent number: 6274474
    Abstract: A method of forming BGA interconnections having improved fatigue life is disclosed. In particular, a combination of mask-defined and pad-defined solder joints are selectively positioned within the BGA package. The mask-defined solder joints possess a high equilibrium height, which forces the pad-defined solder joints to elongate, thereby making the pad-defined solder joints more compliant. Further, the pad-defined solder joints posses a slightly longer fatigue life because the stress concentrations found in the mask-defined solder joints are not present in the pad-defined solder joints. Therefore, the fatigue life of BGA packages is increased by implementing a majority of mask-defined solder joints to maintain a high equilibrium height, and selectively placing pad-defined solder joints in high stress areas of the BGA package.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventors: David V. Caletka, Eric A. Johnson
  • Patent number: 6268567
    Abstract: A ribbon cable includes electrical conductors surrounded by an insulator and vent tubes positioned adjacent and parallel to the conductors and insulator. The vent tubes allow airflow between an internal area of the enclosure and an external atmosphere and prevent access to the internal area of the enclosure.
    Type: Grant
    Filed: January 25, 2000
    Date of Patent: July 31, 2001
    Assignee: International Business Machines Corporation
    Inventors: William L. Brodsky, David V. Caletka, William infantolino
  • Publication number: 20010000925
    Abstract: A method of forming BGA interconnections having improved fatigue life is disclosed. In particular, a combination of mask-defined and pad-defined solder joints are selectively positioned within the BGA package. The mask-defined solder joints possess a high equilibrium height, which forces the pad-defined solder joints to elongate, thereby making the pad-defined solder joints more compliant. Further, the pad-defined solder joints posses a slightly longer fatigue life because the stress concentrations found in the mask-defined solder joints are not present in the pad-defined solder joints. Therefore, the fatigue life of BGA packages is increased by implementing a majority of mask-defined solder joints to maintain a high equilibrium height, and selectively placing pad-defined solder joints in high stress areas of the BGA package.
    Type: Application
    Filed: January 4, 2001
    Publication date: May 10, 2001
    Inventors: David V. Caletka, Eric A. Johnson
  • Patent number: 6138893
    Abstract: A method and an arrangement for measuring the cooling rate and thermal gradient between the top and bottom surfaces of a printed circuit board. Moreover, it is intended to facilitate control over the temperature gradient which is encountered between the top and bottom of the PCB so as to prevent warpage thereof during the formation of solder joints in a reflow solder oven.
    Type: Grant
    Filed: June 25, 1998
    Date of Patent: October 31, 2000
    Assignee: International Business Machines Corporation
    Inventors: David V. Caletka, Kevin Knadle, Charles G. Woychik
  • Patent number: 6104093
    Abstract: A method of making a flip chip package that maintains flatness over a wide temperature range and provides good heat dissipation is described. A laminate substrate is electrically connected to electrical contacts disposed on a chip and underfill material is applied between the soldered connections. A body, for example an uncured dielectric material, is applied to the chip, the laminate substrate, a thermally conductive member or combinations thereof, and thermally conductive member is disposed adjacent to the surface of the chip that is opposite the surface connected to the laminate substrate. The body is extruded between the chip and the thermally conductive member. The thickness of the thermally conductive member is determined by balancing the stiffness and the CTE of both the thermally conductive member and the laminate substrate, and the length and width of the thermally conductive member may vary but are at least the size of the corresponding length and width of the chip.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: August 15, 2000
    Assignee: International Business Machines Corporation
    Inventors: David V. Caletka, Jean Dery, Eric Duchesne, Michael A. Gaynes, Eric A. Johnson, Luis J. Matienzo, James R. Wilcox
  • Patent number: 5873740
    Abstract: An electrical connector assembly which utilizes a double layered elastomeric for a pressure exertion member wherein the two, individual layers are of different hardness. The first layer is of a relatively low durometer elastomeric material while the second layer is of higher durometer elastomeric material and includes several projections, e.g., for engaging a circuitized substrate such as a flexible circuit. Both layers preferably have the same spring rate, while the projections of the second layer may possess a variety of different configurations, e.g., cylindrical or boxlike. The individual projections may each include extension portions which in turn are positioned within corresponding openings within the substantially solid first layer.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: February 23, 1999
    Assignee: International Business Machines Corporation
    Inventors: David J. Alcoe, William L. Brodsky, David V. Caletka