Patents by Inventor David W. Sherrer

David W. Sherrer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160344159
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Application
    Filed: August 8, 2016
    Publication date: November 24, 2016
    Inventor: David W. Sherrer
  • Publication number: 20160336635
    Abstract: Provided are three-dimensional microstructures and their methods of formation. The microstructures are formed by a sequential build process and include microstructural elements which are affixed to one another. The microstructures find use, for example, in coaxial transmission lines for electromagnetic energy.
    Type: Application
    Filed: December 8, 2014
    Publication date: November 17, 2016
    Inventors: William D. Houck, David W. Sherrer
  • Publication number: 20160268665
    Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 15, 2016
    Inventors: David W. Sherrer, John J. Fisher
  • Publication number: 20160254583
    Abstract: Disclosed and claimed herein is a hollow core coaxial cable, having a dielectric capillary with an inside wall and an outside wall, an inner conductive layer on the inside wall of the hollow core coaxial cable and an outer conductive layer on the outside wall of the hollow core coaxial cable, the conductive layers may be patterned. Further disclosed is a method of making the hollow core coaxial cable. Further disclosed are holey fiber coaxial cables, having a holey fiber capillary having an inside wall and an outside wall, an inner conductive layer on the inside wall of the hollow core coaxial cable and an outer conductive layer on the outside wall of the hollow core coaxial cable, the conductive layers may be patterned.
    Type: Application
    Filed: July 20, 2015
    Publication date: September 1, 2016
    Applicant: Nuvotronics, LLC
    Inventors: David W. Sherrer, Noel Heiks
  • Patent number: 9410799
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: August 9, 2016
    Assignee: Nuvotronics, Inc.
    Inventor: David W Sherrer
  • Patent number: 9312589
    Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: April 12, 2016
    Assignee: NUVOTRONICS, INC.
    Inventors: David W. Sherrer, John J. Fisher
  • Publication number: 20150327410
    Abstract: A microwave assembly having a substrate comprising a microwave device; said device having a die, a first layer having a dielectric constant between about 1.00 and about 1.45 and a thickness between about 0.05 and about 2 mm along with one or more layers chosen from an absorbing layer, an EMI blocking layer, a layer comprising conductive material or a metal cover.
    Type: Application
    Filed: January 21, 2015
    Publication date: November 12, 2015
    Inventors: David W. Sherrer, James D. MacDonald
  • Publication number: 20150228554
    Abstract: Provided are integrated electronic components which include a waveguide microstructure formed by a sequential build process and an electronic device, and methods of forming such integrated electronic components. The microstructures have particular applicability to devices for transmitting electromagnetic energy and other electronic signals.
    Type: Application
    Filed: April 24, 2015
    Publication date: August 13, 2015
    Inventors: Jean-Marc Rollin, David W. Sherrer
  • Publication number: 20150184998
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Application
    Filed: March 13, 2015
    Publication date: July 2, 2015
    Inventor: David W. Sherrer
  • Patent number: 9065163
    Abstract: Radio frequency (RF) power amplifiers are provided which may include high power, wideband, microwave or millimeter-wave solid state power amplifiers based on waveguide power combiner/dividers.
    Type: Grant
    Filed: December 22, 2012
    Date of Patent: June 23, 2015
    Assignee: NUVOTRONICS, LLC
    Inventors: Donald X. Wu, David W. Sherrer, Jean-Marc Rollin
  • Patent number: 9024417
    Abstract: Provided are integrated electronic components which include a waveguide microstructure formed by a sequential build process and an electronic device, and methods of forming such integrated electronic components. The microstructures have particular applicability to devices for transmitting electromagnetic energy and other electronic signals.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: May 5, 2015
    Assignee: Nuvotronics, LLC
    Inventors: Jean-Marc Rollin, David W. Sherrer
  • Patent number: 8993450
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: March 31, 2015
    Assignee: Nuvotronics, LLC
    Inventor: David W Sherrer
  • Patent number: 8933769
    Abstract: Provided are three-dimensional microstructures and their methods of formation. The microstructures are formed by a sequential build process and include microstructural elements which are affixed to one another. The microstructures find use, for example, in coaxial transmission lines for electromagnetic energy.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: January 13, 2015
    Assignee: Nuvotronics, LLC
    Inventors: William D. Houck, David W. Sherrer
  • Publication number: 20150007939
    Abstract: Structures, materials, and methods to control the spread of a solder material or other flowable conductive material in electronic and/or electromagnetic devices are provided.
    Type: Application
    Filed: September 24, 2014
    Publication date: January 8, 2015
    Inventors: David W. Sherrer, James R. Reid
  • Publication number: 20140364015
    Abstract: Connectors and interconnects for high power connectors which may operate at frequencies up to approximately 110 GHz and fabrication methods thereof are provided.
    Type: Application
    Filed: August 26, 2014
    Publication date: December 11, 2014
    Inventors: David W. Sherrer, Jean-Marc Rollin
  • Patent number: 8866300
    Abstract: Structures, materials, and methods to control the spread of a solder material or other flowable conductive material in electronic and/or electromagnetic devices are provided.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: October 21, 2014
    Assignee: Nuvotronics, LLC
    Inventors: David W. Sherrer, James R. Reid, Jr.
  • Publication number: 20140266515
    Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.
    Type: Application
    Filed: June 2, 2014
    Publication date: September 18, 2014
    Applicant: Nuvotronics, LLC
    Inventors: David W. Sherrer, John J. Fisher
  • Patent number: 8814601
    Abstract: Connectors and interconnects for high power connectors which may operate at frequencies up to approximately 110 GHz and fabrication methods thereof are provided.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: August 26, 2014
    Assignee: Nuvotronics, LLC
    Inventors: David W. Sherrer, Jean-Marc Rollin
  • Publication number: 20140231266
    Abstract: The present invention relates to the fabrication of complicated electronic and/or mechanical structures and devices and components using homogeneous or heterogeneous 3D additive build processes. In particular the invention relates to selective metallization processes including electroless and/or electrolytic metallization.
    Type: Application
    Filed: July 13, 2012
    Publication date: August 21, 2014
    Applicant: Nuvotronics, LLC
    Inventors: David W. Sherrer, Dara L. Cardwell
  • Publication number: 20140226690
    Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
    Type: Application
    Filed: April 22, 2014
    Publication date: August 14, 2014
    Applicant: Nuvotronics, LLC
    Inventor: David W. Sherrer