Patents by Inventor Di Wang

Di Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230283148
    Abstract: The disclosure relates to the technical field of vehicle accessories, and specifically provides an electric motor for a vehicle and a vehicle. The disclosure aims to solve the problems existing in an existing electric motor for a vehicle that during spraying and cooling of an outer surface of an iron core, a heat dissipation area of the outer surface of the iron core is small, and a convective heat transfer coefficient of a heat dissipation surface is small.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 7, 2023
    Inventors: Shilong XU, Jiqiang LI, Zhengyu TANG, Jiebao LI, Di WANG, Zhixin YU, Lu BI, Wei WANG, Huaiyuan LIU, Beibei LI
  • Publication number: 20230280978
    Abstract: Provided are a spin orbit torque magnetic random access memory cell, a spin orbit torque magnetic random access memory array and a method for calculating a Hamming distance, wherein the spin orbit torque magnetic random access memory cell includes a magnetic tunnel junction; a first transistor, a drain terminal of the first transistor being connected to a bottom of the magnetic tunnel junction; and a second transistor, a drain terminal of the second transistor being connected to a top of the magnetic tunnel junction.
    Type: Application
    Filed: January 21, 2021
    Publication date: September 7, 2023
    Inventors: Guozhong XING, Huai LIN, Di WANG, Long LIU, Feng ZHANG, Changqing XIE, Ling LI, Ming LIU
  • Patent number: 11748937
    Abstract: A computer device includes a processor configured to simulate a virtual environment based on a set of virtual environment parameters, and perform ray tracing to render a view of the simulated virtual environment. The ray tracing includes generating a plurality of rays for one or more pixels of the rendered view of the simulated virtual environment. The processor is further configured to determine sub-pixel data for each of the plurality of rays based on intersections between the plurality of rays and the simulated virtual environment, and store the determined sub-pixel data for each of the plurality of rays in an image file.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: September 5, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Pedro Urbina Escos, Dimitrios Lymberopoulos, Di Wang, Emanuel Shalev
  • Patent number: 11735543
    Abstract: A semiconductor device is provided. The semiconductor device includes a first wafer having an array transistor formed therein, and a second wafer having a capacitor structure formed therein. The semiconductor device also includes a bonding interface formed between the first wafer and second wafer that includes a plurality of bonding structures. The bonding structures are configured to couple the array transistor to the capacitor structure to form a memory cell.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: August 22, 2023
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Lei Liu, Di Wang, Wenxi Zhou, Zhiliang Xia
  • Publication number: 20230263070
    Abstract: The present disclosure relates to a field of memory technical, and in particular to a magnetoresistive device, a method for changing a resistance state of the magnetoresistive device, and a synapse learning module. The magnetoresistive device includes a top electrode, a ferromagnetic reference layer, a tunneling layer, a ferromagnetic free layer, a spin-orbit coupling layer, and a bottom electrode that are arranged in sequence along a preset direction, where the spin-orbit coupling layer includes a first thickness region and a second thickness region distributed alternately, and a thickness of the first thickness region is different form a thickness of the second thickness region; and the ferromagnetic free layer includes a pinning region, and a position of the pinning region is in one-to-one correspondence with a position of the first thickness region.
    Type: Application
    Filed: December 31, 2020
    Publication date: August 17, 2023
    Inventors: Guozhong Xing, Di Wang, Huai Lin, Long Liu, Yu Liu, Hangbing Lv, Changqing Xie, Ling Li, Ming Liu
  • Publication number: 20230253319
    Abstract: In an example of the present disclosure, a three-dimensional (3D) memory device includes a memory array structure and a staircase structure dividing the memory array structure into a first memory array structure and a second memory array structure along a lateral direction. The staircase structure includes a plurality of stairs, and a bridge structure in contact with the first memory array structure and the second memory array structure. A stair of the plurality of stairs includes a conductor portion on a top surface of the stair and electrically connected to the bridge structure, and a dielectric portion at a same level and in contact with the conductor portion. The stair is electrically connected to at least one of the first memory array structure and the second memory array structure. The conductor portion includes a portion overlapping with an immediately-upper stair and in contact with the dielectric portion and the bridge structure.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Inventors: Di Wang, Wenxi Zhou, Zhiliang Xia, Zhong Zhang
  • Publication number: 20230237559
    Abstract: Techniques for ordering items using ecommerce purchase within a short-form video environment are disclosed. A short-form video from a plurality of short-form videos delivered from a short-form video server is rendered. A product within the video is selected. The selecting is accomplished by clicking on or mousing over an object in the video. The product within the video is added to a virtual purchase cart based on the selecting. Contents of the virtual purchase cart are visible while the video is being viewed. A representation of the virtual purchase cart is displayed, wherein the representation is visible while viewing the short-form video. The virtual purchase cart is checked out. Contents of the virtual purchase cart are purchased. Purchase of the product is finalized upon conclusion of the short-form video. Finalizing purchase is accomplished using a batch order process. Batch order processing occurs upon conclusion of the short-form video.
    Type: Application
    Filed: January 24, 2023
    Publication date: July 27, 2023
    Inventors: Di Wang, Jing Xian Chen, Yufan Jiang, Jerry Ting Kwan Luk, Ziming Zhuang
  • Patent number: 11711424
    Abstract: Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium, including a system that controls content distribution using a feedback loop. Content is distributed over multiple different online channels using a same initial selection value for distribution over each different online channel. An observed user actions required for distribution of the content over the multiple different online channels is received through a feedback loop and for multiple different distributions of the content. Based on the observed user actions received through the feedback loop, a predicted user action rate is determined for the multiple different distributions across the multiple different online channels. The selection value is adjusted based on a difference between the predicted user action rate and a reference distribution amount specified by a provider of the content. The content is distributed over the multiple different online channels using the adjusted selection value.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: July 25, 2023
    Assignee: Google LLC
    Inventors: Chenyu Zhao, Di Wang, Samuel Sze Ming Ieong, Christopher K. Harris
  • Publication number: 20230221540
    Abstract: The present disclosure provides a continuous zoom stereoscopic microscope with an adjustable stereoscopic angle, consisting of a microscope stand, a first eyepiece module, a second eyepiece module, a first objective module, a second objective module, a first Risley prism, a second Risley prism, a first image-rotating prism, a second image-rotating prism, a drive module, a control module and an illumination module. The drive module provides preset drive values for individual liquid lenses in the liquid lens sets according to different magnifications to change the focal lengths of the liquid lenses, thereby changing the effective focal lengths of the objective module and that of the eyepiece module, and finally achieving continuous and fast zooming of the stereoscopic microscope to be adapted to different working scenarios.
    Type: Application
    Filed: March 6, 2023
    Publication date: July 13, 2023
    Inventors: Chao LIU, Qionghua WANG, Zhao JIANG, Yi ZHENG, Di WANG
  • Patent number: 11699659
    Abstract: In an example of the present disclosure, 3D memory device includes a memory array structure and a staircase structure dividing the memory array structure into a first memory array structure and a second memory array structure along a lateral direction. The staircase structure includes a plurality of stairs, and a bridge structure in contact with the first memory array structure and the second memory array structure. A stair of the plurality of stairs includes a conductor portion on a top surface of the stair and electrically connected to the bridge structure, and a dielectric portion at a same level and in contact with the conductor portion. The stair is electrically connected to at least one of the first memory array structure and the second memory array structure. The conductor portion includes a portion overlapping with an immediately-upper stair and in contact with the dielectric portion and the bridge structure.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: July 11, 2023
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Di Wang, Wenxi Zhou, Zhiliang Xia, Zhong Zhang
  • Publication number: 20230197507
    Abstract: The present disclosure provides a method for forming a three-dimensional memory device. The method includes disposing an alternating dielectric stack on a substrate in a first direction perpendicular to the substrate; and forming a staircase structure and a dividing wall in the alternating dielectric stack. The staircase structure and the dividing wall extend in a second direction parallel to the substrate, and the dividing wall is adjacent to the staircase structure. The method also includes forming, sequentially on the staircase structure, a first barrier layer and a second barrier layer different from the first barrier layer. The method further includes forming a gate line slit (GLS) opening in the dividing wall. The GLS opening penetrates through the alternating dielectric stack in the first direction and is distant from the second barrier layer in a third direction that is parallel to the substrate and is perpendicular to the second direction.
    Type: Application
    Filed: January 20, 2022
    Publication date: June 22, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Ling XU, Di WANG, Zhong ZHANG, Wenxi ZHOU
  • Publication number: 20230189521
    Abstract: A memory device includes a stack structure over a substrate, a channel structure extending in the stack structure, and a dielectric layer over the channel structure. The dielectric layer includes a first material. The memory device may also include a drain-select gate (DSG) cut structure extending through the dielectric layer. The DSG cut structure includes a second material different from the first material.
    Type: Application
    Filed: January 4, 2022
    Publication date: June 15, 2023
    Inventors: Di Wang, Yan Gu, Zhiliang Xia, Wenxi Zhou, Zongliang Huo
  • Publication number: 20230189516
    Abstract: The present disclosure is directed to a memory structure including a staircase structure. The staircase structure can include a bottom select gate, a plate line formed above the bottom select gate, and a word line formed above the plate line. The pillar can extend through the bottom select gate, the plate line, and the word line. The memory structure can also include a source structure formed under the pillar and a drain cap formed above the pillar. The memory structure can further include a bit line formed above the drain cap.
    Type: Application
    Filed: January 24, 2022
    Publication date: June 15, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Tao Yang, DongXue Zhao, Yuancheng Yang, Lei Liu, Kun Zhang, Di Wang, Wenxi Zhou, ZhiLiang Xia, ZongLiang Huo
  • Patent number: 11656386
    Abstract: A plasmonic system is disclosed. The system includes at least one polarizer that is configured to provide at least one linearly polarized broadband light beam, an anisotropic plasmonic metasurface (APM) assembly having a plurality of nanoantennae each having a predetermined orientation with respect to a global axis representing encoded digital data, the APM assembly configured to receive the at least one linearly polarized broadband light beam and by applying localized surface plasmon resonance reflect light with selectable wavelengths associated with the predetermined orientations of the nanoantennae, and at least one analyzer that is configured to receive the reflected light with selectable wavelength, wherein the relative angles between each of the at least one analyzers and each of the at least one polarizers are selectable with respect to the global axis, thereby allowing decoding of the digital data.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: May 23, 2023
    Assignee: Purdue Research Foundation
    Inventors: Alexander V. Kildishev, Di Wang, Zhaxylyk A. Kudyshev, Maowen Song, Alexandra Boltasseva, Vladimir M. Shalaev
  • Publication number: 20230142290
    Abstract: This disclosure is directed to methods for performing operations on a memory device. The memory device can include a bottom select gate, a plate line above the bottom select gate, a word line above the plate line, a pillar extending through the bottom select gate, the plate line, and the word line, a source line under the pillar, a drain cap above the pillar and a bit line formed above the drain cap. The method can include applying a first positive voltage bias to the bottom select gate and applying a second positive voltage bias to the word line. The method can also include applying a third positive voltage bias to the bit line after the word line reaches the second positive voltage bias. The method can further include applying a ground voltage to the word line and applying the ground voltage to the bit line.
    Type: Application
    Filed: December 30, 2021
    Publication date: May 11, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: DongXue ZHAO, Tao Yang, Yuancheng Yang, Lei Liu, Di Wang, Kun Zhang, Wenxi Zhou, Zhiliang Xia, ZongLiang Huo
  • Patent number: 11642316
    Abstract: A method for preparing a water-soluble curcumin mixture with high bioavailability includes the following steps: A) dissolving curcumin, vitamin C and ascorbyl palmitate in an ethanol aqueous solution, evaporating ethanol under reduced pressure, and vacuum drying to obtain a curcumin-vitamin C-ascorbyl palmitate co-crystal; B) high-speed emulsifying the curcumin-vitamin C-ascorbyl palmitate co-crystal and a wall material colloidal solution under vacuum, sequentially conducting a two-stage wet grinding, a homogenization and a potential adjustment to obtain an emulsified body; and C) subjecting the emulsified body to microencapsulation with a wall material twice and drying to obtain the water-soluble curcumin.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: May 9, 2023
    Assignee: HENAN ZHONGDA HENGYUAN BIOTECHNOLOGY STOCK CO., LTD.
    Inventors: Honglong Li, Ziheng Jin, Linzheng Li, Xiaosong Xu, Di Wang, Chunfeng Yu, Wenjin Zhang, Huiting Xia
  • Patent number: 11646998
    Abstract: A system administrator can specify NAT mappings to perform NAT translations in a switch. The administrator can specify an ACL to filter packets to be translated. Filter rules generated from the ACL are stored in a first memory store in a switch and NAT rules generated from the NAT mappings are stored in a second memory store separate from the first memory store. When a packet matches one of the filter rules a tag that identifies the ACL is associated with the packet. When the tagged packet matches one of the NAT rules, the packet is translated according to the matched NAT rule.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: May 9, 2023
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Satish Kumar Selvaraj, Brett Hatch, Ashit Tandon, Deva Pandian, Di Wang
  • Publication number: 20230133874
    Abstract: A three-dimensional (3D) memory device includes interleaved conductive layers and dielectric layers. Edges of the conductive layers and dielectric layers define a plurality of stairs. The 3D memory device may also include a plurality of landing structures each disposed on a respective conductive layer at a respective stair. Each of the landing structures comprises a first layer of a first material and a second layer of a second material. The first layer is over the second layer. The second material is different from the first material.
    Type: Application
    Filed: December 1, 2021
    Publication date: May 4, 2023
    Inventors: Zhong Zhang, Wenxi Zhou, Di Wang, Zhiliang Xia, Zongliang Huo
  • Patent number: 11633755
    Abstract: A complex flow tube for fine sealing coating of a PVC material for an automobile includes a base fixed to a mechanical arm, and a pipeline connected to the base for delivering a PVC sealant; the base is detachably butted with an interface of a PVC gluing pump mounted on the mechanical arm; the PVC gluing pump delivers the PVC sealant through the pipeline to a part to be coated or sealed of the automobile. The complex flow tube may be combined with the metal 3D printing technology, so that the manufactured complex flow tube has the advantages of being convenient to use, simple in structure, high in strength, not liable to break, etc.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: April 25, 2023
    Assignee: Guangzhou Laseradd Technology Co,. LTD
    Inventors: Di Wang, Yimeng Wang, Yongqiang Yang, Zhenlong Xu
  • Publication number: 20230124011
    Abstract: A reconfigurable PUF device based on fully electric field-controlled domain wall motion includes a voltage control layer, upper electrodes, a lower electrode, antiferromagnetic pinning layers, and a magnetic tunnel junction (MTJ). The MTJ includes, from bottom to top, a ferromagnetic reference layer, a potential barrier tunneling layer and a ferromagnetic free layer. In the device, an energy potential well is formed in a middle portion of the ferromagnetic free layer by applying a voltage to the voltage control layer to control magnetic anisotropy, and a current is fed into either of the upper electrodes to drive generation of the magnetic domain walls and pin the magnetic domain walls to the potential well. After the voltage is removed, the potential well is lowered so that the magnetic domain walls are in a metastable state, thereby either a high resistance state or a low resistance state is randomly obtained.
    Type: Application
    Filed: December 5, 2022
    Publication date: April 20, 2023
    Applicant: INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES
    Inventors: Guozhong XING, Huai LIN, Di WANG, Long LIU, Kaiping ZHANG, Guanya WANG, Yan WANG, Xiaoxin XU, Ming LIU