Abstract: A computer server system comprises multiple computer server units, each computer server comprising a server processing system. Each computer server comprises a local subsystem access module which is standardized for the multiple computer servers and which provides virtual control function for a single instantiation of a hardware resource of the computer server system, wherein the hardware resource is shared between each of the computer servers.

Abstract: Generating a physical circuit board design. The physical circuit board is designed based on a design data set containing multiple electronic components. In a first step, the electronic components are classified by assigning them either to a group of so-called Core Components or to a group of Application Specific Components. Subsequently, a circuit board layer structure is generated. The layer structure includes a Core Layer Structure located in the center of this layer structure. The components are placed onto the board's layer structure in such a way that the Core Components are placed onto the Core Layer Structure. Finally, a design macro of the resulting physical design is generated and the circuit board is assembled.

Abstract: The invention relates to a design method and tool for designing electronic circuits on a printed circuit board, wherein at least one self-contained, pre-composed domain is used, wherein the domain is a module chosen from a pre-composed architecture library, including self-contained pre-designed electronic modules represented by logical architecture and corresponding physical architecture.

Abstract: The invention relates to an electronic-board arrangement, comprising at least two electronic boards, particularly integrated circuit boards, which are attached to a backplane which provides electrical interconnection between the at least two electronic boards. An electronic interconnect board providing electrical interconnect between the at least two electronic boards is arranged in a space in between the at least two electronic boards and the backplane.

Abstract: Generating a physical circuit board design. The physical circuit board is designed based on a design data set containing multiple electronic components. In a first step, the electronic components are classified by assigning them either to a group of so-called Core Components or to a group of Application Specific Components. Subsequently, a circuit board layer structure is generated. The layer structure includes a Core Layer Structure located in the center of this layer structure. The components are placed onto the board's layer structure in such a way that the Core Components are placed onto the Core Layer Structure. Finally, a design macro of the resulting physical design is generated and the circuit board is assembled.

Abstract: The invention relates to a design method and tool for designing electronic circuits on a printed circuit board, wherein at least one self-contained, pre-composed domain is used, wherein the domain is a module chosen from a pre-composed architecture library, including self-contained pre-designed electronic modules represented by logical architecture and corresponding physical architecture.

Abstract: A Common System Storage Repository replaces all the different system support storages distributed across a server system topology transparent to various subsystems by providing a central non-volatile repository for all the different system data. Each of the various subsystems communicate with the Common System Storage Repository via the individual system support storage interfaces.

Abstract: The invention relates to a design method and tool for designing electronic circuits on a printed circuit board, wherein at least one self-contained, pre-composed domain is used, wherein the domain is a module chosen from a pre-composed architecture library, including self-contained pre-designed electronic modules represented by logical architecture and corresponding physical architecture.

Abstract: A network of processing units having at least one switch that allows disruption of the network between a first and a second processing units is provided. Disruption of the network by means of the switch effectively disconnects the first processing unit from the network and couples the first processing unit to a controller of the network. The controller is adapted to exchange data with the disconnected processing unit and thereby allows selective and direct data exchange with a selected processing unit. In particular, in the framework of heterogeneous and hierarchical networks of processing units, the switch techniques provide direct access to processing units and sub-networks and allow for an efficient and fast performance of diagnostic and maintenance procedures of sub-networks and their corresponding processing units, such as performing a flashing procedure.

Abstract: The invention relates to a design method and tool for designing electronic circuits on a printed circuit board (10), wherein at least one self-contained, pre-composed domain is used, wherein the domain (110, 120, 130, 140, 150, 150, 160) is a module chosen from a pre-composed architecture library, comprising self-contained pre-designed electronic modules represented by logical architecture and corresponding physical architecture.

Abstract: The invention relates to a design method and tool for designing electronic circuits on a printed circuit board, wherein at least one self-contained, pre-composed domain is used, wherein the domain is a module chosen from a pre-composed architecture library, including self-contained pre-designed electronic modules represented by logical architecture and corresponding physical architecture.

Abstract: The invention relates to a coupler assembly for electrically coupling at least two boards (200a, 200b, 200c, 200d) comprising interconnected integrated circuits, which coupler assembly provides high-speed constrained electrical interconnection (130) between the coupled boards (200a, 200b, 200c, 200d), for example CPU-busses, SMP-busses and IO-busses. The electrical interconnection (130) provides signal timing alignment and signal integrity for signals exchanged between the coupled boards (200a, 200b, 200c, 200d).

Abstract: The invention relates to an electronic-board arrangement, comprising at least two electronic boards (110, 110a-110n), particularly integrated circuit boards, which are attached to a backplane (10) which provides electrical interconnection between the at least two electronic boards (110, 110a-110n). An electronic interconnect board (40) providing electrical interconnect between the at least two electronic boards (110, 110a-110n) is arranged in a space (90) in between the at least two electronic boards (110, 110a-110n) and the backplane (10).

Abstract: A computer server system comprises multiple computer server units, each computer server comprising a server processing system. Each computer server comprises a local subsystem access module which is standardized for the multiple computer servers and which provides virtual control function for a single instantiation of a hardware resource of the computer server system, wherein the hardware resource is shared between each of the computer servers.

Abstract: A network of processing units having at least one switch that allows to disrupt the network between a first and a second processing units is provided. Disruption of the network by means of the switch effectively disconnects the first processing unit from the network and couples the first processing unit to a controller of the network. The controller is adapted to exchange data with the disconnected processing unit and thereby allows to selectively and directly exchange data with a selected processing unit. In particular in the framework of heterogeneous and hierarchical networks of processing units, the invention provides direct access to processing units and sub-networks and allows for an efficient and fast performance of diagnostic and maintenance procedures of sub-networks and the their corresponding processing units, such as e.g. performing a flashing procedure.

Abstract: The invention relates to a design method and tool for designing electronic circuits on a printed circuit board (10), wherein at least one self-contained, pre-composed domain is used, wherein the domain (110, 120, 130, 140, 150, 150, 160) is a module chosen from a pre-composed architecture library, comprising self-contained pre-designed electronic modules represented by logical architecture and corresponding physical architecture.

Abstract: In a processor system for audio processing, such as voice recognition and text-to-speech, a dedicated front-end processor, a core processor and a dedicated back-end processor are provided which are coupled by dual access stack. When an analog audio signal is inputted core processor is invoked only when a certain amount of data is present in the dual access stack. Likewise the back-end processor is invoked only when a certain amount of data is present in the dual access stack. This way the overall processing power required by the processing task is minimized as well as the power consumption of the processor system.

Abstract: A Dynamic Storage Subsystem Morphing (DSSM) mechanism (40) is connected to a plurality of storage subsystem resources, which reserve some storage area each non-donor ECU (12), ready for a “slot-down/up” access by a respective non-donor ECU having a storage subsystem (24) breakdown. The slot-down process enables the use of a high physical address range by the non-donor processor provided with addressing capabilities sufficient only for addressing lower ranges.

Abstract: A Common System Storage Repository replaces all the different system support storages distributed across a server system topology transparent to various subsystems by providing a central non-volitile repository for all the different system data. Each of the various subsystems communicate with the Common System Storage Repository via the individual system support storage interfaces.

Abstract: Switching method and apparatus for assigning a communication grant to a first processing unit in a communication network comprising a plurality of processing units, each processing unit being connected to each other processing unit of the plurality of processing units. The switching method includes steps of performing an identical arbitration procedure for a communication grant by each of the plurality of processing units, and switching at least one of the plurality of processing units according to the identical arbitration procedure.