Patents by Inventor Donald F. Canaperi
Donald F. Canaperi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8439728Abstract: A reticle carrier for a polishing tool capable of accommodating a reticle includes a base plate with an obverse and reverse surfaces, a retaining ring secured to the obverse surface of the base plate forming a recess defined by the obverse surface of the rigid base plate and internal edges of the retaining ring. A reticle pad supports a reticle in the recess. The base plate and the reticle pad having an array of matching, aligned passageway holes therethrough for exhaustion of air from space between the base plate and a the reticle and for supply of air to that space so a vacuum can retain a the reticle in place on the reticle carrier under vacuum conditions and application of air under pressure can eject a reticle from the reticle carrier.Type: GrantFiled: October 21, 2011Date of Patent: May 14, 2013Assignee: International Business Machines CorporationInventors: Kevin S. Petrarca, Donald F. Canaperi, Mahadevaiyer Krishnan, Rebecca D. Mih, Steven Steen, Henry Grabarz, Michael S. Hibbs
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Publication number: 20120040277Abstract: A reticle carrier for a polishing tool capable of accommodating a reticle includes a base plate with an obverse and reverse surfaces, a retaining ring secured to the obverse surface of the base plate forming a recess defined by the obverse surface of the rigid base plate and internal edges of the retaining ring. A reticle pad supports a reticle in the recess. The base plate and the reticle pad having an array of matching, aligned passageway holes therethrough for exhaustion of air from space between the base plate and a the reticle and for supply of air to that space so a vacuum can retain a the reticle in place on the reticle carrier under vacuum conditions and application of air under pressure can eject a reticle from the reticle carrier.Type: ApplicationFiled: October 21, 2011Publication date: February 16, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin S. Petrarca, Donald F. Canaperi, Mahadevaiyer Krishnan, Rebecca D. Mih, Steven Steen, Henry Grabarz, Michael S. Hibbs
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Patent number: 8110321Abstract: A method for manufacturing an optical projection reticle employs a damascene process. First feature recesses are etched into a projection reticle mask plate which is transmissive or transparent. Then feature recesses are tilled with a radiation transmissivity modifying material comprising a partially transmissive material and/or a radiation absorber for absorbing actinic radiation. Sacrificial materials may be added to the recess temporarily prior to filling the recess to provide gaps juxtaposed with the material filling the recess. Thereafter, the sacrificial materials are removed. Then the projection mask is planarized leaving feature recesses filled with transmissivity modifying material, and any gaps desired. The projection mask is planarized while retained in a fixture holding it in place during polishing with a polishing tool and a slurry.Type: GrantFiled: May 16, 2007Date of Patent: February 7, 2012Assignee: International Business Machines CorporationInventors: Kevin S. Petrarca, Donald F. Canaperi, Mahadevaiyer Krishnan, Rebecca D. Mih, Steven Steen, Henry Grabarz, Michael S. Hibbs
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Publication number: 20100051474Abstract: Methods and compositions for electro-chemical-mechanical polishing (e-CMP) of silicon chip interconnect materials, such as copper, are provided. The methods include the use of compositions according to the invention in combination with pads having various configurations.Type: ApplicationFiled: August 27, 2009Publication date: March 4, 2010Inventors: Panayotis C. Andricacos, Caliopi Andricacos, Donald F. Canaperi, Emanuel I. Cooper, John M. Cotte, Hariklia Deligianni, Laertis Economikos, Daniel C. Edelstein, Silvia Franz, Balasubramanian Pranatharthiharan, Mahadevaiyer Krishnan, Andrew P. Mansson, Erick G. Walton, Alan C. West
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Publication number: 20080286660Abstract: A method for manufacturing an optical projection reticle employs a damascene process. First feature recesses are etched into a projection reticle mask plate which is transmissive or transparent. Then feature recesses are tilled with a radiation transmissivity modifying material comprising a partially transmissive material and/or a radiation absorber for absorbing actinic radiation. Sacrificial materials may be added to the recess temporarily prior to filling the recess to provide gaps juxtaposed with the material filling the recess. Thereafter, the sacrificial materials are removed. Then the projection mask is planarized leaving feature recesses filled with transmissivity modifying material, and any gaps desired. The projection mask is planarized while retained in a fixture holding it in place during polishing with a polishing tool and a slurry.Type: ApplicationFiled: May 16, 2007Publication date: November 20, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin S. Petrarca, Donald F. Canaperi, Mahadevaiyer Krishnan, Rebecca D. Mih, Steven Steen, Henry Grabarz, Michael S. Hibbs
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Patent number: 7407605Abstract: An aqueous seeding solution of palladium acetate, acetic acid and chloride.Type: GrantFiled: May 22, 2007Date of Patent: August 5, 2008Assignee: International Business Machines CorporationInventors: Darryl D. Restaino, Donald F. Canaperi, Judith M. Rubino, Sean P. E. Smith, Richard O. Henry, James E. Fluegel, Mahadevaiyer Krishnan
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Patent number: 7253106Abstract: A method to electrolessly plate a CoWP alloy on copper in a reproducible manner that is effective for a manufacturable process. In the method, a seed layer of palladium (Pd) is deposited on the copper by an aqueous seeding solution of palladium acetate, acetic acid and chloride. Thereafter, a complexing solution is applied to remove any Pd ions which are adsorbed on surfaces other than the copper. Finally, a plating solution of cobalt (Co), tungsten (W) and phosphorous (P) is applied to the copper so as to deposit a layer of CoWP on the Pd seed and copper.Type: GrantFiled: December 22, 2004Date of Patent: August 7, 2007Assignee: International Business Machines CorporationInventors: Darryl D. Restaino, Donald F. Canaperi, Judith M. Rubino, Sean P. E. Smith, Richard O. Henry, James E. Fluegel, Mahadevaiyer Krishnan
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Patent number: 7199450Abstract: Sealing a via using a soventless, low viscosity, high temperature stable polymer or a high solids content polymer solution of low viscosity, where the polymeric material is impregnated within the via at an elevated temperature. A supply chamber is introduced to administer the polymeric material at an elevated temperature, typically at a temperature high enough to liquefy the polymeric material. The polymeric material is introduced through heated supply lines under force from a pump, piston, or a vacuum held within said supply chamber.Type: GrantFiled: May 13, 2005Date of Patent: April 3, 2007Assignee: International Business Machines CorporationInventors: Jon A. Casey, Michael Berger, Leena P. Buchwalter, Donald F. Canaperi, Raymond R. Horton, Anurag Jain, Eric D. Perfecto, James A. Tornello
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Patent number: 7045453Abstract: A structure incorporates very low dielectric constant (k) insulators with copper wiring to achieve high performance interconnects. The wiring is supported by a relatively durable low k dielectric such as SiLk or SiO2 and a very low k and less-robust gap fill dielectric is disposed in the remainder of the structure, so that the structure combines a durable layer for strength with a very low k dielectric for interconnect electrical performance.Type: GrantFiled: April 12, 2005Date of Patent: May 16, 2006Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, Timothy J. Dalton, Stephen M. Gates, Mahadevaiyer Krishnan, Satya V. Nitta, Sampath Purushothaman, Sean P. E. Smith
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Patent number: 7023093Abstract: A structure incorporates very low dielectric constant (k) insulators with copper wiring to achieve high performance interconnects. The wiring is supported by a relatively durable low k dielectric such as SiLk or SiO2 and a very low k and less robust gap fill dielectric is disposed in the remainder of the structure, so that the structure combines a durable layer for strength with a very low k dielectric for interconnect electrical performance.Type: GrantFiled: October 24, 2002Date of Patent: April 4, 2006Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, Timothy J. Dalton, Stephen M. Gates, Mahadevaiyer Krishnan, Satya V. Nitta, Sampath Purushothaman, Sean P. E. Smith
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Patent number: 6762667Abstract: A method of fabricating and the structure of a micro-electromechanical switch (MEMS) device provided with self-aligned spacers or bumps is described. The spacers are designed to have an optimum size and to be positioned such that they act as a detent mechanism for the switch to minimize problems caused by stiction. The spacers are fabricated using standard semiconductor techniques typically used for the manufacture of CMOS devices. The present method of fabricating these spacers requires no added depositions, no extra lithography steps, and no additional etching.Type: GrantFiled: June 19, 2003Date of Patent: July 13, 2004Assignee: International Business Machines CorporationInventors: Richard P. Volant, David Angell, Donald F. Canaperi, Joseph T. Kocis, Kevin S. Petrarca, Kenneth J. Stein, William C. Wille
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Publication number: 20040087135Abstract: A structure incorporates very low dielectric constant (k) insulators with copper wiring to achieve high performance interconnects. The wiring is supported by a relatively durable low k dielectric such as SiLk or SiO2 and a very low k and less robust gap fill dielectric is disposed in the remainder of the structure, so that the structure combines a durable layer for strength with a very low k dielectric for interconnect electrical performance.Type: ApplicationFiled: October 24, 2002Publication date: May 6, 2004Applicant: International Business Machines CorporationInventors: Donald F. Canaperi, Timothy J. Dalton, Stephen M. Gates, Mahadevaiyer Krishnan, Satya V. Nitta, Sampath Purushothaman, Sean P.E. Smith
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Publication number: 20030210124Abstract: A method of fabricating and the structure of a micro-electromechanical switch (MEMS) device provided with self-aligned spacers or bumps is described. The spacers are designed to have an optimum size and to be positioned such that they act as a detent mechanism for the switch to minimize problems caused by stiction. The spacers are fabricated using standard semiconductor techniques typically used for the manufacture of CMOS devices. The present method of fabricating these spacers requires no added depositions, no extra lithography steps, and no additional etching.Type: ApplicationFiled: June 19, 2003Publication date: November 13, 2003Inventors: Richard P. Volant, David Angell, Donald F. Canaperi, Joseph T. Kocis, Kevin S. Petrarca, Kenneth J. Stein, William C. Wille
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Patent number: 6621392Abstract: A method of fabricating and the structure of a micro-electromechanical switch (MEMS) device provided with self-aligned spacers or bumps is described. The spacers are designed to have an optimum size and to be positioned such that they act as a detent mechanism for the switch to minimize problems caused by stiction. The spacers are fabricated using standard semiconductor techniques typically used for the manufacture of CMOS devices. The present method of fabricating these spacers requires no added depositions, no extra lithography steps, and no additional etching.Type: GrantFiled: April 25, 2002Date of Patent: September 16, 2003Assignee: International Business Machines CorporationInventors: Richard P. Volant, David Angell, Donald F. Canaperi, Joseph T. Kocis, Kevin S. Petrarca, Kenneth J. Stein, William C. Wille
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Patent number: 6524935Abstract: A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) is described incorporating growing epitaxial Si1−yGey layers on a semiconductor substrate, implanting hydrogen into a selected Si1−yGey layer to form a hydrogen-rich defective layer, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and separating two substrates at the hydrogen-rich defective layer. The separated substrates may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1−yGey, and strained Si1−yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1−yGeyC.Type: GrantFiled: September 29, 2000Date of Patent: February 25, 2003Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, Jack Oon Chu, Christopher P. D'Emic, Lijuan Huang, John Albrecht Ott, Hon-Sum Philip Wong
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Patent number: 6475072Abstract: A method and apparatus is described incorporating a semiconductor substrate, a CMP tool, a brush cleaning tool, and a chemical wafer cleaning tool. The CMP is performed with a down force of 1 psi, a backside air pressure of 0.5 psi, a platen speed of 50 rpm, a crarrier speed of 30 rpm and a slurry flow rate of 140 milliliters per minute.Type: GrantFiled: September 29, 2000Date of Patent: November 5, 2002Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, Jack Oon Chu, Guy M. Cohen, Lijuan Huang, John Albrecht Ott, Michael F. Lofaro
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Patent number: 6361402Abstract: A method for polishing an object having a layer of photoresist, the method, employing the following steps: a) applying a layer of slurry on an a layer of photoresist on an object having a first and a second side, the layer of photoresist on one of the first and second side, the object having a center axis perpendicular to the first and second side; b) contacting the layer of slurry with a pad having a first and second side, the first side of the pad exerting a force on the slurry.Type: GrantFiled: October 26, 1999Date of Patent: March 26, 2002Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, Rangarajan Jagannathan, Mahadevaiyer Krishnan, Max G. Levy, Uma Satyendra, Matthew Sendelbach, James A. Tornello, William Wille
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Patent number: 6348076Abstract: Slurry compositions comprising an oxidizing agent, copper corrosion inhibitor, abrasive particles; surface active agent and polyelectrolyte are useful for polishing or planarizing chip interconnect/wiring material such as Al, W and especially Cu.Type: GrantFiled: December 28, 1999Date of Patent: February 19, 2002Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, William J. Cote, Paul Feeney, Mahadevaiyer Krishnan, Joyce C. Liu, Michael F. Lofaro, Philip Murphy, Eric Jeffrey White
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Patent number: 5635253Abstract: A replenishing solution for a cyanide-based electroless gold plating bath. The solution includes a gold(III) halide such as gold chloride, gold bromide, tetrachloroaurate (and its sodium, potassium, and ammonium salts), and tetrabromoaurate (and its sodium, potassium, and ammonium salts). The replenishing solution also may include an alkali (such as potassium hydroxide, sodium hydroxide, and ammonium hydroxide) to maintain the pH of the solution between 8 and 14. Also provided is a method of replenishing a cyanide-based electroless gold plating bath with the solution of the present invention.Type: GrantFiled: June 7, 1995Date of Patent: June 3, 1997Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, Rangarajan Jagannathan, Mahadevaiyer Krishnan
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Patent number: 5576099Abstract: Laminates of magnetic and magnetic quenching laminae are provided for use as magnetic thin film laminates for use in magnetic recording heads. The use of these films significantly reduces the number of domains and Barkhausen noise levels in such recording heads.Type: GrantFiled: February 9, 1990Date of Patent: November 19, 1996Assignee: International Business Machines CorporationInventors: Donald F. Canaperi, Mahadevaiyer Krishnan, Sol Krongelb, David L. Rath, Lubomyr T. Romakiw