Patents by Inventor Donald S. Gardner

Donald S. Gardner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140093782
    Abstract: Embodiments of the invention describe energy storage devices, porous electrodes, and methods of formation. In an embodiment, an energy storage device includes a porous structure containing multiple main channels that extend into an electrically conductive structure at an acute angle. In an embodiment, an energy storage device includes a porous structure containing an array of V-groove or pyramid recesses.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: Donald S. Gardner, Charles W. Holzwarth, Win Jei
  • Publication number: 20140089687
    Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: September 25, 2012
    Publication date: March 27, 2014
    Inventors: Siva G. Narendra, James W. Tschanz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Publication number: 20140078644
    Abstract: An energy storage device includes a first electrode (110, 510) including a first plurality of channels (111, 512) that contain a first electrolyte (150, 514) and a second electrode (120, 520) including a second plurality of channels (121, 522) that contain a second electrolyte (524). The first electrode has a first surface (115, 511) and the second electrode has a second surface (125, 521). At least one of the first and second electrodes is a porous silicon electrode, and at least one of the first and second surfaces comprises a passivating layer (535).
    Type: Application
    Filed: September 17, 2012
    Publication date: March 20, 2014
    Inventors: Donald S. Gardner, Wei Jin, Zhaohui Chen, Charles W. Holzwarth, Cary L. Pint, Bum Ki Moon, John L. Gustafson
  • Patent number: 8629667
    Abstract: Disclosed herein are pulse width modulator (PWM) solutions with comparators not relying on a variable reference to adjust duty cycle. In accordance with some embodiments, a pulse width modulator having a comparator with an applied adjustable waveform to generate a bit stream with a controllably adjustable duty cycle is provided.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: January 14, 2014
    Assignee: Intel Corporation
    Inventors: Fabrice Paillet, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Sung T. Moon, Donald S. Gardner
  • Publication number: 20130279137
    Abstract: An energy storage structure includes an energy storage device containing at least one porous structure (110, 120, 510, 1010) that contains multiple channels (111, 121), each one of which has an opening (112, 122) to a surface (115, 116, 515, 516, 1015, 1116) of the porous structure, and further includes a support structure (102, 402, 502, 1002) for the energy storage device. In a particular embodiment, the porous structure and the support structure are both formed from a first material, and the support structure physically contacts a first portion (513, 813, 1213) of the energy storage device and exposes a second portion (514, 814, 1214) of the energy storage device.
    Type: Application
    Filed: November 3, 2011
    Publication date: October 24, 2013
    Inventors: Donald S. Gardner, Zhaohui Chen, Wei C. Jin, Eric C. Hannah, John L. Gustafson, Tomm V. Aldridge
  • Publication number: 20130273261
    Abstract: Methods of increasing an energy density of an energy storage device involve increasing the capacitance of the energy storage device by depositing a material into a porous structure of the energy storage device using an atomic layer deposition process, by performing a procedure designed to increase a distance to which an electrolyte penetrates within channels of the porous structure, or by placing a dielectric material into the porous structure. Another method involves annealing the energy storage device in order to cause an electrically conductive substance to diffuse to a surface of the structure and form an electrically conductive layer thereon. Another method of increasing energy density involves increasing the breakdown voltage and another method involves forming a pseudocapacitor. A method of increasing an achievable power output of an energy storage device involves depositing an electrically conductive material into the porous structure.
    Type: Application
    Filed: September 30, 2011
    Publication date: October 17, 2013
    Inventors: Donald S. Gardner, Zhaohui Chen, Wei C. Jin, Scott B. Clendenning, Eric C. Hannah, Tomm V. Aldridge, John L. Gustafson
  • Publication number: 20130257410
    Abstract: In one embodiment of the invention, a low frequency converter is described that includes a first electrochemical capacitor to charge to an input voltage and a second electrochemical capacitor that is coupled to the first electrochemical capacitor. The second electrochemical capacitor is associated with an output voltage of the low frequency converter. Each electrochemical capacitor may have a capacitance of at least one millifarad (mF) and a switching frequency that is less than one kilohertz.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 3, 2013
    Inventors: Donald S. Gardner, Pavan Kumar
  • Patent number: 8513750
    Abstract: Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: August 20, 2013
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Gerhard Schrom, Peter Hazucha, Fabrice Paillet, Tanay Karnik
  • Publication number: 20130182365
    Abstract: Multiple-inductor embodiments for use in substrates are provided herein.
    Type: Application
    Filed: February 4, 2013
    Publication date: July 18, 2013
    Inventors: Peter Hazucha, Trang T. Nguyen, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Sung T. Moon, Tanay Karnik
  • Patent number: 8471667
    Abstract: Some embodiments include a die having a transformer. The transformer includes windings formed from a set of lines, such that no two lines belonging to any one winding are nearest neighbors. The lines are formed within one layer on the die. Other embodiments are described.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: June 25, 2013
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Peter Hazucha, Gerhard Schrom
  • Patent number: 8406634
    Abstract: A method and apparatus for optical signaling. In one embodiment, a laser driver converts a digital voltage sequence to a current signal having a bias mode adjustable by a bias control and a modulation mode adjustable by a modulation control. A laser generates an optical signal responsive to the current signal of the laser driver. In one embodiment, a photo-detector receives an optical signal and generates a single ended current signal. A transimpedance amplifier circuit converts the single ended current signal to a differential voltage signal. A clock recovery circuit generates an aligned clock signal and a sampler circuit uses the aligned clock signal to retrieve a digital voltage sequence.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: March 26, 2013
    Assignee: Intel Corporation
    Inventors: Jianping Xu, Fabrice Paillet, Tanay Karnik, Donald S. Gardner
  • Patent number: 8373074
    Abstract: An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: February 12, 2013
    Assignee: Intel Corporation
    Inventors: Peter Hazucha, Edward Burton, Trang T. Nguyen, Gerhard Schrom, Fabrice Paillet, Kaladhar Radhakrishnan, Donald S. Gardner, Sung T. Moon, Tanay Karnik
  • Patent number: 8368501
    Abstract: Multiple-inductor embodiments for use in substrates are provided herein.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: February 5, 2013
    Assignee: Intel Corporation
    Inventors: Peter Hazucha, Trang T. Nguyen, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Sung T. Moon, Tanay Karnik
  • Publication number: 20130016452
    Abstract: In one embodiment a charge storage device includes first (110) and second (120) electrically conductive structures separated from each other by a separator (130). At least one of the first and second electrically conductive structures includes a porous structure containing multiple channels (111, 121). Each one of the channels has an opening (112, 122) to a surface (115, 125) of the porous structure. In another embodiment the charge storage device includes multiple nanostructures (610) and an electrolyte (650) in physical contact with at least some of the nanostructures. A material (615) having a dielectric constant of at least 3.9 may be located between the electrolyte and the nanostructures.
    Type: Application
    Filed: April 2, 2010
    Publication date: January 17, 2013
    Applicant: INTEL CORPORATION
    Inventors: Donald S. Gardner, Eric C. Hannah, Rong Chen, John L. Gustafson
  • Patent number: 8288846
    Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: October 16, 2012
    Assignee: Intel Corporation
    Inventors: Siva G. Narendra, James W. Tschanz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek K. De, Shekhar Y. Borkar
  • Publication number: 20120221884
    Abstract: Generally, this disclosure provides error management across hardware and software layers to enable hardware and software to deliver reliable operation in the face of errors and hardware variation due to aging, manufacturing tolerances, etc. In one embodiment, an error management module is provided that gathers information from the hardware and software layers, and detects and diagnoses errors. A hardware or software recovery technique may be selected to provide efficient operation, and, in some embodiments, the hardware device may be reconfigured to prevent future errors and to permit the hardware device to operate despite a permanent error.
    Type: Application
    Filed: February 28, 2011
    Publication date: August 30, 2012
    Inventors: Nicholas P. Carter, Donald S. Gardner, Eric C. Hannah, Helia Naeimi, Shekhar Y. Borkar, Matthew Haycock
  • Publication number: 20120194245
    Abstract: Disclosed herein are pulse width modulator (PWM) solutions with comparators not relying on a variable reference to adjust duty cycle. In accordance with some embodiments, a pulse width modulator having a comparator with an applied adjustable waveform to generate a bit stream with a controllably adjustable duty cycle is provided.
    Type: Application
    Filed: February 24, 2012
    Publication date: August 2, 2012
    Inventors: Fabrice Paillet, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Sung T. Moon, Donald S. Gardner
  • Patent number: 8108984
    Abstract: Methods of manufacture of integrated circuit inductors having slotted magnetic material will be described. The methods may employ electro- or electroless plating techniques to form a layer or layers of magnetic material within the slotted magnetic material structure, and in particular those magnetic material layers adjacent to insulator layers.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: February 7, 2012
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Gerhard Schrom, Peter Hazucha, Fabrice Paillet, Tanay Karnik
  • Patent number: 8089418
    Abstract: An antenna structure that includes a magnetic film coated on a textured backside of an antenna substrate to reduce the size of antenna from an average size of the antenna for a predetermined frequency band.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: January 3, 2012
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Seong-Youp Suh
  • Publication number: 20110268457
    Abstract: A method and apparatus for optical signaling. In one embodiment, a laser driver converts a digital voltage sequence to a current signal having a bias mode adjustable by a bias control and a modulation mode adjustable by a modulation control. A laser generates an optical signal responsive to the current signal of the laser driver. In one embodiment, a photo-detector receives an optical signal and generates a single ended current signal. A transimpedance amplifier circuit converts the single ended current signal to a differential voltage signal. A clock recovery circuit generates an aligned clock signal and a sampler circuit uses the aligned clock signal to retrieve a digital voltage sequence.
    Type: Application
    Filed: July 14, 2011
    Publication date: November 3, 2011
    Inventors: Jianping Xu, Fabrice Paillet, Tanay Karnik, Donald S. Gardner