Abstract: A ferroelectric memory device and a method of formation are disclosed. In one particular embodiment, a ferroelectric memory device comprises a first electrode layer formed on a substrate, a ferroelectric polymer layer formed on substantial portion of a first electrode layer, a thin layer of conductive ferroelectric polymer formed on a substantial portion of the ferroelectric polymer layer, where the ferroelectric polymer may be made conductive by doping with conductive nano-particles, and a second electrode layer formed on at least a portion of the carbon doped ferroelectric polymer layer.

Abstract: A technique to promote the adhesion and uniform distribution of a spin coated film upon a ferroelectric material. At least one embodiment of the invention uses a ferroelectric material, such as PVDF/TrFE, to promote the adhesion of a spin-coated film onto a wafer.

Abstract: A method of forming a semiconductor device is described comprising forming a first patterned conductive layer on a dielectric on a substrate. A first barrier layer comprising silicon nitride is formed on the surface of the first patterned conductive layer, followed by forming a second barrier layer comprising silicon carbide on the surface of the first barrier layer. Using standard lithographic techniques a via and a trench are formed to the surface of the conductive layer.

Abstract: A semiconductor device having a novel spacer structure and method of fabrication. The present invention describes a semiconductor device which has an electrode with a first thickness. A silicide layer having a second thickness is formed on the electrode. A sidewall spacer which is formed adjacent to the electrode has a height which is greater than the sum of the thickness of the electrode and the thickness of the silicide layer.

Abstract: A low temperature plasma ashing process for use with substrates comprising a ferroelectric material. The process generally includes plasma ashing the photoresist and residues at a temperature of about room temperature to about 140° C., wherein the plasma is generated from a gas mixture consisting essentially of hydrogen and an inert gas, and wherein the ferroelectric material is exposed to the plasma.

Abstract: A semiconductor device having a novel spacer structure and method of fabrication. The present invention describes a semiconductor device which has an electrode with a first thickness. A silicide layer having a second thickness is formed on the electrode. A sidewall spacer which is formed adjacent to the electrode has a height which is greater than the sum of the thickness of the electrode and the thickness of the silicide layer.

Abstract: Embodiments in accordance with the present invention eliminate the need for a subtractive metal patterning process to pattern the electrode above a ferroelectric polymer. Instead, a selective electroless deposition process is used. A conductive polymer is used as a seed layer for the electroless plating of the metal electrode. A cost saving is provided by eliminating the chemical costs associated with conventional resist removal processing. The methods also potentially eliminate the requirement for aggressive and environmentally unsafe chemical-based photoresist removal processes.

Abstract: A series of conductive layers separated by interlayer gaps is formed adjacent a substrate layer, the conductive layer and interlayer gap dimensions defining aspect ratios for trenches between the conductive layers. A layer of dielectric material is deposited over the conductive layers using plasma enhanced chemical vapor deposition. Trenches having aspect ratios within specified geometric categories are incompletely filled, leaving interlayer voids which may have desirable dielectric properties.

Abstract: Briefly, in accordance with one embodiment of the invention, an edge bead removal process is performed during the manufacture of a ferroelectric memory device while a polymer solution is still wet.

Abstract: An improved method for making a semiconductor device is described. That method includes forming a first dielectric layer on a substrate, then forming on the first dielectric layer a second dielectric layer. The second dielectric layer is made from a material that is more sensitive to radiation of a specified wavelength and energy than is the material from which the first dielectric layer is made. After the first dielectric layer and the second dielectric layer are exposed to radiation of a specified wavelength and energy, a portion of the first dielectric layer is removed to form a via, and a portion of the second dielectric layer is removed to form a trench. The via and trench are then filled with a conductive material.

Abstract: The present invention describes a structure having a multilayer stack of thin films, the thin films being a low-dielectric constant material, the thin films having pores, and a method of forming such a structure.

Abstract: Carbon doped oxide (CDO) deposition. One method of deposition includes providing a substrate and introducing oxygen to a carbon doped oxide precursor in the presence of the substrate. A carbon doped oxide film is formed on the substrate. In another method the substrate is placed on a susceptor of a chemical vapor deposition apparatus. A background gas is introduced along with the carbon doped oxide precursor and oxygen to form the carbon doped oxide film on the substrate.

Abstract: A method of converting a hydrophobic surface of a dielectric layer to a hydrophilic surface is described. That method comprises forming a dielectric layer on a substrate, then operating a PECVD reactor to generate a plasma that converts the surface of that layer from a hydrophobic surface to a hydrophilic surface. Also described is a method for making a semiconductor device that employs this technique.

Abstract: A method for carbon doped oxide (CDO) deposition is described. One method of deposition includes providing a substrate and introducing oxygen to a carbon doped oxide precursor in the presence of the substrate. A carbon doped oxide film is formed on the substrate. In another method the substrate is placed on a susceptor of a chemical vapor deposition apparatus. A background gas is introduced along with the carbon doped oxide precursor and oxygen to form the carbon doped oxide film on the substrate.

Abstract: An improved method for making a semiconductor device is described. That method includes forming a first dielectric layer on a substrate, then forming on the first dielectric layer a second dielectric layer. The second dielectric layer is made from a material that is more sensitive to radiation of a specified wavelength and energy than is the material from which the first dielectric layer is made. After the first dielectric layer and the second dielectric layer are exposed to radiation of a specified wavelength and energy, a portion of the first dielectric layer is removed to form a via, and a portion of the second dielectric layer is removed to form a trench. The via and trench are then filled with a conductive material.

Abstract: A method of making an on-die decoupling capacitor for a semiconductor device is described. That method comprises forming a first barrier layer on a conductive layer. The upper surface of the first barrier layer is modified to enable a dielectric layer with an acceptable nucleation density to be formed on the first barrier layer. A dielectric layer is formed on the first barrier layer, and a second barrier layer is formed on the dielectric layer.

Abstract: In accordance with some embodiments, a ferroelectric polymer memory may be formed of a plurality of stacked layers. Each layer may be separated from the ensuing layer by a polyimide layer. The polyimide layer may provide reduced layer-to-layer coupling, and may improve planarization after the lower layer fabrication.

Abstract: A method for improving thickness uniformity and throughput of a carbon doped oxide deposition process is described. That method comprises removing pre-deposition steps in a deposition phase. Moreover, helium plasma is added to a pre-clean phase to eliminate the production of dummy wafers.

Abstract: A method for making a semiconductor device is described. That method comprises forming a carbon doped oxide containing layer and a dielectric layer on a substrate, such that at least part of the dielectric layer is located above at least part of the carbon doped oxide containing layer. A chemical mechanical polishing process is then applied to remove the part of the dielectric layer that is located above the part of the carbon doped oxide containing layer, such that it removes the dielectric layer at a significantly faster rate than it can remove the carbon doped oxide containing layer.

Abstract: A dual gate transistor device and method for fabricating the same. First, a doped substrate is prepared with a patterned oxide layer on the doped substrate defining a channel. Next, a silicon layer is deposited to form the channel, with a gate oxide layer then grown adjacent the channel. Subsequently, a plurality of gate electrodes are formed next to the gate oxide layer and a drain is formed on the channel. After the drain is formed, an ILD layer is deposited. This ILD layer is etched to form a source region contact, a drain region contact, a first gate electrode contact, and a second gate electrode contact.