Patents by Inventor Edi Shmueli

Edi Shmueli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11740281
    Abstract: An integrated circuit (IC) comprising: a margin measurement circuit configured to monitor multiple data paths of the IC and to output, at different times, different ranges of remaining margins of the multiple data paths; a workload sensor configured to output a value representing aggregate operational stress experienced by the IC over a period of time ending at each of the different times; and a processor configured to: (i) compute, based on the value output by said workload sensor, an upper bound and a lower bound of change of the remaining margin of the IC, and (ii) compute upper and lower bounds of a current remaining margin of the IC, based on (a) the upper and lower bounds of change, and (b) a remaining margin indicated by a border between two adjacent ranges outputted by the margin measurement circuit.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: August 29, 2023
    Assignee: PROTEANTECS LTD.
    Inventors: Eyal Fayneh, Edi Shmueli, Alexander Burlak, Evelyn Landman, Inbar Weintrob, Yahel David, Shai Cohen, Guy Redler
  • Publication number: 20220260630
    Abstract: An integrated circuit (IC) comprising: a margin measurement circuit configured to monitor multiple data paths of the IC and to output, at different times, different ranges of remaining margins of the multiple data paths; a workload sensor configured to output a value representing aggregate operational stress experienced by the IC over a period of time ending at each of the different times; and a processor configured to: (i) compute, based on the value output by said workload sensor, an upper bound and a lower bound of change of the remaining margin of the IC, and (ii) compute upper and lower bounds of a current remaining margin of the IC, based on (a) the upper and lower bounds of change, and (b) a remaining margin indicated by a border between two adjacent ranges outputted by the margin measurement circuit.
    Type: Application
    Filed: March 24, 2022
    Publication date: August 18, 2022
    Inventors: Eyal FAYNEH, Edi SHMUELI, Alexander BURLAK, Evelyn LANDMAN, Inbar WEINTROB, Yahel DAVID, Shai COHEN, Guy REDLER
  • Patent number: 9817765
    Abstract: A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations within a storage system, a data module evaluates a data prefetch policy according to a strategy of determining if data exists in a hierarchical memory cache and thereafter amending the data prefetch policy, if warranted. The system then uses the data prefetch policy to perform a read operation from the storage device to minimize future data retrievals from the storage device. Further, in a distributed storage environment that include multiple storage nodes cooperating to satisfy data retrieval requests, dynamic hierarchical memory cache awareness can be implemented for every storage node without degrading the overall performance of the distributed storage environment.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: November 14, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Binny S. Gill, Haim Helman, Edi Shmueli
  • Publication number: 20160048452
    Abstract: A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations within a storage system, a data module evaluates a data prefetch policy according to a strategy of determining if data exists in a hierarchical memory cache and thereafter amending the data prefetch policy, if warranted. The system then uses the data prefetch policy to perform a read operation from the storage device to minimize future data retrievals from the storage device. Further, in a distributed storage environment that include multiple storage nodes cooperating to satisfy data retrieval requests, dynamic hierarchical memory cache awareness can be implemented for every storage node without degrading the overall performance of the distributed storage environment.
    Type: Application
    Filed: October 27, 2015
    Publication date: February 18, 2016
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Binny S. GILL, Haim HELMAN, Edi SHMUELI
  • Patent number: 9201794
    Abstract: Described is a system and computer program product for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system. Specifically, when performing dynamic read operations within a storage system, a data module evaluates a data prefetch policy according to a strategy of determining if data exists in a hierarchical memory cache and thereafter amending the data prefetch policy, if warranted. The system then uses the data prefetch policy to perform a read operation from the storage device to minimize future data retrievals from the storage device. Further, in a distributed storage environment that include multiple storage nodes cooperating to satisfy data retrieval requests, dynamic hierarchical memory cache awareness can be implemented for every storage node without degrading the overall performance of the distributed storage environment.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: December 1, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Binny S. Gill, Haim Helman, Edi Shmueli
  • Patent number: 9201795
    Abstract: A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations within a storage system, a data module evaluates a data prefetch policy according to a strategy of determining if data exists in a hierarchical memory cache and thereafter amending the data prefetch policy, if warranted. The system then uses the data prefetch policy to perform a read operation from the storage device to minimize future data retrievals from the storage device. Further, in a distributed storage environment that include multiple storage nodes cooperating to satisfy data retrieval requests, dynamic hierarchical memory cache awareness can be implemented for every storage node without degrading the overall performance of the distributed storage environment.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: December 1, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Binny S. Gill, Haim Helman, Edi Shmueli
  • Patent number: 8689211
    Abstract: A method for migrating a virtual machine (VM) in a computing environment is provided. The method comprises receiving a request to migrate a VM executing on a source host to a destination host; defining a recovery point to which the VM is restored during recovery from a fault; and iteratively copying a memory of the source host associated with the VM to the destination host. During the copying, the original state of each page in the memory is preserved. At some point, the VM suspends executing on the source host, copies state information associated with the VM to the destination host, and resumes executing on the destination host. If a fault is detected on the source host, the VM is restored to the recovery point using preserved information.
    Type: Grant
    Filed: May 25, 2009
    Date of Patent: April 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Adnan Agbaria, Edi Shmueli
  • Patent number: 8656088
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: February 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Eyal Lotem, Venu G. Nayar, Assaf Nitzan, Edi Shmueli, Daniel F. Smith
  • Patent number: 8645619
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Eyal Lotern, Venu G. Nayar, Assaf Nitzan, Edi Shmueli, Daniel F. Smith
  • Patent number: 8527467
    Abstract: A method, including assigning, to each tier in a storage system comprising multiple tiers, a respective range of priority scores, and calculating a compression ratio for a file stored on one of the multiple tiers. Using the compression ratio, a priority score is calculated for the file, and the file is migrated to the tier whose assigned range of priority scores includes the calculated priority score.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: September 3, 2013
    Assignee: International Business Machines Corporation
    Inventor: Edi Shmueli
  • Publication number: 20130006948
    Abstract: A method, including assigning, to each tier in a storage system comprising multiple tiers, a respective range of priority scores, and calculating a compression ratio for a file stored on one of the multiple tiers. Using the compression ratio, a priority score is calculated for the file, and the file is migrated to the tier whose assigned range of priority scores includes the calculated priority score.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Edi SHMUELI
  • Publication number: 20120297113
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Application
    Filed: May 20, 2011
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Assaf Nitzan, Eyal Lotem, Venu G. Nayar, Edi Shmueli, Daniel F. Smith
  • Publication number: 20120297127
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Assaf Nitzan, Eyal Lotem, Venu G. Nayar, Edi Shmueli, Daniel F. Smith
  • Publication number: 20120297144
    Abstract: A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations within a storage system, a data module evaluates a data prefetch policy according to a strategy of determining if data exists in a hierarchical memory cache and thereafter amending the data prefetch policy, if warranted. The system then uses the data prefetch policy to perform a read operation from the storage device to minimize future data retrievals from the storage device. Further, in a distributed storage environment that include multiple storage nodes cooperating to satisfy data retrieval requests, dynamic hierarchical memory cache awareness can be implemented for every storage node without degrading the overall performance of the distributed storage environment.
    Type: Application
    Filed: June 21, 2012
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Binny S. GILL, Haim HELMAN, Edi SHMUELI
  • Publication number: 20120297142
    Abstract: Described is a system and computer program product for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system. Specifically, when performing dynamic read operations within a storage system, a data module evaluates a data prefetch policy according to a strategy of determining if data exists in a hierarchical memory cache and thereafter amending the data prefetch policy, if warranted. The system then uses the data prefetch policy to perform a read operation from the storage device to minimize future data retrievals from the storage device. Further, in a distributed storage environment that include multiple storage nodes cooperating to satisfy data retrieval requests, dynamic hierarchical memory cache awareness can be implemented for every storage node without degrading the overall performance of the distributed storage environment.
    Type: Application
    Filed: May 20, 2011
    Publication date: November 22, 2012
    Inventors: Binny S. Gill, Haim Helman, Edi Shmueli
  • Patent number: 8291419
    Abstract: The present invention provides a fault tolerant system and method for parallel job execution. In the proposed solution the job state and the state transition control are decoupled. The job execution infrastructure maintains the state information for all the executing jobs, and the job control units, one per-job, control the state transitions of their jobs. Due to the stateless nature of the control units, the system and method allow jobs to continue uninterrupted execution even when the corresponding control units fail.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Yariv Aridor, Tamar Domany, Yevgeny Kliteynik, Edi Shmueli
  • Patent number: 8028291
    Abstract: A method for job selection and resource allocation of massively parallel processors, the method includes: providing to a constraint satisfaction problem solver multiple domains, variables, and constraints representative of a massively parallel processor, of queued job requests and of jobs being processed by the massively parallel processor, and generating, by the constraint satisfaction problem solver a result representative of multiple jobs to be executed, at least partially in parallel, by multiple resources of the massively parallel processor.
    Type: Grant
    Filed: January 22, 2007
    Date of Patent: September 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Yaniv Altshuler, Tamar Domany, Oleg Goldshmidt, Yehuda Naveh, Edi Shmueli
  • Patent number: 7970913
    Abstract: Techniques for maintaining connectivity between a remote application stored on a remote device and an application being executed in a system environment, wherein the system environment is migrated from a first device to a second device, are provided. A first connection between the remote application stored on the remote device and the application being executed in the system environment stored on the first device is established via a first communication over a first negotiation channel. The first negotiation channel connects a first socket layer interface linked to the application being executed in the system environment to a second socket layer interface linked to the remote application. The first connection between the remote application and the application being executed in the system environment is disconnected for migration of the system environment from the first device to the second device. Disconnecting the first connection is coordinated via the first negotiation channel.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: June 28, 2011
    Assignee: International Business Machines Corporation
    Inventors: Zorik Machulsky, Julian Satran, Leah Shalev, Edi Shmueli
  • Publication number: 20100299666
    Abstract: A method for migrating a virtual machine (VM) in a computing environment is provided. The method comprises receiving a request to migrate a VM executing on a source host to a destination host; defining a recovery point to which the VM is restored during recovery from a fault; and iteratively copying a memory of the source host associated with the VM to the destination host. During the copying, the original state of each page in the memory is preserved. At some point, the VM suspends executing on the source host, copies state information associated with the VM to the destination host, and resumes executing on the destination host. If a fault is detected on the source host, the VM is restored to the recovery point using preserved information.
    Type: Application
    Filed: May 25, 2009
    Publication date: November 25, 2010
    Applicant: International Business Machines Corporation
    Inventors: Adnan Agbaria, Edi Shmueli
  • Publication number: 20100169494
    Abstract: Techniques for maintaining connectivity between a remote application stored on a remote device and an application being executed in a system environment, wherein the system environment is migrated from a first device to a second device, are provided. A first connection between the remote application stored on the remote device and the application being executed in the system environment stored on the first device is established via a first communication over a first negotiation channel. The first negotiation channel connects a first socket layer interface linked to the application being executed in the system environment to a second socket layer interface linked to the remote application. The first connection between the remote application and the application being executed in the system environment is disconnected for migration of the system environment from the first device to the second device. Disconnecting the first connection is coordinated via the first negotiation channel.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventors: Zorik Machulsky, Julian Satran, Leah Shalev, Edi Shmueli