Abstract: A strain compensated heterostructure comprising a substrate comprising silicon carbide material; a first epitaxial layer comprising single-crystal aluminum nitride material formed on a top surface of the substrate; a second epitaxial layer formed on the first epitaxial layer opposite the top surface of the substrate, the second epitaxial layer comprising single-crystal scandium aluminum nitride material; and a third epitaxial layer formed on the second epitaxial layer opposite the first epitaxial layer, the third layer comprising single-crystal aluminum nitride material.

Abstract: A transistor and method of fabricating the same comprising a channel layer; an epitaxial barrier layer on the channel layer; an epitaxial cap layer on the epitaxial barrier layer; a dielectric layer on the epitaxial cap layer having an opening through to the epitaxial barrier layer; a gate having angled sidewalls in the opening of the dielectric layer; a mini field plate having angled sidewalls on the gate; and a gate top on the mini field plate, wherein the gate, the mini field plate, and the gate top form a “T” shape.

Abstract: A field effect transistor having a field plate structure for shaping an electric field in a region between the gate and the drain, such field plate structure having: a dielectric layer disposed on gate and on the surface of the semiconductor in the region between gate and the drain; and electric charge disposed in portions of the dielectric layer, a portion of such charge being disposed in the dielectric layer over an upper surface of the gate and another portion of the change extending from the upper surface of the gate into the region between gate and the drain; and wherein the electric charge solely produces the electric field.

Abstract: Embodiments of a single-chip ScAIN tunable filter bank include a plurality of switching elements, and a plurality of channel filters integrated on a monolithic platform. The monolithic platform may comprise a single crystal base and each of the switching elements may comprise at least one of a scandium aluminum nitride (ScAIN) or other Group III-Nitride transistor structure fabricated on the single crystal base. In these embodiments, each channel filter comprises a multi-layered ScAIN structure comprising one or more a single-crystal epitaxial ScAIN layers fabricated on the single crystal base. The ScAIN layers for each channel filter may be based on desired frequency characteristics of an associated one of the RF channels.

Abstract: Photonic devices including a distributed Bragg reflector (DBR) having a stack of Group III-Nitride layers and Aluminum Scandium Nitride layers.

Abstract: A Group III-V semiconductor structure having a semiconductor device. The semiconductor device has a source and drain recess regions extending through a barrier layer and into a channel layer. A regrown, doped Group III-V ohmic contact layer is disposed on and in direct contact with the source and drain recess regions. A gate electrode is disposed in a gap in the regrown, doped Group III-V ohmic contact layer and on the barrier layer A dielectric structure is disposed over the ohmic contact layer and over the barrier layer and extending continuously from a region over the source recess region to one side of the stem portion and then extending continuously from an opposite side of the stem portion to a region over the drain recess region, a portion of the dielectric structure being in contact with the stem portion and the barrier layer.

Abstract: Photonic devices having a photonic waveguiding layer, and a cladding layer, disposed on the photonic waveguiding layer, and where the cladding section is a material comprising Scandium. The cladding layer may include a material comprising Al1-xScxN material where 0<x?0.45.

Abstract: Photonic devices having a quantum well structure that includes a Group III-N material, and a Al1-xScxN cladding layer disposed on the quantum well structure, where 0<x?0.45, the Al1-xScxN cladding layer having a lower refractive index than the index of refraction of the quantum well structure.

Abstract: A Group III-Nitride quantum well laser including a distributed Bragg reflector (DBR). In some embodiments, the DBR includes Scandium. In some embodiments, the DBR includes Al1-xScxN, which may have 0<x?0.45.

Abstract: A semiconductor device having a substrate and an orthorhombic polar crystalline oxide k-Al2O3 layer epitaxially and heterogeneously integrated above a wurtzite single-crystal Group III-Nitride layer comprising AlN disposed above the substrate.

Abstract: A Group III-V semiconductor structure having a semiconductor device. The semiconductor device has a source and drain recess regions extending through a barrier layer and into a channel layer. A regrown, doped Group III-V ohmic contact layer is disposed on and in direct contact with the source and drain recess regions. A gate electrode is disposed in a gap in the regrown, doped Group III-V ohmic contact layer and on the barrier layer A dielectric structure is disposed over the ohmic contact layer and over the barrier layer and extending continuously from a region over the source recess region to one side of the stem portion and then extending continuously from an opposite side of the stem portion to a region over the drain recess region, a portion of the dielectric structure being in contact with the stem portion and the barrier layer.

Abstract: A Group III-V semiconductor structure having a semiconductor device. The semiconductor device has a source and drain recess regions extending through a barrier layer and into a channel layer. A regrown, doped Group III-V ohmic contact layer is disposed on and in direct contact with the source and drain recess regions. A gate electrode is disposed in a gap in the regrown, doped Group III-V ohmic contact layer and on the barrier layer A dielectric structure is disposed over the ohmic contact layer and over the barrier layer and extending continuously from a region over the source recess region to one side of the stem to portion and then extending continuously from an opposite side of the stem portion to a region over the drain recess region, a portion of the dielectric structure being in contact with the stem portion and the barrier layer.

Abstract: A strain compensated heterostructure comprising a substrate comprising silicon carbide material; a first epitaxial layer comprising single-crystal aluminum nitride material formed on a top surface of the substrate; a second epitaxial layer formed on the first epitaxial layer opposite the top surface of the substrate, the second epitaxial layer comprising single-crystal scandium aluminum nitride material; and a third epitaxial layer formed on the second epitaxial layer opposite the first epitaxial layer, the third layer comprising single-crystal aluminum nitride material.

Abstract: Photonic devices having a photonic waveguiding layer, and a cladding layer, disposed on the photonic waveguiding layer, and where the cladding section is a material comprising Scandium. The cladding layer may include a material comprising Al1-xScxN material where 0<x?0.45.

Abstract: Photonic devices having a quantum well structure that includes a Group III-N material, and a Al1-xScxN cladding layer disposed on the quantum well structure, where 0<x?0.45, the Al1-xScxN cladding layer having a lower refractive index than the index of refraction of the quantum well structure.

Abstract: A Group III-Nitride quantum well laser including a distributed Bragg reflector (DBR). In some embodiments, the DBR includes Scandium. In some embodiments, the DBR includes Al1-xScxN, which may have 0<x?0.45.

Abstract: A Group III-V semiconductor structure having a semiconductor device. The semiconductor device has a source and drain recess regions extending through a barrier layer and into a channel layer. A regrown, doped Group III-V ohmic contact layer is disposed on and in direct contact with the source and drain recess regions. A gate electrode is disposed in a gap in the regrown, doped Group III-V ohmic contact layer and on the barrier layer A dielectric structure is disposed over the ohmic contact layer and over the barrier layer and extending continuously from a region over the source recess region to one side of the stem to portion and then extending continuously from an opposite side of the stem portion to a region over the drain recess region, a portion of the dielectric structure being in contact with the stem portion and the barrier layer.

Abstract: Embodiments of a single-chip ScAIN tunable filter bank include a plurality of switching elements, and a plurality of channel filters integrated on a monolithic platform. The monolithic platform may comprise a single crystal base and each of the switching elements may comprise at least one of a scandium aluminum nitride (ScAIN) or other Group III-Nitride transistor structure fabricated on the single crystal base. In these embodiments, each channel filter comprises a multi-layered ScAIN structure comprising one or more a single-crystal epitaxial ScAIN layers fabricated on the single crystal base. The ScAIN layers for each channel filter may be based on desired frequency characteristics of an associated one of the RF channels.

Abstract: Photonic devices having Al1-xScxN and AlyGa1-yN materials, where Al is Aluminum, Sc is Scandium, Ga is Gallium, and N is Nitrogen and where 0<x?0.45 and 0?y?1.

Abstract: A semiconductor structure having: a Group III-N semiconductor; a first dielectric disposed in direct contact with the Group III-N semiconductor; a second dielectric disposed over the first dielectric, the first dielectric having a higher dielectric constant than the second dielectric; a third dielectric layer disposed on the first dielectric layer, such third dielectric layer having sidewall abutting sides of the second dielectric layer; and a gate electrode contact structure. The gate electrode structure comprises: stem portion passing through, and in contact with, the first dielectric and the second dielectric having bottom in contact with the Group III-V semiconductor; and, an upper, horizontal portion extending beyond the stem portion and abutting sides of the third dielectric layer. An electrical interconnect structure has side portions passing through and in contact with the third dielectric layer and has a bottom portion in contact with the horizontal portion of the gate electrode contact structure.