Abstract: A fully differential amplifier that amplifies and filters a signal band of a communications channel, the signal band including a desired signal and at least one blocker signal of an adjacent communications channel, the fully differential amplifier includes a fully differential operational amplifier (op-amp) with a common mode feedback, the fully differential operational amplifier amplifying the desired signal, a variable input resistance connected to an input of the fully differential op-amp, and an asymmetric floating frequency dependent negative resistance (AFFDNR) filter connected to the fully differential op-amp between the input and an output of the fully differential op-amp. A plurality of inputs of the fully differential op-amp may be virtually grounded to reduce swings in a voltage. The AFFDNR filter filters the at least one blocker signal and includes a plurality of resistors that implement a high order filtering of the at least one blocker signal.

Abstract: A technique for providing stable tracking performance to an AGC loop circuit comprises amplifying a wideband radio frequency signal; detecting signals and blockers adjacent to the radio frequency signal; lowering a gain of the radio frequency signal; mixing a local oscillator signal with the radio frequency signal; shifting a frequency of the radio frequency signal from a radio frequency to an intermediate frequency; continuously varying a gain of the intermediate frequency signal; converting the intermediate frequency signal into a digital output signal; comparing the digital output signal with predefined thresholds comprising an upper threshold and a lower threshold; switching a post mixer amplifier (PMA) to a high gain state when an input of a variable gain amplifier (VGA) is greater than the upper threshold, and switching the PMA to a low gain state when an input of the VGA is lower than the lower threshold.

Abstract: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control signal and a square root module configured to receive state information, the state information corresponding to tuning information, the square root module further configured to multiply the control signal by a square root of the state information to provide a tuning signal.

Abstract: A technique for downconverting a RF signal comprises an antenna adapted to receive an RF signal; a transconductance amplifier connected to the antenna and adapted to amplify the RF signal; a passive mixer connected to the transconductance amplifier and adapted for current domain mixing of electrical current transferred from the transconductance amplifier; and a load impedance connected to the passive mixer. The load impedance may comprise a parallel combination of a frequency dependent negative resistance component, a capacitor, and a resistor. The load impedance may comprise a pair of complex poles, a pair of imaginary zeros, and a real pole. Voltages at an input and an output of the passive mixer are related such that the input voltage of the passive mixer is an upconverted version of the output voltage of the passive mixer, wherein the input voltage of the passive mixer is at an output of the transconductance amplifier.

Abstract: A low noise nth order filter, system, and method includes a plurality of nested general immittance converters (GICs) operatively connected to one another in successive GIC stages; and a capacitor operatively connected to each of the GICs, wherein a first successive GIC stage begins at a first node located in between a previous GIC stage and a corresponding capacitor operatively connected to the previous GIC stage. A second successive GIC stage begins at a second node located in between the first node and the first successive GIC stage. The filter may further comprise a resistor operatively connected to at least one successive GIC stage, wherein the resistor is preferably located in between the first node and the first successive GIC stage.

Abstract: A mixer is disclosed having an output stage with an amplifier or gain device configured in a feedback loop to maintain a virtual ground at the input to the gain device. The gain device provides significant dynamic range, gain, and the appropriate impedance matching to insure a low noise output signal of a desired magnitude. Use of an amplifying output stage removes the dependence between mixer gain and mixer configuration, such as mixer bias resistor value, while concurrently overcome undesirable flicker noise that results from use of active devices in the mixer bias structure. A stable virtual ground at the mixer output and gain device input provides linearity over frequency. The gain device may comprises an operational amplifier or trans-resistance/trans-conductance device.

Abstract: A tuner for use in mobile television devices comprises at least one RF front end component comprising a LNA adapted to amplify mobile television signals; a PLL circuit to generate signals; and a pair of mixers to receive the signals from the LNA and the PLL circuit and downconvert the signals; an analog baseband component connected to the RF front end component, wherein the analog baseband component comprises I and Q channel signal paths each comprising a tunable high order impedance filter; at least one signal amplification stage; and a signal filter stage connected to the signal amplification stage, wherein the analog baseband component further comprises a plurality of switches operatively connected to the I and Q channel signal paths, and wherein the plurality of switches are selectively opened and closed in multiple configurations in order to allow the tuner to receive mobile TV signals for all mobile TV standards.

Abstract: A direct conversion radio-frequency (RF) receiver includes a controller and an adaptive continuous-time filter. The adaptive continuous-time filter receives a multiple-bit control signal generated by the controller to adjust a characteristic of the continuous-time filter. The controller generates the multiple-bit control signal in response to process variation in the semiconductor material used to implement the controller and the adaptive continuous-time filter. A method for tuning an adaptive continuous-time filter comprises determining a RC time constant, converting the RC time constant to a digital word, comparing a select bit of the digital word to a respective bit of a predetermined reference word to generate a control bit, applying the control bit to an adjustable element to modify the RC time constant, repeating the determining, converting, comparing and applying steps until the control bits generate an output word and providing the output word to the adaptive continuous-time filter.

Abstract: A radio frequency (RF) mixing circuit including a quadrature mixer that receives non-overlapping in-phase and quadrature local oscillator (LO) signals, and a plurality of low noise amplifiers (LNAs) operatively connected to the quadrature mixer, the plurality of LNAs presenting an input impedance at a baseband. A first voltage at an input node of the quadrature mixer is equal to a second voltage across the (noise cancelled) impedance up-converted to a frequency of a LO signal received by the quadrature mixer. The second voltage across the LNA input impedance includes a frequency of an input signal of the quadrature mixer down-converted by a frequency of the in-phase and quadrature LO signals and filtered by the (noise cancelled) impedance. The quadrature mixer down-converts an input signal by a frequency of the in-phase and quadrature LO signals and transfers the noise cancelled impedance to a RF to achieve a noise cancelled match.

Abstract: A low noise nth order filter, system, and method includes a plurality of nested general immittance converters (GICs) operatively connected to one another in successive GIC stages; and a capacitor operatively connected to each of the GICs, wherein a first successive GIC stage begins at a first node located in between a previous GIC stage and a corresponding capacitor operatively connected to the previous GIC stage. A second successive GIC stage begins at a second node located in between the first node and the first successive GIC stage. The filter may further comprise a resistor operatively connected to at least one successive GIC stage, wherein the resistor is preferably located in between the first node and the first successive GIC stage.

Abstract: A system and method for performing stepped automatic gain control (AGC) for orthogonal-frequency-division-multiplexing (OFDM) applications comprises a radio frequency (RF) tuner and an OFDM demodulator operatively connected to the RF tuner, the OFDM demodulator comprising logic circuitry adapted to (i) detect OFDM symbols from a stream of data; (ii) detect boundaries of the OFDM symbols; (iii) detect a cyclic prefix duration of data values associated with the OFDM symbols; and (iv) provide a feedback to the RF tuner of the information pertaining to the boundaries of the OFDM symbols and the cyclic prefix duration.

Abstract: A circuit and method of reducing noise in the circuit comprises a first transistor and an amplifier operatively connected to the first transistor, wherein the amplifier comprises a plurality of transistors and is adapted to amplify an input signal, and wherein the input signal is differentially captured at an output of the first transistor and the amplifier. Preferably, the plurality of transistors comprises a second transistor and a third transistor. Furthermore, a noise level of the first transistor and the third transistor are preferably cancelled. The size of the second transistor may be approximately 1/50?. Preferably, a gain on an amplifier stage formed by the second transistor and the third transistor is adapted to be increased. Moreover, an equivalent transconductance of the amplifier is preferably independent of an impedance matching on the amplifier. Preferably, a noise figure level of the circuit is less than approximately 1 dB.

Abstract: A phase-locked loop and method are disclosed. One method embodiment includes providing a dual-path filter of a phase-locked loop, the dual-path filter consisting of passive components, and summing control signals in the dual-path filter using the passive components.

Abstract: A dB-linear variable gain amplifier, a method for creation, and a system includes an amplifier; a pair of resistor arrays operatively connected to the amplifier, wherein each resistor array comprises MOS transistor resistive switches; a differential ramp-generator circuit operatively connected to the pair of resistor arrays; and voltage control lines generated by the differential ramp-generator circuit, wherein the voltage control lines are operatively connected to each of the MOS transistor resistive switches in the pair of resistor arrays. The number of the voltage control lines that are operatively connected to the each of the MOS transistor resistive switches is equal to the number of resistors in a particular resistor array. The differential ramp-generator circuit is preferably operable to take an automatic gain control voltage and generate a series of differential ramp voltages and apply the series of differential ramp voltages to one of the MOS transistor resistive switches.

Abstract: A dB-linear variable gain amplifier, a method for creation, and a system includes an amplifier; a pair of resistor arrays operatively connected to the amplifier, wherein each resistor array comprises MOS transistor resistive switches; a differential ramp-generator circuit operatively connected to the pair of resistor arrays; and voltage control lines generated by the differential ramp-generator circuit, wherein the voltage control lines are operatively connected to each of the MOS transistor resistive switches in the pair of resistor arrays. The number of the voltage control lines that are operatively connected to the each of the MOS transistor resistive switches is equal to the number of resistors in a particular resistor array. The differential ramp-generator circuit is preferably operable to take an automatic gain control voltage and generate a series of differential ramp voltages and apply the series of differential ramp voltages to one of the MOS transistor resistive switches.

Abstract: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control signal and a square root module configured to receive state information, the state information corresponding to tuning information, the square root module further configured to multiply the control signal by a square root of the state information to provide a tuning signal.

Abstract: A method of filtering and a RF filtering circuit comprising a LO adapted to generate in-phase and quadrature LO baseband signals; a quadrature passive mixer operatively connected to the LO; a filtering impedance operatively connected to the quadrature passive mixer, wherein the voltage at an input node of the quadrature passive mixer comprises the voltage across the filtering impedance up-converted to a frequency of a LO baseband signal received by the quadrature passive mixer. Preferably, the voltage across the filtering impedance comprises a frequency of an input signal of the quadrature passive mixer down-converted by a frequency of the in-phase and quadrature LO baseband signals and filtered by the filtering impedance.

Abstract: A technique for downconverting a RF signal comprises an antenna adapted to receive an RF signal; a transconductance amplifier connected to the antenna and adapted to amplify the RF signal; a passive mixer connected to the transconductance amplifier and adapted for current domain mixing of electrical current transferred from the transconductance amplifier; and a load impedance connected to the passive mixer. The load impedance may comprise a parallel combination of a frequency dependent negative resistance component, a capacitor, and a resistor. The load impedance may comprise a pair of complex poles, a pair of imaginary zeros, and a real pole. Voltages at an input and an output of the passive mixer are related such that the input voltage of the passive mixer is an upconverted version of the output voltage of the passive mixer, wherein the input voltage of the passive mixer is at an output of the transconductance amplifier.

Abstract: A circuit and method of reducing noise in the circuit comprises a first transistor and an amplifier operatively connected to the first transistor, wherein the amplifier comprises a plurality of transistors and is adapted to amplify an input signal, and wherein the input signal is differentially captured at an output of the first transistor and the amplifier. Preferably, the plurality of transistors comprises a second transistor and a third transistor. Furthermore, a noise level of the first transistor and the third transistor are preferably cancelled. The size of the second transistor may be approximately 1/50?. Preferably, a gain on an amplifier stage formed by the second transistor and the third transistor is adapted to be increased. Moreover, an equivalent transconductance of the amplifier is preferably independent of an impedance matching on the amplifier. Preferably, a noise figure level of the circuit is less than approximately 1 dB.

Abstract: Digital autonomous AGC for a DVB-H receiver comprises detecting a plurality of RF signals entering a LNA in the DVB-H receiver; detecting a RF transmitter blocker signal occurring at the LNA; and differentiating between a desired RF signal and an undesired RF transmitter blocker signal by varying a differential gain of current through the LNA. A RF servo loop is used for detecting the RF transmitter blocker signal. Logic circuitry of the RF servo loop is integrated with a baseband AGC loop to step control the differential gain of current through the LNA. A RF wideband detector is used for detecting the plurality of RF signals entering the LNA; and sending a voltage output corresponding to voltage levels of the RF signals to a plurality of comparators, wherein each of the plurality of comparators are set at a different programmable voltage threshold level compared with one another.