Patents by Inventor Eiichi Amada

Eiichi Amada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4305133
    Abstract: A recursive type digital filter receiving a digital input signal x(n) having a plurality of bits and delivering a ditial output signal y(n) satisfying the following equation, ##EQU1## where n indicates a natural number, M and N orders of time lag in the signal transference, a.sub.k and b.sub.k coefficients defined by a filter characteristic, a.sub.M and b.sub.N b being coefficients which are not equal to zero, comprises an output control circuit for delivering a digital signal indicating a positive or negative limit value in place of the digital output signal y(n) when the amplitude of the signal y(n) exceeds an allowable value. In combination with this output control circuit, the filter also utilizes a feedback signal for calculation purposes which feedback signal has its amplitude reduced from that of y(n) by a predetermined ratio. Further, an arrangement is provided for clearing registers of filter when necessary to prevent overflow oscillation.
    Type: Grant
    Filed: November 16, 1979
    Date of Patent: December 8, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Eiichi Amada, Makoto Ohnishi, Hiroshi Kuwahara
  • Patent number: 4223389
    Abstract: This invention has been made in order to prevent the malfunction due to an overflow, of a combinatorial type recursive digital filter whose feedback side is of the second or higher order. Means for detecting the overflow of the output of an arithmetic unit which executes an addition within the filter is additionally provided, and when the overflow has developed, the contents of shift registers for delay on, at least, the feedback side are reset by an output from the detecting means.
    Type: Grant
    Filed: May 24, 1978
    Date of Patent: September 16, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Eiichi Amada, Makoto Ohnishi
  • Patent number: 4209771
    Abstract: A code converting method in which a multivalue signal x.sub.i sampled at a sampling period of mT, where m (an even number) equals 2.sup.n (n being integer) and x.sub.i is non-negative integer not greater than m, is received and subjected to density conversion to be delivered out in the form of a train of m binary signals sampled at a sampling period of T. A Z-transform Y(Z) of the binary signal to be delivered out is expressed as, ##EQU1## where q.sub.i+1 .ident.q.sub.i +X.sub.i+1 +m, and mod 2; q.sub.o =0 and where H(x.sub.i, q.sub.i, Z) represents a polynomial of the order related to Z.sup.-1 not greater than (m-1) which has non-zero terms having each a coefficient of 1(one) and which satisfies H(k, q.sub.i, 1)=k, H(k, q.sub.i, Z)=Z.sup.-(m-1) H(k,q.sub.i,1/Z) and H(k,0,Z)=H(k,1,Z) for k being an even number, and H(k,0,Z)=Z.sup.-(m-1) H(k,1,1/Z) for k being an odd number.
    Type: Grant
    Filed: September 19, 1978
    Date of Patent: June 24, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Masachika Miyata, Eiichi Amada