Patents by Inventor Emanuele Confalonieri

Emanuele Confalonieri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SYSTEMS AND METHODS FOR PROVIDING FILE INFORMATION IN A MEMORY SYSTEM PROTOCOL
    Publication number: 20170083260
    Abstract: A memory device includes a memory component and controller circuitry. The memory component stores data and the controller circuitry receives, from a host electronic device, one or more commands of a memory system protocol. The one or more commands include at least one write command, the write command comprising one or more blocks of data to be stored in the memory component. Further, the one or more commands include metadata, attributes, or both related to the one or more blocks of data. The controller circuitry interprets and executes the one or more commands. Accordingly, the blocks are stored in the memory component. Further, the controller circuitry of the memory device has access to the metadata, attributes or both.
    Type: Application
    Filed: September 21, 2015
    Publication date: March 23, 2017
    Inventors: Danilo Caraccio, Graziano Mirichigni, Gianfranco Santopietro, Gianfranco Ferrante, Emanuele Confalonieri
  • Apparatus, electronic devices and methods associated with an operative transition from a first interface to a second interface
    Patent number: 9529736
    Abstract: Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in association with operative transitions between two or more interfaces that share at least one block of memory. The apparatus may support single channel or multi-channel memory access, write protection state logic, or various interface priority schemes.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: December 27, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Giulio Albini, Emanuele Confalonieri
  • Multi-interface memory with access control
    Patent number: 9405475
    Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels of same.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: August 2, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Giulio Albini, Emanuele Confalonieri, Francesco Mastroianni
  • Multi-channel memory and power supply-driven channel selection
    Patent number: 9384785
    Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels of same.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: July 5, 2016
    Assignee: Micron Technology, Inc.
    Inventor: Emanuele Confalonieri
  • MULTI-PARTITIONING OF MEMORIES
    Publication number: 20160085476
    Abstract: Various embodiments comprise devices to manage multiple memory types and reconfigure partitions in a memory device as directed by a host. In one embodiment, the apparatus is to manage commands through a first interface controller to mapped portions of a first memory not having an attribute enhanced set, and map portions of a second memory having the attribute enhanced set through a second interface controller. Additional devices are described.
    Type: Application
    Filed: November 30, 2015
    Publication date: March 24, 2016
    Inventors: Danilo Caraccio, Emanuele Confalonieri, Federico Tiziani
  • APPARATUS, ELECTRONIC DEVICES AND METHODS ASSOCIATED WITH AN OPERATIVE TRANSITION FROM A FIRST INTERFACE TO A SECOND INTERFACE
    Publication number: 20160055103
    Abstract: Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in association with operative transitions between two or more interfaces that share at least one block of memory. The apparatus may support single channel or multi-channel memory access, write protection state logic, or various interface priority schemes.
    Type: Application
    Filed: November 4, 2015
    Publication date: February 25, 2016
    Inventors: Giulio Albini, Emanuele Confalonieri
  • Multi-partitioning of memories
    Patent number: 9201705
    Abstract: Various embodiments comprise apparatuses and methods including a method of reconfiguring partitions in a memory device as directed by a host. The method includes managing commands through a first interface controller to mapped portions of a first memory not having an attribute enhanced set, and mapping portions of a second memory having the attribute enhanced set through a second interface controller. Additional apparatuses and methods are described.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: December 1, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Danilo Caraccio, Emanuele Confalonieri, Federico Tiziani
  • Apparatus, electronic devices and methods associated with an operative transition from a first interface to a second interface
    Patent number: 9189444
    Abstract: Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in association with operative transitions between two or more interfaces that share at least one block of memory. The apparatus may support single channel or multi-channel memory access, write protection state logic, or various interface priority schemes.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: November 17, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Giulio Albini, Emanuele Confalonieri
  • Preparation of memory device for access using memory access type indicator signal
    Patent number: 9183135
    Abstract: Subject matter disclosed herein relates to memory devices or accessing memory devices, and more particularly, but by way of example and not limitation, to preparation of a memory device to perform a memory access operation based at least partly on at least one indicator signal that indicates a memory access type.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: November 10, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Massimo Iaculo, Ornella Vitale, Giuseppe D'Eliseo, Danilo Caraccio, Francesco Falanga, Emanuele Confalonieri
  • Memory with guard value dependent error correction
    Patent number: 9026890
    Abstract: Embodiments of the present disclosure provide methods, systems, and apparatuses related to calculating an error correction code for a program page dependent on guard values that correspond to words of the program page. Other embodiments may be described and claimed.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: May 5, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Emanuele Confalonieri, Sara Villa
  • VOLATILE MEMORY ARCHITECUTRE IN NON-VOLATILE MEMORY DEVICES AND RELATED CONTROLLERS
    Publication number: 20150095551
    Abstract: In some embodiments, one register of a non-volatile memory can be used for read operations and another register of the non-volatile memory can be used for programming operations. For instance, a cache register of a NAND flash memory can be used in connection with read operations and a data register of the NAND flash memory can be used in connection with programming operations. Data registers of a plurality of non-volatile memory devices, such as NAND flash memory devices, can implement a distributed volatile cache (DVC) architecture in a managed memory device, according to some embodiments. According to certain embodiments, data can be moved and/or swapped between registers to perform certain operations in the non-volatile memory devices without losing the data stored while other operations are performed.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 2, 2015
    Applicant: Micron Technology, Inc.
    Inventors: Emanuele Confalonieri, Dionisio Minopoli
  • Multi-Interface Memory With Access Control
    Publication number: 20150067254
    Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels of same.
    Type: Application
    Filed: November 6, 2014
    Publication date: March 5, 2015
    Inventors: Giuliu Albini, Emanuele Confalonieri, Francesco Mastroianni
  • APPARATUS, ELECTRONIC DEVICES AND METHODS ASSOCIATED WITH AN OPERATIVE TRANSITION FROM A FIRST INTERFACE TO A SECOND INTERFACE
    Publication number: 20150032927
    Abstract: Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in association with operative transitions between two or more interfaces that share at least one block of memory. The apparatus may support single channel or multi-channel memory access, write protection state logic, or various interface priority schemes.
    Type: Application
    Filed: August 8, 2014
    Publication date: January 29, 2015
    Inventors: Giulio ALBINI, Emanuele CONFALONIERI
  • Multi-interface memory with access control
    Patent number: 8918594
    Abstract: Apparatus and methods disclose techniques to control access to a memory array. The memory array can be accessed by either a first interface or a second interface. A switch register grants privilege levels, which control access. For example, a high privilege level can grant access and a low privilege level can deny access. A status register indicates when an interface with a high privilege level is busy accessing the memory array.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: December 23, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Giulio Albini, Emanuele Confalonieri, Francesco Mastroianni
  • Configurable partitions for non-volatile memory
    Patent number: 8856487
    Abstract: Example embodiments for configuring a non-volatile memory device may comprise configuring M physical partitions of the non-volatile memory into two or more banks, wherein the two or more banks respectively comprise one or more of the M physical partitions, and wherein at least a first of the M physical partitions comprises a first size and wherein at least a second of the M physical partitions comprises a second size.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: October 7, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Emanuele Confalonieri, Corrado Villa
  • Apparatus, electronic devices and methods associated with an operative transition from a first interface to a second interface
    Patent number: 8806164
    Abstract: Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in association with operative transitions between two or more interfaces that share at least one block of memory. The apparatus may support single channel or multi-channel memory access, write protection state logic, or various interface priority schemes.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: August 12, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Giulio Albini, Emanuele Confalonieri
  • MULTI-PARTITIONING OF MEMORIES
    Publication number: 20140223087
    Abstract: Various embodiments comprise apparatuses and methods including a method of reconfiguring partitions in a memory device as directed by a host. The method includes managing commands through a first interface controller to mapped portions of a first memory not having an attribute enhanced set, and mapping portions of a second memory having the attribute enhanced set through a second interface controller. Additional apparatuses and methods are described.
    Type: Application
    Filed: April 8, 2014
    Publication date: August 7, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Danilo Caraccio, Emanuele Confalonieri, Federico Tiziani
  • Temperature alert and low rate refresh for a non-volatile memory
    Patent number: 8762656
    Abstract: A method and apparatus are described for measuring a temperature within a non-volatile memory, storing, in a register within the non-volatile memory, a temperature alert comprising one or more bits indicating the non-volatile memory has exceeded a threshold temperature for a period of time, determining, by a host, that the temperature alert is active, and in response to the determination that the temperature alert is active, refreshing at least a portion of the non-volatile memory.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: June 24, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Emanuele Confalonieri, Daniele Balluchi
  • MEMORY WITH GUARD VALUE DEPENDENT ERROR CORRECTION
    Publication number: 20140149823
    Abstract: Embodiments of the present disclosure provide methods, systems, and apparatuses related to calculating an error correction code for a program page dependent on guard values that correspond to words of the program page. Other embodiments may be described and claimed.
    Type: Application
    Filed: January 28, 2014
    Publication date: May 29, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Emanuele Confalonieri, Sara Villa
  • MULTI-CHANNEL MEMORY AND POWER SUPPLY-DRIVEN CHANNEL SELECTION
    Publication number: 20140112071
    Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels of same.
    Type: Application
    Filed: December 2, 2013
    Publication date: April 24, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Emanuele Confalonieri