Patents by Inventor Eric A. Hudson

Eric A. Hudson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120205
    Abstract: A method for performing an etch process on a substrate includes applying a bias signal and a source signal to an electrode of a plasma processing system. The bias signal and the source signal are pulsed RF signals that together define a repeated pulsed RF cycle, wherein each pulsed RF cycle sequentially includes a first state, a second state, a third state, and a fourth state. The power level of the bias signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state. The power level of the source signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state.
    Type: Application
    Filed: June 16, 2022
    Publication date: April 11, 2024
    Inventors: Aniruddha Joi, Nikhil Dole, Merrett Wong, Eric Hudson, Jay Sheth
  • Publication number: 20240120209
    Abstract: A method for etching a stack is described. The method includes etching a first nitrogen-containing layer of the stack by applying a non-metal gas and discontinuing the application of the non-metal gas upon determining that a first oxide layer is reached. The first oxide layer is under the first nitrogen-containing layer. The method further includes etching the first oxide layer by applying a metal-containing gas. The application of the metal-containing gas is discontinued upon determining that a second nitrogen-containing layer will be reached. The second nitrogen-containing layer is situated under the first oxide layer. The method includes etching the second nitrogen-containing layer by applying the non-metal gas.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 11, 2024
    Inventors: Nikhil Dole, Takumi Yanagawa, Eric A. Hudson, Merrett Wong, Aniruddha Joi
  • Patent number: 11935730
    Abstract: Systems and methods for cleaning an edge ring pocket are described herein. One of the methods includes providing one or more process gases to a plasma chamber, supplying a low frequency (LF) radio frequency (RF) power to an edge ring that is located adjacent to a chuck of the plasma chamber. The LF RF power is supplied while the one or more process gases are supplied to the plasma chamber to maintain plasma within the plasma chamber. The supply of the LF RF power increases energy of plasma ions near the edge ring pocket to remove residue in the edge ring pocket. The LF RF power is supplied during the time period in which a substrate is not being processed within the plasma chamber.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: March 19, 2024
    Assignee: Lam Research Corporation
    Inventors: Eric Hudson, Scott Briggs, John Holland, Alexei Marakhtanov, Felix Leib Kozakevich, Kenneth Lucchesi
  • Publication number: 20240082044
    Abstract: A portable urine collection system (200) may include a urine collection device, a conduit (217) in fluid communication with the urine collection device (212), a urine collection container (214) having an interior region, a pump (216), and a container support (202). The pump is in fluid communication with the urine collection container and is configured to pull a vacuum on the interior region of the urine collection container effective to draw urine from the urine collection device through the conduit into the urine collection container. The container support is configured to detachably secure to a wheelchair and support at least the urine collection container.
    Type: Application
    Filed: January 6, 2022
    Publication date: March 14, 2024
    Inventors: Hoang Nguyen, Charles Shermer, Katherine Van Orden, Camie L. Meller, Eric Alan Fallows, Eric Portante, Hersh Patel, Melody Kuroda, Melissa Young Joyner, Dana Ahmad Abdelal, Vinayaka Kulkarni, Audrey Earnshaw, Patrick Hudson Chancy
  • Publication number: 20230369061
    Abstract: A method for etching features in a silicon containing stack below a patterned mask in an etch chamber is provided. The stack is partially etched by providing a halogen containing etch gas and forming the halogen containing etch gas into a halogen containing plasma, wherein the halogen containing plasma partially etches features into the stack, wherein the features have an etch front. A metal catalyst containing layer is deposited on the etch front of the features by providing a metal catalyst containing gas, forming the metal catalyst containing gas into a metal catalyst containing plasma, and selectively depositing more of the metal catalyst containing layer on the etch front and bottoms of the features than tops of the features.
    Type: Application
    Filed: December 8, 2021
    Publication date: November 16, 2023
    Inventors: Leonid BELAU, Eric HUDSON
  • Publication number: 20230335378
    Abstract: Various embodiments herein relate to methods and apparatus for etching a recessed feature in a material on a substrate. For example, the methods may include (a) flowing a gas mixture into a processing chamber, where the gas mixture includes an etch component and a passivation component, and where the passivation component includes particular elements and/or species and/or is provided under particular conditions; (b) generating a plasma from the gas mixture in the processing chamber; and (c) exposing the substrate to the plasma and etching the recessed feature in the material on the substrate. In many cases, the material being etched on the substrate includes dielectric material and/or an electrically conductive material.
    Type: Application
    Filed: September 17, 2021
    Publication date: October 19, 2023
    Inventor: Eric A. Hudson
  • Publication number: 20230317412
    Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF-period, and to assist in the re-striking of the bottom plasma during the ON -period.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 5, 2023
    Inventors: Alexei Marakhtanov, Rajinder Dhindsa, Eric Hudson, Andrew D. Bailey, III
  • Publication number: 20230298896
    Abstract: High aspect ratio features are formed in a substrate using etching and deposition processes. A partially etched feature is formed by exposure to plasma in a plasma etch chamber. A metal-based liner is subsequently deposited in the partially etched feature using the same plasma etch chamber. The metal-based liner is robust and prevents lateral etch in subsequent etching operations. The metal-based liner may be deposited at temperatures or pressures comparable to temperatures or pressures for etch processes. The metal-based liner may be localized in certain portions of the partially etched feature. Etching proceeds within the feature after deposition without lateral etching in regions where the metal-based liner is deposited.
    Type: Application
    Filed: February 22, 2022
    Publication date: September 21, 2023
    Inventors: Gregory Clinton Veber, Shuang Pi, Taner Ozel, Eric A. Hudson, Qing Xu, Merrett Wong, Amit Mukhopadhyay, Walter Thomas Ralston
  • Publication number: 20230268192
    Abstract: A method for selectively etching at least one feature in a first region with respect to a second region of a stack is provided. The first region is selectively etched with respect to the second region to form at least one partial feature in the first region, the at least one partial feature having a depth with respect to a surface of the second region. An in-situ a fluorine-free, non-conformal, carbon-containing mask is deposited over the first region and the second region, wherein the carbon-containing mask is selectively deposited on the second region at a second thickness with respect to the first region at a first thickness, the second thickness being greater than the first thickness. The first region is further etched in-situ to etch the at least one partial feature and wherein the carbon-containing mask acts as an etch mask for the second region.
    Type: Application
    Filed: June 13, 2022
    Publication date: August 24, 2023
    Inventors: Eric HUDSON, Kapu Sirish REDDY, Ragesh PUTHENKOVILAKAM, Shashank DESHMUKH, Prabhat KUMAR, Prabhakara GOPALADASU, Seokmin YUN, Xin ZHANG
  • Publication number: 20230260759
    Abstract: Various embodiments herein relate to methods and systems for integrating a vapor deposition process and an etch process in a single reactor. The vapor deposition process involves delivery of at least one deposition vapor in the absence of plasma. The etch process is a plasma etch process. Various features may be combined as desired to promote high quality deposition and etching results.
    Type: Application
    Filed: October 22, 2021
    Publication date: August 17, 2023
    Inventors: Eric A. Hudson, Andrew Clark Serino, Thad Nicholson, Ramesh Chandrasekharan, Alan M. Schoepp
  • Publication number: 20230230804
    Abstract: A method for applying RF power in a plasma process chamber is provided, including: generating a first RF signal; generating a second RF signal; generating a third RF signal; wherein the first, second, and third RF signals are generated at different frequencies; combining the first, second and third RF signals to generate a combined RF signal, wherein a wave shape of the combined RF signal is configured to approximate a sloped square wave shape; applying the combined RF signal to a chuck in the plasma process chamber.
    Type: Application
    Filed: July 6, 2021
    Publication date: July 20, 2023
    Inventors: Ranadeep Bhowmick, Felix Kozakevich, Alexei Marakhtanov, John Holland, Eric Hudson
  • Patent number: 11670486
    Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF-period, and to assist in the re-striking of the bottom plasma during the ON-period.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: June 6, 2023
    Assignee: Lam Research Corporation
    Inventors: Alexei Marakhtanov, Rajinder Dhindsa, Eric Hudson, Andrew D. Bailey, III
  • Publication number: 20230127597
    Abstract: Various embodiments herein relate to methods and apparatus for etching recessed features on a semiconductor substrate. The techniques described herein can be used to form high quality recessed features with a substantially vertical profile, low bowing, low twisting, and highly circular features. These high quality results can be achieved with a high degree of selectivity and a relatively high etch rate. In various embodiments, etching involves exposing the substrate to plasma generated from a processing gas that includes a chlorine source, a carbon source, a hydrogen source, and a fluorine source. The chlorine source may have particular properties. In some cases, particular chlorine sources may be used. Etching typically occurs at low temperatures, for example at about 25C or lower.
    Type: Application
    Filed: March 10, 2021
    Publication date: April 27, 2023
    Inventors: Rui Takahashi, Yilun Li, Eric A. Hudson, Youn-Jin Oh, Wonjae Lee, Leonid Belau, Andrew Clark Serino
  • Publication number: 20230081817
    Abstract: Provided herein are methods and apparatus for processing a substrate by exposing the substrate to plasma to simultaneously (i) etch features in an underlying material (e.g., which includes one or more dielectric materials), and (ii) deposit a upper mask protector layer on a mask positioned over the dielectric material, where the upper mask protector layer forms on top of the mask in a selective vertically-oriented directional deposition. Such methods and apparatus may be used to achieve infinite etch selectivity, even when etching high aspect ratio features.
    Type: Application
    Filed: January 29, 2021
    Publication date: March 16, 2023
    Inventors: Leonid Belau, Eric A. Hudson
  • Patent number: 11594400
    Abstract: A plasma processing system includes a plasma chamber having a substrate support, and a multi-zone gas injection upper electrode disposed opposite the substrate support. An inner plasma region is defined between the upper electrode and the substrate support. The multi-zone gas injection upper electrode has a plurality of concentric gas injection zones. A confinement structure, which surrounds the inner plasma region, has an upper horizontal wall that interfaces with the outer electrode of the upper electrode. The confinement structure has a lower horizontal wall that interfaces with the substrate support, and includes a perforated confinement ring and a vertical wall that extends from the upper horizontal wall to the lower horizontal wall. The lower surface of the upper horizontal wall, an inner surface of the vertical wall, and an upper surface of the lower horizontal wall define a boundary of an outer plasma region, which surrounds the inner plasma region.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: February 28, 2023
    Assignee: Lam Research Corporation
    Inventors: Ryan Bise, Rajinder Dhindsa, Alexei Marakhtanov, Lumin Li, Sang Ki Nam, Jim Rogers, Eric Hudson, Gerardo Delgadino, Andrew D. Bailey, III, Mike Kellogg, Anthony de la Llera, Darrell Ehrlich
  • Publication number: 20230005717
    Abstract: A method for multi-state pulsing to achieve a balance between bow control and mask selectivity is described. The method includes generating a primary radio frequency (RF) signal. The primary RF signal pulses among three states including a first state, a second state, and a third state. The method further includes generating a secondary RF signal. The secondary RF signal pulses among the three states. During the first state, the primary RF signal has a power level that is greater than a power level of the secondary RF signal. Also, during the second state, the secondary RF signal has a power level that is greater than a power level of the primary RF signal. During the third state, power levels of the primary and secondary RF signals are approximately equal.
    Type: Application
    Filed: December 3, 2020
    Publication date: January 5, 2023
    Inventors: Nikhil Dole, Merrett Tinlok Wong, Eric Hudson, Sangheon Lee, Xiaoqiang Yao
  • Publication number: 20220362803
    Abstract: Methods and apparatuses for selectively etching silicon-and-oxygen-containing material relative to silicon-and-nitrogen-containing material by selectively forming a carbon-containing self-assembled monolayer on a silicon-and-nitrogen-containing material relative to a silicon-and-oxygen-containing material are provided herein. Methods are also applicable to selectively etching silicon-and-nitrogen-containing material relative to silicon-and-oxygen-containing material.
    Type: Application
    Filed: October 15, 2020
    Publication date: November 17, 2022
    Applicant: Lam Research Corporation
    Inventors: Eric A. Hudson, Chia-Chun Wang, Sumit Agarwal, Ryan James Gasvoda
  • Publication number: 20220282366
    Abstract: Provided herein are methods and related apparatus for depositing an ashable hard mask (AHM) on a substrate in a low pressure chamber using a dual frequency radio frequency component. Low pressure plasma enhanced chemical vapor deposition may be used to increase the etch selectivity of the AHM, permitting the use of a thinner AHM for semiconductor processing operations.
    Type: Application
    Filed: August 28, 2020
    Publication date: September 8, 2022
    Applicant: Lam Research Corporation
    Inventors: Matthew Scott Weimer, Ragesh Puthenkovilakam, Gordon Alex Macdonald, Shaoqing Zhang, Shih-Ked Lee, Jun Xue, Samantha S.H. Tan, Xizhu Zhao, Mary Anne Manumpil, Eric A. Hudson, Chin-Jui Hsu
  • Publication number: 20220254616
    Abstract: Systems and methods for cleaning an edge ring pocket are described herein. One of the methods includes providing one or more process gases to a plasma chamber, supplying a low frequency (LF) radio frequency (RF) power to an edge ring that is located adjacent to a chuck of the plasma chamber. The LF RF power is supplied while the one or more process gases are supplied to the plasma chamber to maintain plasma within the plasma chamber. The supply of the LF RF power increases energy of plasma ions near the edge ring pocket to remove residue in the edge ring pocket. The LF RF power is supplied during the time period in which a substrate is not being processed within the plasma chamber.
    Type: Application
    Filed: July 22, 2020
    Publication date: August 11, 2022
    Inventors: Eric Hudson, Scott Briggs, John Holland, Alexei Marakhtanov, Felix Leib Kozakevich, Kenneth Lucchesi
  • Publication number: 20220199417
    Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.
    Type: Application
    Filed: March 16, 2020
    Publication date: June 23, 2022
    Inventors: Jon HENRI, Karthik S. COLINJIVADI, Francis Sloan ROBERTS, Kapu Sirish REDDY, Samantha SiamHwa TAN, Shih-Ked LEE, Eric HUDSON, Todd SHROEDER, Jialing YANG, Huifeng ZHENG