Patents by Inventor Eric A. Miller

Eric A. Miller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11816998
    Abstract: An Aerial Robotics Network (ARN) Management Infrastructure (MI) (also referred to as ARNMI) that provides a mechanism for the management of aerobots.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: November 14, 2023
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: X, Jonathan Evans, Andrew McCollough, Dana Maher, Jake Nylund, Eric Miller, Chase Fiedler
  • Publication number: 20230359812
    Abstract: Systems and methods for populating the elements of content are disclosed. One method includes determining a plurality of elements of a document and receiving a first speech input from a user to enable a mode of operation. The method further includes authenticating the user by comparing the first speech input with at least one voice sample of the user and enabling the mode of operation. The method further includes receiving, in the mode of operation, a second speech input for filling out a first element of the document and determining an irregularity or distortion in the second speech input based on the first element and identifying a missing syllable or a distorted syllable. The method further includes refining the second speech input into at least one matching syllable, converting the refined second speech input, and providing the text to populate the first element with the text.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Applicant: Wells Fargo Bank, N.A.
    Inventors: Gerard K. Cohen, Edmund Gauci, Eric Miller
  • Publication number: 20230356377
    Abstract: A battery-operated palm stapler, an insert for holding a fastener, and a method of installing a fastener using the palm stapler. The stapler includes a housing with a telescoping barrel extending outwardly therefrom. An insert is engaged in the barrel's bore and is held in place by magnets. The insert body defines a slot for receiving fasteners therein. The slot extends from a top wall of the body to a bottom wall thereof. At least one magnet is provided in the body adjacent the slot and is used to hold fasteners in a correct orientation for installation. A sensor probe provided in the body is operable to detect if voltage is carried in electrical cables adjacent which fasteners are to be installed. The probe deactivates a hammer actuating mechanism if voltage is detected. Inserts holding different types of fastener may be selectively engaged with the palm stapler.
    Type: Application
    Filed: July 12, 2023
    Publication date: November 9, 2023
    Applicant: Brahma Industries LLC
    Inventors: Mark Ferris, Eric A. Miller, JR., John D. Fiegener, Marcus R. Hanna, Ryan Thompson, William P. Liteplo
  • Publication number: 20230360876
    Abstract: A planar filament 11f can include multiple materials to increase electron emission in desired directions and to suppress electron emission in undesired directions. The filament 11f can include a core-material CM between a top-material TM and a bottom-material BM. The top-material TM can have a lowest work function WFt; the bottom-material BM can have a highest work function WFb; and the core-material CM can have an intermediate work function WFc (WFt<WFc<WFb). A width Wt of the filament 11f at a top-side 31t can be greater than its width Wb at a bottom-side 31b (Wt>Wb). This shape makes it easier to coat the edges 31e with the bottom-material BM, because the edges 31e tilt toward and partially face the sputter target. This shape also helps direct more electrons to a center of the target 14, and reduce electron emission in undesired directions.
    Type: Application
    Filed: June 23, 2023
    Publication date: November 9, 2023
    Inventor: Eric MILLER
  • Publication number: 20230362783
    Abstract: Systems and methods for reducing the amount of messages transmitted in large-scale distributed mesh networks are disclosed. Network components include transceivers and memory storing instructions which, when executed by a processing unit, reduce transmissions made by the transceiver within the network. The instructions executed by processing unit could (1) create an expiration parameter to limit the number of times a signal is retransmitted, (2) form groups of network components from which one or a few of the group network components are designated to respond on behalf of the group, (3) keep advertising transmissions dormant by default until called upon, (4) employ a time delay parameter for a time interval in which no transmission may be made, and (5) include message IDs in control signals that are transmitted.
    Type: Application
    Filed: January 4, 2023
    Publication date: November 9, 2023
    Inventors: Eric Miller, James Hawkins, Sebastian R. Borda, Federico Pfaffendorf, Keenan McCall
  • Patent number: 11806854
    Abstract: A battery-operated palm stapler, an insert for holding a fastener, and a method of installing a fastener using the palm stapler. The stapler includes a housing with a telescoping barrel extending outwardly therefrom. An insert is engaged in the barrel's bore and is held in place by magnets. The insert body defines a slot for receiving fasteners therein. The slot extends from a top wall of the body to a bottom wall thereof. At least one magnet is provided in the body adjacent the slot and is used to hold fasteners in a correct orientation for installation. A sensor probe provided in the body is operable to detect if voltage is carried in electrical cables adjacent which fasteners are to be installed. The probe deactivates a hammer actuating mechanism if voltage is detected. Inserts holding different types of fastener may be selectively engaged with the palm stapler.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: November 7, 2023
    Assignee: BRAHMA INDUSTRIES LLC
    Inventors: Mark Ferris, Eric A. Miller, Jr., John D. Fiegener, Marcus R. Hanna, Ryan Thompson, William P. Liteplo
  • Publication number: 20230347488
    Abstract: A battery-operated palm stapler, an insert for holding a fastener, and a method of installing a fastener using the palm stapler. The stapler includes a housing with a telescoping barrel extending outwardly therefrom. An insert is engaged in the barrel’s bore and is held in place by magnets. The insert body defines a slot for receiving fasteners therein. The slot extends from a top wall of the body to a bottom wall thereof. At least one magnet is provided in the body adjacent the slot and is used to hold fasteners in a correct orientation for installation. A sensor probe provided in the body is operable to detect if voltage is carried in electrical cables adjacent which fasteners are to be installed. The probe deactivates a hammer actuating mechanism if voltage is detected. Inserts holding different types of fastener may be selectively engaged with the palm stapler.
    Type: Application
    Filed: July 12, 2023
    Publication date: November 2, 2023
    Applicant: Brahma Industries LLC
    Inventors: Mark FERRIS, Eric A. MILLER, Jr., John D. FIEGENER, Marcus R. HANNA, Ryan THOMPSON, William P. LITEPLO
  • Patent number: 11796069
    Abstract: A system including a valve. The valve includes a valve body having an interior volume and a bore along a first axis. A stem extends along a second axis and a flow control element couples to the stem. The stem selectively moves the flow control element through the interior volume between a closed position and an open position relative to the bore. A valve insert system retains a pressurized lubricant in the interior volume.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: October 24, 2023
    Assignee: CAMERON INTERNATIONAL CORPORATION
    Inventors: Sandra Gavela, Zachary Walters, Codie Smith, Loc Gia Hoang, Eric Miller
  • Patent number: 11791398
    Abstract: A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: October 17, 2023
    Assignee: International Business Machines Corporation
    Inventors: Donald Canaperi, Richard A. Conti, Thomas J. Haigh, Jr., Eric Miller, Son Nguyen
  • Publication number: 20230282722
    Abstract: A semiconductor device including a first nanodevice is located on a substrate, where the first nanodevice includes at least one channel. A first source/drain connected to the first nanodevice. A second nanodevice located on the substrate, where the second nanodevice includes at least one channel and a second source/drain connected to the second nanodevice. A first contact located above the first source/drain. A second contact located above the second source/drain. A contact cap located on top of the first contact and the second contact, where the contact cap has a first leg that extends downwards between the first contact and the second contact. The first leg of the contact cap is in contact with a first sidewall of the first contact, and a first sidewall of the second contact.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 7, 2023
    Inventors: Julien Frougier, Sagarika Mukesh, Albert M Chu, Ruilong Xie, Andrew M. Greene, Eric Miller, Junli Wang, Veeraraghavan S. Basker, Prateek Hundekar, Tushar Gupta, Su Chen Fan
  • Publication number: 20230275141
    Abstract: A technique relates to a semiconductor device. A first epitaxial material is formed under a bottom surface of a set of fins, the first epitaxial material being under fin channel regions of the set of fins. A second epitaxial material is formed adjacent to the first epitaxial material and remote from the fin channel regions, a combination of the first epitaxial material and the second epitaxial material forming a bottom source or drain (source/drain) layer. A top source/drain layer is formed on an upper portion of the set of fins, gate material being disposed around the set of fins between the top source/drain layer and the bottom source/drain layer.
    Type: Application
    Filed: May 10, 2023
    Publication date: August 31, 2023
    Inventors: Tao Li, Indira Seshadri, Nelson Felix, Eric Miller
  • Patent number: 11728120
    Abstract: A planar filament 11f can include multiple materials to increase electron emission in desired directions and to suppress electron emission in undesired directions. The filament 11f can include a core-material CM between a top-material TM and a bottom-material BM. The top-material TM can have a lowest work function WFt; the bottom-material BM can have a highest work function WFb; and the core-material CM can have an intermediate work function WFc(WFt<WFc<WFb). A width Wt of the filament 11f at a top-side 31t can be greater than its width Wb at a bottom-side 31b (Wt>Wb). This shape makes it easier to coat the edges 31e with the bottom-material BM, because the edges 31e tilt toward and partially face the sputter target. This shape also helps direct more electrons to a center of the target 14, and reduce electron emission in undesired directions.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: August 15, 2023
    Assignee: Moxtek, Inc.
    Inventor: Eric Miller
  • Patent number: 11720526
    Abstract: Apparatus and associated methods relate to generating energy blocks on a blockchain corresponding to generation, transmission, and consumption of predetermined quanta of energy represented by corresponding records in an associated Merkle trie. In an illustrative example, individual energy data records may be hashed. Each hash may be stored in a leaf node of a Merkle trie. The individual energy data records may be aggregated to correspond to represent a predetermined quantum of energy. The individual energy data records may include energy generation records. The energy blocks may be associated with scheduling, delivery, and consumption data for the energy quantum. Various embodiments may advantageously provide secure, verifiable, and immutable tracking and processing of energy generation, transmission, and consumption of physical energy quanta across one or more distributed energy networks.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: August 8, 2023
    Assignee: ClearTrace Technologies, Inc.
    Inventors: Eric Miller, Evan Caron, Troy Martin
  • Patent number: 11715950
    Abstract: Apparatus and associated methods relate to automatically load matching, in time, energy physically generated and transmitted to a consumption location across at least one tracking and processing infrastructure. In an illustrative example, a load pool (LP) may be created based on energy consumed at a physical location at one or more selected time periods. A generation pool (GP) may, for example, be created based on energy generated and physically available for consumption at the physical location during the time periods. Associations may be created, for example, between measurements in the GP of energy generated and transmitted and measurements in the LP of energy consumed. The associations may be created as a function of predetermined privileges associated with the consumption location and generation locations and/or physical transmission links corresponding to the GP during the time periods. Various embodiments may advantageously determine environmental impact based on location and time-based load matching.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: August 1, 2023
    Assignee: ClearTrace Technologies, Inc.
    Inventors: Eric Miller, Neil Zumwalde, Robert Astrich, Brian Lakamp, Evan Caron, Zachary Livingston, Benjamin Grimes, Troy Martin
  • Publication number: 20230238323
    Abstract: Interconnect structures including signal lines, power lines and ground lines are configured for improvements in routing and scaling. Vertical stacking of the relatively wide power and ground lines allows for additional signal tracks in the same footprint of a standard cell or other electronic device. Alternatively, vertical stacking of the signal lines allows an increased number of signal tracks. Such interconnect structures are formed during back-end-of-line processing using subtractive or damascene interconnect integration techniques.
    Type: Application
    Filed: January 26, 2022
    Publication date: July 27, 2023
    Inventors: Christopher J. Penny, Nicholas Anthony Lanzillo, Albert Chu, Ruilong Xie, Lawrence A. Clevenger, DANIEL JAMES DECHENE, Eric Miller, PRASAD BHOSALE
  • Patent number: 11710768
    Abstract: An apparatus including a substrate and a first nanosheet device located on the substrate. A second nanosheet device is located on the substrate, where the second nanosheet device is adjacent to the first nanosheet device. At least one first gate located on the first nanosheet device and the at least one first gate has a first width. At least one second gate located on the second nanosheet device and the at least one second gate has a second width. The first width and the second width are substantially the same. A diffusion break located between the first nanosheet device and the second nanosheet device. The diffusion break prevents the first nanosheet device from contacting the second nanosheet device, and the diffusion break has a third width. The third width is larger than the first width and the second width.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: July 25, 2023
    Assignee: International Business Machines Corporation
    Inventors: Eric Miller, Indira Seshadri, Andrew M. Greene, Julien Frougier, Veeraraghavan S. Basker
  • Patent number: 11695059
    Abstract: A technique relates to a semiconductor device. A first epitaxial material is formed under a bottom surface of a set of fins, the first epitaxial material being under fin channel regions of the set of fins. A second epitaxial material is formed adjacent to the first epitaxial material and remote from the fin channel regions, a combination of the first epitaxial material and the second epitaxial material forming a bottom source or drain (source/drain) layer. A top source/drain layer is formed on an upper portion of the set of fins, gate material being disposed around the set of fins between the top source/drain layer and the bottom source/drain layer.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: July 4, 2023
    Assignee: International Business Machines Corporation
    Inventors: Tao Li, Indira Seshadri, Nelson Felix, Eric Miller
  • Publication number: 20230187510
    Abstract: Embodiments disclosed herein include a semiconductor structure having a first lower device and a second lower device laterally adjacent to the first lower device at a lower level of the semiconductor structure, a first upper device and a second upper device laterally adjacent to the first upper device at an upper level of the semiconductor structure. The upper level may be vertically above the lower level. The semiconductor structure may also include an angled via electrically connecting the lower device and the first upper device. The angled via may include an angled surface laterally between the first upper device and the second upper device that is angled toward the first upper device relative to a vertical axis.
    Type: Application
    Filed: December 15, 2021
    Publication date: June 15, 2023
    Inventors: Ruilong Xie, Oleg Gluschenkov, Eric Miller, Yasir Sulehria
  • Publication number: 20230187549
    Abstract: A semiconductor device having a self-aligned contact gate dielectric cap, or “SAC cap” over the gate stack and spacer. A SAC cap ear exists over the sidewall of a top portion of the spacer at a location where no S/D contact is formed. A method of forming the semiconductor device comprises: (i) forming gate stack; (ii) recessing ILD to create topography of the gate stack; (iii) forming selective gate cap deposition over the gate stack; and/or (iv) forming self-aligned contact with respect to the selective gate cap.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 15, 2023
    Inventors: Ruilong Xie, CHANRO PARK, Julien Frougier, Kangguo Cheng, Eric Miller, Ekmini Anuja De Silva
  • Patent number: D1003586
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: November 7, 2023
    Assignee: ALLBIRDS INC.
    Inventors: Jamie McLellan, Michael Tremblay, Eric Miller