Patents by Inventor Erich Franz Haratsch

Erich Franz Haratsch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8879182
    Abstract: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A road channel reads sectors in a desired track of the storage medium. A decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track and a second adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of each adjacent track and subtracts the estimated ITI of each adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the decoder, which decodes the ITI cancelled data and provides the decoded ITI cancelled data as output of the read channel.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: November 4, 2014
    Assignee: LSI Corporation
    Inventors: Erich Franz Haratsch, George Mathew, Ming Jin, Jongseung Park, Timothy W. Swatosh, Timothy B. Lund, Carl E. Forhan
  • Patent number: 8830613
    Abstract: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. An iterative decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of the adjacent track and subtracts the estimated ITI of the adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the iterative decoder, which decodes the ITI cancelled data and provides the decoded ITI cancelled data as output data of the read channel.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: September 9, 2014
    Assignee: LSI Corporation
    Inventors: Timothy B. Lund, Carl E. Forhan, Timothy W. Swatosh, Erich Franz Haratsch, George Mathew, Ming Jin, Jongseung Park
  • Patent number: 8693119
    Abstract: Described embodiments cancel inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads one or more sectors in the desired track and generates one or more groups of sample values corresponding to each of the sectors. An ITI canceller estimates an ITI response and an ITI signal for each sample value corresponding to (i) a next adjacent track and (ii) a previous adjacent track. If the estimated ITI response of the previous adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the previous adjacent track from each associated sample value of the desired track. If the estimated ITI response of the next adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the next adjacent track from each associated sample value of the desired track.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: April 8, 2014
    Assignee: LSI Corporation
    Inventors: George Mathew, Erich Franz Haratsch, Jongseung Park, Timothy B. Lund
  • Publication number: 20130223199
    Abstract: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. An iterative decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of the adjacent track and subtracts the estimated ITI of the adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the iterative decoder, which decodes the ITI cancelled data and provides the decoded ITI cancelled data as output data of the read channel.
    Type: Application
    Filed: August 22, 2012
    Publication date: August 29, 2013
    Inventors: Timothy B. Lund, Carl E. Forhan, Timothy W. Swatosh, Erich Franz Haratsch, George Mathew, Ming Jin, Jongseung Park
  • Patent number: 8407571
    Abstract: Methods and apparatus are provided for performing SOVA detection at higher data rates than achievable with conventional designs. A received signal is processed by (i) determining at least three selection signals that define a plurality of paths through a multiple-step trellis into a given state, wherein a first of the plurality of paths is a winning path for each single-step-trellis period of a multiple-step-trellis cycle, a second path is a winning path for a first single-step-trellis period and is a losing path for a second single-step-trellis period of a multiple-step-trellis cycle and a third path is a losing path for a first single-step-trellis period and is a winning path for a second single-step-trellis period of a multiple-step-trellis cycle; and (ii) determining at least one reliability value (such as a reliability value for a bit decision associated with a maximum-likelihood path through the multiple-step trellis or a plurality of reliability values for each multiple-step-trellis cycle).
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: March 26, 2013
    Assignee: Agere Systems LLC
    Inventors: Jonathan James Ashley, Kelly Knudson Fitzpatrick, Erich Franz Haratsch
  • Publication number: 20130070362
    Abstract: Described embodiments cancel inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads one or more sectors in the desired track and generates one or more groups of sample values corresponding to each of the sectors. An ITI canceller estimates an ITI response and an ITI signal for each sample value corresponding to (i) a next adjacent track and (ii) a previous adjacent track. If the estimated ITI response of the previous adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the previous adjacent track from each associated sample value of the desired track. If the estimated ITI response of the next adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the next adjacent track from each associated sample value of the desired track.
    Type: Application
    Filed: August 22, 2012
    Publication date: March 21, 2013
    Inventors: George Mathew, Erich Franz Haratsch, Jongseung Park, Timothy B. Lund
  • Publication number: 20130021689
    Abstract: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. A decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track and a second adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of each adjacent track and subtracts the estimated ITI of each adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the decoder, which decodes the ITT cancelled data and provides the decoded ITI cancelled data as output of the read channel.
    Type: Application
    Filed: August 22, 2012
    Publication date: January 24, 2013
    Inventors: Erich Franz Haratsch, George Mathew, Ming Jin, Jongseung Park, Timothy W. Swatosh, Timothy B. Lund, Carl E. Forhan
  • Patent number: 8321770
    Abstract: A path comparison unit is disclosed for determining paths in a trellis that compete with a survivor path. The disclosed path comparison unit comprises a first type functional unit comprising a multiplexer and a register to store one or more survivor bits associated with the survivor path; and at least two second type functional units, wherein each second type functional unit comprises a multiplexer and a logical circuit to compute at least one equivalence bit indicating whether the bit for a respective path and the bit for the survivor path are equivalent. Generally, the respective path is one or more of a win-lose path and a lose-win path.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: November 27, 2012
    Assignee: Agere Systems Inc.
    Inventors: Kelly Knudson Fitzpatrick, Erich Franz Haratsch
  • Patent number: 8189704
    Abstract: A method and apparatus are provided for joint equalization and decoding of multilevel codes, such as the Multilevel Threshold-3 (MLT-3) code, which are transmitted over dispersive channels. The MLT-3 code is treated as a code generated by a finite-state machine using a trellis having state dependencies between the various states. A super trellis concatenates the MLT-3 trellis with a trellis representation of the channel. Joint equalization and decoding of the received signal can be performed using the super trellis. A sequence detector is disclosed that uses the super trellis or a corresponding reduced-state trellis to perform joint equalization and decoding of the received signal to decode the MLT-3 coded data bits. The sequence detector may be embodied using maximum likelihood sequence estimation that applies the optimum Viterbi algorithm or a reduced complexity sequence estimation method, such as the reduced-state sequence estimation (RSSE) algorithm.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: May 29, 2012
    Assignee: Agere Systems Inc.
    Inventors: Kameran Azadet, Erich Franz Haratsch
  • Publication number: 20120128056
    Abstract: A method and apparatus are disclosed for performing joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations. An RSSE scheme is disclosed that cancels the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. The disclosed RSSE technique for multidimensional codes applies where the number of trellis code dimensions exceeds the number of channels. The disclosed RSSE decoder computes the intersymbol interference caused by previously decoded multidimensional code symbols and subtracts the intersymbol interference from the received signal. In addition, a branch metrics unit compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 24, 2012
    Applicant: AGERE SYSTEMS INC.
    Inventors: Kameran Azadet, Erich Franz Haratsch
  • Patent number: 8095857
    Abstract: A method and apparatus are disclosed for performing joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations. An RSSE scheme is disclosed that cancels the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. The disclosed RSSE technique for multidimensional codes applies where the number of trellis code dimensions exceeds the number of channels. The disclosed RSSE decoder computes the intersymbol interference caused by previously decoded multidimensional code symbols. In addition, a branch metrics unit compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. In addition, the disclosed RSSE decoder compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: January 10, 2012
    Assignee: Agere Systems Inc.
    Inventors: Kameran Azadet, Erich Franz Haratsch
  • Patent number: 7937649
    Abstract: A reliability unit is provided for determining a reliability value for at least one bit decision. The disclosed reliability unit comprises one or more functional elements, wherein each of the functional elements comprises at least four functional units and at least two registers, wherein each functional unit comprises a comparator and a multiplexer, and wherein an output of the comparator and an equivalence bit control the multiplexer. Generally, the reliability unit determines a reliability value for a bit decision associated with a maximum-likelihood path through a multiple-step trellis.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: May 3, 2011
    Assignee: Agere Systems Inc.
    Inventors: Jonathan James Ashley, Kelly Knudson Fitzpatrick, Erich Franz Haratsch
  • Patent number: 7913154
    Abstract: A method and apparatus for the implementation of reduced state sequence estimation is disclosed, with an increased throughput using precomputation (look-ahead), with only a linear increase in hardware complexity with respect to the look-ahead depth. The present invention limits the increase in hardware complexity by taking advantage of past decisions (or survivor symbols). The critical path of a conventional RSSE implementation is broken up into at least two smaller critical paths using pipeline registers. Various reduced state sequence estimation implementations are disclosed that employ one-step or multiple-step look-ahead techniques to process a signal received from a dispersive channel having a channel memory.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: March 22, 2011
    Assignee: Agere Systems Inc.
    Inventors: Kameran Azadet, Erich Franz Haratsch
  • Patent number: 7865814
    Abstract: A path metric difference computation unit is disclosed for computing path differences through a multiple-step trellis. Path differences are computed between paths through a multiple-step trellis, wherein a first path is a winning path for each single-step-trellis period of a multiple-step-trellis cycle, a second path is a winning path for a first single-step-trellis period and is a losing path for a second single-step-trellis period and a third path is a losing path for a first single-step-trellis period and is a winning path for a second single-step-trellis period.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: January 4, 2011
    Assignee: Agere Systems Inc.
    Inventors: Jonathan James Ashley, Kelly Knudson Fitzpatrick, Erich Franz Haratsch
  • Patent number: 7702991
    Abstract: A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback in magnetic recording systems. A read channel signal is processed in a magnetic recording device by precomputing branch metrics, intersymbol interference estimates or intersymbol interference-free signal estimates for speculative sequences of one or more channel symbols; selecting one of the precomputed values based on at least one decision from at least one corresponding state; and selecting a path having a best path metric for a given state.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: April 20, 2010
    Assignee: Agere Systems Inc.
    Inventor: Erich Franz Haratsch
  • Publication number: 20100091832
    Abstract: A pipelined decision feedback unit (DFU) is disclosed for use in reduced-state Viterbi detectors with local feedback. The disclosed pipelined decision feedback unit improves the maximum data rate that may be achieved by the reduced state Viterbi detector by the pipelined computation of partial intersymbol interfence-based estimates. A pipelined decision feedback unit is thus disclosed that computes a plurality of partial intersymbol interference based estimates, wherein at least one partial intersymbol interference-based estimate is based on a selected partial intersymbol interference-based estimate; and selects the selected partial intersymbol interference-based estimate from among partial intersymbol interference-based estimates for path extensions into a state.
    Type: Application
    Filed: December 17, 2009
    Publication date: April 15, 2010
    Applicant: AGERE SYSTEMS INC.
    Inventor: Erich Franz Haratsch
  • Publication number: 20100050060
    Abstract: A path comparison unit is disclosed for determining paths in a trellis that compete with a survivor path. The disclosed path comparison unit comprises a first type functional unit comprising a multiplexer and a register to store one or more survivor bits associated with the survivor path; and at least two second type functional units, wherein each second type functional unit comprises a multiplexer and a logical circuit to compute at least one equivalence bit indicating whether the bit for a respective path and the bit for the survivor path are equivalent. Generally, the respective path is one or more of a win-lose path and a lose-win path.
    Type: Application
    Filed: August 26, 2009
    Publication date: February 25, 2010
    Applicant: AGERE SYSTEMS INC.
    Inventors: Jonathan James Ashley, Kelly Knudson Fitzpatrick, Erich Franz Haratsch
  • Patent number: 7656959
    Abstract: A pipelined decision feedback unit (DFU) is disclosed for use in reduced-state Viterbi detectors with local feedback. The disclosed pipelined decision feedback unit improves the maximum data rate that may be achieved by the reduced state Viterbi detector by the pipelined computation of partial intersymbol interference-based estimates. A pipelined decision feedback unit is thus disclosed that computes a plurality of partial intersymbol interference based estimates, wherein at least one partial intersymbol interference-based estimate is based on a selected partial intersymbol interference-based estimate; and selects the selected partial intersymbol interference-based estimate from among partial intersymbol interference-based estimates for path extensions into a state.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: February 2, 2010
    Assignee: Agere Systems Inc.
    Inventor: Erich Franz Haratsch
  • Patent number: 7653154
    Abstract: A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback. The maximum data rate that may be achieved by the disclosed reduced-state Viterbi detectors is improved by precomputing a number of candidate intersymbol interference estimates and performing pipelined selection of an appropriate intersymbol interference estimate. A reduced-state Viterbi detector is thus disclosed that precomputes intersymbol interference estimates for speculative sequences of one or more channel symbols; selects one of said precomputed intersymbol interference estimates based on at least one decision from at least one corresponding state using at least two pipeline registers; and selects a path having a best path metric for a given state. In an alternative implementation, intersymbol interference estimate-free signal estimates are selected among precomputed ones.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: January 26, 2010
    Assignee: Agere Systems Inc.
    Inventor: Erich Franz Haratsch
  • Patent number: 7653868
    Abstract: A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback. The maximum data rate that may be achieved by the disclosed reduced state Viterbi detectors is improved by precomputing a number of candidate branch metrics and performing pipelined selection of an appropriate branch metric. A reduced state Viterbi detector is thus disclosed that precomputes branch metrics for speculative sequences of one or more channel symbols; selects one of said precomputed branch metrics based on at least one decision from at least one corresponding state using at least two pipeline registers; and selects a path having a best path metric for a given state.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: January 26, 2010
    Assignee: Agere Systems Inc.
    Inventor: Erich Franz Haratsch