Abstract: The inventive concept relates to a user system including a solid state disk. The user system may include a main memory for storing data processed by a central processing unit; and a solid state disk for storing the selected data among data stored in the main memory. The main memory and the solid state disk form a single memory hierarchy. Thus, the user system of the inventive concept can rapidly process data.

Abstract: An operating method of a computing system includes storing, in a submission queue, a command entry corresponding to a request for one of input and output; fetching the command entry from the submission queue, moving data corresponding to the request within a host memory that is under control of a storage device; after moving the data, updating a completion status of the request in a completion queue; and after updating the completion queue, transferring the data between the host memory and the storage device.

Abstract: A semiconductor device includes a plurality of chips including first and second chips, each of the first and second chips including a first input terminal receiving a first token input signal, a first output terminal outputting a first token output signal, a second input terminal receiving a second token input signal, and a second output terminal outputting a second token output signal. The first and second chips are coupled to each other in a bi-directional ring structure such that the first output terminal of the first chip is coupled to the first input terminal of the second chip and the second output terminal of the second chip is coupled to the second input terminal of the first chip. Each of the first and second chips performs a corresponding peak zone operation according to the first token input signal and the second token input signal.

Abstract: A semiconductor device may comprise a plurality of chips coupled in a bidirectional ring structure. The plurality of chips includes a first chip, and the first chip determines whether a token is required to perform a specific operation in the first chip. The first chip further determines whether an amount of an available token in the first chip is equal to or greater than an amount of the required token to perform the specific operation. When the amount of the available token is equal to or greater than the amount of the required token, the first chip performs the specific operation and then the first chip outputs one or both of a first portion of the available token in a first direction and a second portion of the available token in a second direction. The first direction is opposite to the second direction in the bidirectional ring structure.

Abstract: A semiconductor device may comprise a plurality of chips coupled in a ring structure, and the plurality of chips includes a first chip. Each of the plurality of chips may include a key port receiving or outputting a key to circulate the key through the ring structure. The first chip is configured to be in a standby state until an amount of available token becomes equal to or greater than an amount of required token to perform a specific operation in the first chip, when the first chip has the key.

Abstract: Disclosed is a device for maintaining consistency between a host system cache and a main memory in a general-purpose computing system equipped with a hardware accelerator for processing main memory data. The device for maintaining data consistency between a hardware accelerator and a host system, which is at least temporarily implemented by a computer, includes a determination unit responsible for determining whether an address which the hardware accelerator should access is present in a cache, and a processing unit responsible for selectively performing write-back on data corresponding to the address when the address is present in the cache based on the determined result.

Abstract: Disclosed is a main memory capable of speeding up a hardware accelerator and saving memory space. The main memory according to the present disclosure is at least temporarily implemented by a computer and includes a memory, and an accelerator responsible for performing an operation for hardware acceleration while sharing the storage space of a host processor and the memory.

Abstract: A semiconductor device includes a plurality of chips including first and second chips, each of the first and second chips including a first input terminal receiving a first token input signal, a first output terminal outputting a first token output signal, a second input terminal receiving a second token input signal, and a second output terminal outputting a second token output signal. The first and second chips are coupled to each other in a bi-directional ring structure such that the first output terminal of the first chip is coupled to the first input terminal of the second chip and the second output terminal of the second chip is coupled to the second input terminal of the first chip. Each of the first and second chips performs a corresponding peak zone operation according to the first token input signal and the second token input signal.

Abstract: A controller controls data input/output for a semiconductor memory device. The controller includes a first buffer configured to perform data transmission between an interface and the semiconductor memory device, a first control unit configured to control the semiconductor memory device according to an external request, and a second control unit configured to control the first buffer and the first control unit to simultaneously process a plurality of external requests according to a pipeline scheme.

Abstract: A data storage device includes a first memory device configured to store data having a first property, and a second memory device including a first block configured to store data having a second property and a second block configured to store data transferred from the first memory device.

Abstract: A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored.

Abstract: The inventive concept relates to a user system including a solid state disk. The user system may include a main memory for storing data processed by a central processing unit; and a solid state disk for storing the selected data among data stored in the main memory. The main memory and the solid state disk form a single memory hierarchy. Thus, the user system of the inventive concept can rapidly process data.

Abstract: The inventive concept relates to a user system including a solid state disk. The user system may include a main memory for storing data processed by a central processing unit; and a solid state disk for storing the selected data among data stored in the main memory. The main memory and the solid state disk form a single memory hierarchy. Thus, the user system of the inventive concept can rapidly process data.

Abstract: A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored.

Abstract: A data storage device includes a first memory device configured to store data having a first property, and a second memory device including a first block configured to store data having a second property and a second block configured to store data transferred from the first memory device.

Abstract: The inventive concept relates to a user system including a solid state disk. The user system may include a main memory for storing data processed by a central processing unit; and a solid state disk for storing the selected data among data stored in the main memory. The main memory and the solid state disk form a single memory hierarchy. Thus, the user system of the inventive concept can rapidly process data.