Abstract: A mode setting method and a mode setting device for a monitoring system are provided. The mode setting method includes: selecting one or a plurality of monitoring objects; selecting a corresponding display template from preset display templates for each of the one or the plurality of monitoring objects, and associating and packaging each of the one or the plurality of monitoring objects and the selected display template in a one-to-one correspondence, and generating one or a plurality of single display units; selecting a single display unit from the generated single display units according to a monitoring scene; and placing the selected single display unit into a corresponding block of a monitoring interface layout of the monitoring system, and storing the same.

Abstract: This application describes systems and methods for facilitating memory access on flash drives. An example method may start with receiving a read command on a flash memory from a host specifying a logic block address (LBA). The flash memory may include a plurality of blocks grouped into a plurality of super blocks, and each of the plurality of blocks may include a plurality of pages. The method may further include determining a zone identification and an LBA offset based on the LBA; determining a flash physical address (FPA) corresponding to the LBA by accessing a mapping table stored in a random access memory (RAM) according to the zone identification and the LBA offset (e.g., the mapping table includes a plurality of FPAs arranged in a plurality of zones corresponding to the plurality of super blocks); and determining a page number and a block identification corresponding to the FPA.

Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser. The present technology is non-custodial, wherein a public-private key pair, which represents user identity, is created on a client machine and then directly encrypted by a third-party platform without relying on one centralized computing system.

Abstract: A solid state drive (SSD) includes an NAND memory and an SSD controller. The SSD controller includes an interface coupled to a host machine, a nonvolatile memory controller coupled to the interface, and a processor coupled to the nonvolatile memory controller. The SSD controller is configured to: receive, via the interface, a write command from the host machine; process, by the nonvolatile memory controller, the write command; transmit, from the nonvolatile memory controller to the processor, a system message; process, by the processor according to Zoned Namespaces (ZNS) protocol, the system message; obtain, by the nonvolatile memory controller via the interface, host data for storage from the host machine; and write the host data to the NAND memory based on a result of processing the system message. Processing the system message by the processor and obtaining the host data by the nonvolatile memory controller are executed in parallel.

Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser. The present technology is non-custodial, wherein a public-private key pair, which represents user identity, is created on a client machine and then directly encrypted by a third-party platform without relying on one centralized computing system.

Abstract: The electric all-terrain vehicle includes a vehicle frame, a motor, a gearbox, a cargo compartment, a battery pack, a handle assembly and a walking wheel. The motor is arranged on the vehicle frame and located at a rear end of the vehicle frame. The gearbox is arranged on the vehicle frame and located on a first side of the motor, and the gearbox is connected with the motor. The cargo compartment is arranged on the vehicle frame and located above the motor and the gearbox. The battery pack is mounted on a bracket to provide power for the electric all-terrain vehicle. The handle assembly is arranged on the cargo compartment and allows an adjustment of the handle assembly to lock or unlock the cargo compartment from the vehicle frame. The walking wheel is arranged on the vehicle frame and includes a rear wheel connected with the gearbox.

Abstract: An SSD includes an MRAM, an NAND memory, and an SSD controller. The SSD controller is configured to receive first data from a host machine, save the first data to an SSD data buffer, fetch the first data from the SSD data buffer and write the first data to the MRAM via the MRAM controller, determine, by the data allocation circuit based on a characteristic of the first data, whether to save the first data to the MRAM or the NAND memory, and in response to determining saving the first data to the NAND memory, read the first data from the MRAM, write the first data to the NAND memory, and erase the first data from the MRAM.

Abstract: Embodiments of the disclosure provide devices and methods for performing a top-k function. The device can include: a memory comprising a plurality of register files for storing the data elements, the plurality of register files comprising a parent register file and a first child register file associated with the parent register file, wherein the parent register file is associated with: first interface circuitry configured for reading a first parent data element from the parent register file and receiving a first child data element and a second child data element from the first child register file; and first comparison circuitry configured for updating the parent register file and the first child register file based on the first parent data element, the first child data element, and the second child data element according to a given principle.

Abstract: Provided are a method, apparatus and system for measuring total radiated power of an array antenna. The method includes: determining a Rayleigh resolution of the array antenna in an angle space, and setting a stepping grid spacing of sampling points according to the Rayleigh resolution; determining the sampling points according to the stepping grid spacing, measuring equivalent isotropic radiated power (EIRP) at positions of the sampling points and determining the TRP according to the EIRP. Compared with a traditional rest mode using an angle stepping grid ?grid and ?grid of 15°, this reduces measurement errors; and additionally, through a normalized wave vector space transformation, the number of sampling points is further reduced, and the measurement efficiency is improved.

Abstract: A number of domain specific accelerators (DSA1-DSAn) are integrated into a conventional processing system (100) to operate on the same chip by adding additional instructions to a conventional instruction set architecture (ISA), and further adding an accelerator interface unit (130) to the processing system (100) to respond to the additional instructions and interact with the DSAs.

Abstract: Provided are a method, apparatus and system for measuring total radiated power of an array antenna. The method includes: determining a Rayleigh resolution of the array antenna in an angle space, and setting a stepping grid spacing of sampling points according to the Rayleigh resolution; determining the sampling points according to the stepping grid spacing, measuring equivalent isotropic radiated power (EIRP) at positions of the sampling points, and determining the TRP according to the EIRP. Compared with a traditional test mode using an angle stepping grid ?grid and ?grid of 15°, this reduces measurement errors; and additionally, through a normalized wave vector space transformation, the number of sampling points is further reduced, and the measurement efficiency is improved.

Abstract: The present invention relates to the technical field of chemical drug synthesis, and specifically relates to a method for preparing a compound as shown in formula I, comprising: treating the compound as shown in formula VII with an acid to generate the compound as shown in formula I. The method has few synthetic process steps, raw materials which is stable and is easy to prepare, a reaction process which is easy to control, and a high overall yield and purity, and is suitable for industrial preparation.

Abstract: The invention provides a biomass-based hyperbranched adsorption material with multi-adsorption sites to multiple heavy metal ions and a preparation method thereof. The biomass-based hyperbranched adsorption material with multi-adsorption sites to multiple heavy metal ions is prepared by one-step instant-crosslinking method using a biomass raw material as matrix and a hyperbranched polymer containing chelating atoms of N, O, and S as functional reagent, wherein the hyperbranched polymer has two or more different adsorption sites (containing elements such as N, S, O, etc.) to heavy metal ions.

Abstract: A system-in-package architecture in accordance with aspects includes a logic die and one or more memory dice coupled together in a three-dimensional slack. The logic die can include one or more global building blocks and a plurality of local building blocks. The number of local building blocks can be scalable. The local building blocks can include a plurality of engines and memory controllers. The memory controllers can be configured to directly couple one or more of the engines to the one or more memory dice. The number and type of local building blocks, and the number and types of engines and memory controllers can be scalable.

Abstract: Disclosed is a method for preparing a C-nucleoside compound represented by Formula (III) or salt thereof. The present method has a high reaction yield, is simple to operate, uses a single metal reagent, has stable reaction temperature conditions, does not require frequent changes to the reaction system during the operation process, is suitable for scale-up synthesis, is suitable for large-scale production of Remdesivir, and has low costs.

Abstract: A device for temperature measurement, includes a blackbody configured to radiate a specified temperature, an infrared thermal imaging camera configured to measure a temperature of a target surface of the blackbody and a temperature of an object and at least one processor configured to calibrate the temperature of the object based on the specified temperature and the temperature of the target surface.

Abstract: A flash memory device includes a plurality of flash memory cell arrays, wherein: a flash memory cell array in the plurality of flash memory cell arrays comprises a plurality of layers of flash memory cell planes; and a flash memory cell plane includes a plurality of flash memory cells. The flash memory device further includes a logic circuitry coupled to the plurality of flash memory cell arrays, configured to perform operations using the plurality of flash memory cell arrays; and a sensing circuitry configured to access a corresponding flash memory cell plane among the plurality of flash memory cell planes.

Abstract: A dual-model memory interface of a computing system is provided, configurable to present memory interfaces having differently-graded bandwidth capacity to different processors of the computing system. A mode switch controller of the memory interface controller, based on at least an arbitration rule written to a configuration register, switches the memory interface controller between a narrow-band mode and a wide-band mode. In each mode, the memory interface controller disables either a plurality of narrow-band memory interfaces of the memory interface controller according to a first bus standard, or a wide-band memory interface of the memory interface controller according to a second bus standard. The memory interface controller virtualizes a plurality of system memory units of the computing system as a virtual wide-band memory unit according to the second bus standard, or virtualizes a system memory unit of the computing system as a virtual narrow-band memory unit according to the first bus standard.

Abstract: A memory system for accelerating graph neural network processing can include an on-host chip memory to cache data needed for processing a current root node. The system can also include a volatile memory interface between the host and non-volatile memory. The volatile memory can be configured to save one or more sets of next root nodes, neighbor nodes and corresponding attributes. The non-volatile memory can have sufficient capacity to store the entire graph data. The non-volatile memory can also be configured to pre-arrange the sets of next root nodes, neighbor nodes and corresponding attributes for storage in the volatile memory.

Abstract: The present invention provides a black plaster producing device that comprises a workbench, longitudinal supports, a transverse bottom plate, an electric-heated thermostatic drying oven, and a storage rack structure for classified storage, a storage bucket, a stove, a boiling furnace, a furnace cover, a stirring box, a box cover, a stirring motor, a stirring pipe, a crushing blade, an adjustable partition frame structure, a rolling frame structure, a gas inlet pipe, a pipe valve, a stirring switch, a rolling switch and a receiving bucket, wherein the longitudinal supports are welded at four corners at the lower part of the workbench respectively, and the transverse bottom plate is screwed at the lower part of the longitudinal supports on the inner side. The transverse partition plate of the present invention is screwed at the central position inside the storage box, which facilitates the convenient storage of materials in the storage box during use and can classify the stored materials at the same time.