Abstract: A method of scheduling instructions in a processing system comprising a processing unit and one or more co-processors comprises dispatching a plurality of instructions from a master processor to a co-processor of the one or more co-processors, wherein each instruction of the plurality of instructions comprises one or more additional fields, wherein at least one field comprises grouping information operable to consolidate the plurality of instructions for decomposition, and wherein at least one field comprises control information. The method also comprises decomposing the plurality of instructions into a plurality of fine-grained instructions, wherein the control information comprises rules associated with decomposing the plurality of instructions into the plurality of fine-grained instructions. Further, the method comprises scheduling the plurality of fine-grained instructions to execute on the co-processor, wherein the scheduling is performed in a non-sequential order.

Abstract: A method of performing out-of-order execution in a processing system comprising a processing unit and one or more accelerators comprises dispatching a plurality of coarse-grained instructions, each instruction extended to comprise one or more tags, wherein each tag comprises dependency information for the respective instruction expressed at a coarse-grained level. The method also comprises translating the plurality of coarse-grained instructions into a plurality of fine-grained instructions, wherein the dependency information is translated into dependencies expressed at a fine-grained level. Further, the method comprises resolving the dependencies at the fine-grained level and scheduling the plurality of fine-grained instructions for execution across the one or more accelerators in the processing system.

Abstract: The present disclosure relates to a method for controlling execution of a GEMM operation on an accelerator comprising multiple computation units, a first memory device, and a second memory device. The method comprises determining an execution manner of the GEMM operation, the execution manner comprising partition information of the GEMM operation and computation unit allocation information of the partitioned GEMM operation; generating one or more instructions to compute the partitioned GEMM operation on one or more allocated computation units; and issuing the one or more instructions to at least one of a first queue and a second queue, which enables at least one of a first local controller and a second local controller to execute the one or more instructions, wherein the first local controller and the second local controller are configured to control data movement between the computation units, the first memory device, and the second memory device.

Abstract: A system-in-package architecture in accordance with aspects includes a logic die and one or more memory dice coupled together in a three-dimensional slack. The logic die can include one or more global building blocks and a plurality of local building blocks. The number of local building blocks can be scalable. The local building blocks can include a plurality of engines and memory controllers. The memory controllers can be configured to directly couple one or more of the engines to the one or more memory dice. The number and type of local building blocks, and the number and types of engines and memory controllers can be scalable.

Abstract: The present disclosure provides an accelerator for processing a vector or matrix operation. The accelerator comprises a vector processing unit comprising a plurality of computation units having circuitry configured to process a vector operation in parallel; a matrix multiplication unit comprising a first matrix multiplication operator, a second matrix multiplication operator, and an accumulator, the first matrix multiplication operator and the second matrix multiplication operator having circuitry configured to process a matrix operation and the accumulator having circuitry configured to accumulate output results of the first matrix multiplication operator and the second matrix multiplication operator; and a memory storing input data for the vector operation or the matrix operation and being configured to communicate with the vector processing unit and the matrix multiplication unit.

Abstract: A flash memory device includes a plurality of flash memory cell arrays, wherein: a flash memory cell array in the plurality of flash memory cell arrays comprises a plurality of layers of flash memory cell planes; and a flash memory cell plane includes a plurality of flash memory cells. The flash memory device further includes a logic circuitry coupled to the plurality of flash memory cell arrays, configured to perform operations using the plurality of flash memory cell arrays; and a sensing circuitry configured to access a corresponding flash memory cell plane among the plurality of flash memory cell planes.

Abstract: A system comprises: a three-dimensional flash memory comprising a plurality of cells; and a controller coupled to the three-dimensional flash memory, configured to: select a block of cells in the three-dimensional flash memory; perform a matrix multiplication on the matrix stored in the block of cells, including performing a vector multiplication in a single sensing step; and output a matrix multiplication result. A matrix is stored in the block of cells.

Abstract: A filter device with a spirally flushing function with a head having a filter flask main body and a water inlet hole connected with a water inlet passage, a water outlet hole connected with a water outlet passage, and a flushing hole connected with a flushing passage. A filter element casing arranged outside the filter element, and has a plurality of filter element casing water inlets. A flow divider arranged outside the filter element casing and covering a portion of an upper end of the filter element casing. A filter element end cap fixed to the top of the filter element and having a water outlet, which penetrates through the flow divider and is connected with the water outlet passage. Effectively improved flushing effect, and greatly prolonged service life of the filter element is experienced.

Abstract: Embodiments of the disclosure provide devices and methods for performing a top-k function. The device can include: a memory comprising a plurality of register files for storing the data elements, the plurality of register files comprising a parent register file and a first child register file associated with the parent register file, wherein the parent register file is associated with: first interface circuitry configured for reading a first parent data element from the parent register file and receiving a first child data element and a second child data element from the first child register file; and first comparison circuitry configured for updating the parent register file and the first child register file based on the first parent data element, the first child data element, and the second child data element according to a given principle.

Abstract: An optical fiber laser induced breakdown spectroscopy detection device and a detection method are provided. The device comprises an optical fiber LIBS detector and a master control detection system. The master control detection system is installed in the master control room of a nuclear power plant, and the optical fiber LIBS detector is configured to perform detection in a pipeline. The master control detection system and the optical fiber LIBS detector are connected to each other via the transmission optical fiber and the control signal line. The remote on-line detection of the positioning and fixed point of the designated area of the inner wall of the main pipeline of the nuclear power plant can be detected on line in the master control room of the nuclear power plant.

Abstract: A method and apparatus to reduce read latency and improve read quality of service (Read QoS) for non-volatile memory, such as NAND array in a NAND device. For read commands that collide with an in-progress program array operation targeting the same program locations in a NAND array, the in-progress program is suspended and the controller allows the read command to read from the internal NAND buffer instead of waiting for the in-progress program to complete. For read commands queued during an in-progress program that is processing pre-reads in preparation for a program array operation, pre-read bypass allows the reads to be serviced between the pre-reads and before the program's array operation starts. In this manner, read commands can be serviced without suspending the in-progress program. Allowing internal NAND buffer reads and enabling pre-read bypass reduces read latency and improves Read QoS.

Abstract: The present application discloses a portable thermoelectric potential detector, which is small in size and easy to carry. A portable thermoelectric potential detector includes a test fixture for fixing a sample to be tested, a probe assembly unit for detecting the sample to be tested, and a collection and control unit for controlling detecting of the probe assembly and collecting a voltage signal of the probe assembly; the probe assembly unit includes two probe assemblies, each probe assembly includes a probe for loading on the surface of the sample to be tested and a linear motor for driving the probe to move and load on the surface of the sample to be tested; the collection and control unit is electrically connected to the linear motor, and is further configured to transmit a first control signal for controlling a moving distance and a loading force of the linear motor.

Abstract: Provided are a method, apparatus and system for measuring total radiated power of an array antenna. The method includes: determining a Rayleigh resolution of the array antenna in an angle space, and setting a stepping grid spacing of sampling points according to the Rayleigh resolution; determining the sampling points according to the stepping grid spacing, measuring equivalent isotropic radiated power (EIRP) at positions of the sampling points, and determining the TRP according to the EIRP. Compared with a traditional test mode using an angle stepping grid ?grid and ?grid of 15°, this reduces measurement errors; and additionally, through a normalized wave vector space transformation, the number of sampling points is further reduced, and the measurement efficiency is improved.

Abstract: A rotating shaft body and an electronic device are provided. The rotating shaft body includes a first rotating surface and a second rotating surface. The first rotating surface and the second rotating surface have a common side edge. The axis of rotation of the first rotating surface and the axis of rotation of the second rotating surface are on a same side and do not overlap. The first rotating surface is provided with a first stopper part. The second rotating surface is provided with a second stopper part. The rotating shaft body further includes a supporting surface. The supporting surface is provided on a same side as the axes of rotation of the two rotating surfaces. The supporting surface is concave toward the two rotating surfaces. Two sides of the supporting surface are provided with a third stopper part and a fourth stopper part respectively.

Abstract: A filter device with a spirally flushing function with a head having a filter flask main body and a water inlet hole connected with a water inlet passage, a water outlet hole connected with a water outlet passage, and a flushing hole connected with a flushing passage. A filter element casing arranged outside the filter element, and has a plurality of filter element casing water inlets. A flow divider arranged outside the filter element casing and covering a portion of an upper end of the filter element casing. A filter element end cap fixed to the top of the filter element and having a water outlet, which penetrates through the flow divider and is connected with the water outlet passage. Effectively improved flushing effect, and greatly prolonged service life of the filter element is experienced.

Abstract: The present application discloses a portable thermoelectric potential detector, which is small in size and easy to carry. A portable thermoelectric potential detector includes a test fixture for fixing a sample to be tested, a probe assembly unit for detecting the sample to be tested, and a collection and control unit for controlling detecting of the probe assembly and collecting a voltage signal of the probe assembly; the probe assembly unit includes two probe assemblies, each probe assembly includes a probe for loading on the surface of the sample to be tested and a linear motor for driving the probe to move and load on the surface of the sample to be tested; the collection and control unit is electrically connected to the linear motor, and is further configured to transmit a first control signal for controlling a moving distance and a loading force of the linear motor.

Abstract: A method and apparatus to reduce read latency and improve read quality of service (Read QoS) for non-volatile memory, such as NAND array in a NAND device. For read commands that collide with an in-progress program array operation targeting the same program locations in a NAND array, the in-progress program is suspended and the controller allows the read command to read from the internal NAND buffer instead of waiting for the in-progress program to complete. For read commands queued during an in-progress program that is processing pre-reads in preparation for a program array operation, pre-read bypass allows the reads to be serviced between the pre-reads and before the program's array operation starts. In this manner, read commands can be serviced without suspending the in-progress program. Allowing internal NAND buffer reads and enabling pre-read bypass reduces read latency and improves Read QoS.

Abstract: A signal processing method, network equipment and a system are provided, wherein the method includes that: a first reference signal is generated by Inverse Fast Fourier Transform (IFFT) processing based on a frequency-domain density of the first reference signal and an energy value of the first reference signal on a time-frequency resource; a time-frequency resource location of a target channel is determined, wherein the target channel is configured to carry information of a Licensed Assisted Access (LAA) system; a Clear Channel Assessment (CCA) signal is generated based on the time-frequency resource location of the target channel and the first reference signal, the CCA signal is mapped to the target channel, and the CCA signal is sent to receiver network equipment through the target channel to enable the receiver network equipment to determine whether the target channel is configured for the LAA system according to the CCA signal.

Abstract: A signal processing method, network equipment and a system are provided, wherein the method includes that: a first reference signal is generated by Inverse Fast Fourier Transform (IFFT) processing based on a frequency-domain density of the first reference signal and an energy value of the first reference signal on a time-frequency resource; a time-frequency resource location of a target channel is determined, wherein the target channel is configured to carry information of a Licensed Assisted Access (LAA) system; a Clear Channel Assessment (CCA) signal is generated based on the time-frequency resource location of the target channel and the first reference signal, the CCA signal is mapped to the target channel, and the CCA signal is sent to receiver network equipment through the target channel to enable the receiver network equipment to determine whether the target channel is configured for the LAA system according to the CCA signal.

Abstract: Provided is an airplane suspension (20) fairing structure with a wing-mounted arrangement, the fairing structure comprising a front fairing located in front of the leading edge (31) of a wing and a rear fairing located at the back of the leading edge (31) of the wing; the vertical section line (G) of the front fairing is curved, ascending along air flow direction from a start point (p) of an engine nacelle (10) to the maximum height position and then descending and extending below the lower surface (32) of the wing. In the present invention, due to the curved vertical section line of the front fairing of the suspension, inner space of the suspension is met only in the position requiring greater inner space, thus enabling the engine to be mounted close to the wing without additional devices; and the fairing aerodynamic surface of the suspension will not extend to the upper surface of the wing, avoiding interference of the suspension with the wing during cruising.