Abstract: A method includes bonding a Backside Illumination (BSI) image sensor chip to a device chip, forming a first via in the BSI image sensor chip to connect to a first integrated circuit device in the BSI image sensor chip, forming a second via penetrating through the BSI image sensor chip to connect to a second integrated circuit device in the device chip, and forming a metal pad to connect the first via to the second via.

Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: An image-sensor device includes a substrate including a pixel region and a logic region. A logic transistor is disposed in the logic region and is surrounded by a logic isolation feature. A radiation-sensing region is disposed in the pixel region of the substrate. An epitaxial pixel isolation feature is disposed in the pixel region and surrounds the radiation-sensing region. A doped region with a same doping polarity as the radiation-sensing region is located between a bottom of the radiation-sensing region and the back surface of the substrate. The epitaxial pixel isolation feature is in direct contact with the doped region. The doped region extends continuously under the pixel region and the logic region. The epitaxial pixel isolation feature is in direct contact with the doped region, and the logic isolation feature is spaced apart from the doped region.

Abstract: The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, a plurality of photodiodes is formed from a front-side of a substrate. A plurality of boundary deep trench isolation (BDTI) trenches having a first depth and a plurality of multiple deep trench isolation (MDTI) trenches having a second depth are formed from a back-side of the substrate. A stack of dielectric layers is formed in the BDTI trenches and the MDTI trenches. A plurality of color filters is formed overlying the stack of dielectric layers corresponding to the plurality of photodiodes.

Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element and a second semiconductor element bonded on the first semiconductor element. The first semiconductor element includes a first substrate, a common conductive feature in the first substrate, a first inter-level dielectric (ILD) layer, a first interconnection feature and a conductive plug connecting the first interconnection feature to the common conductive feature. The second semiconductor element includes a second substrate, a second ILD layers over the second substrate and a second interconnection feature in second ILD layers. The device also includes a conductive deep plug connecting to the common conductive feature in the first semiconductor element and the second interconnection feature. The conductive deep plug is separated with the conductive plug by the first ILD layer.

Abstract: The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, the image sensor comprises a plurality of pixel regions disposed within a substrate and respectively comprising a photodiode configured to receive radiation that enters the substrate from a back-side. A boundary deep trench isolation (BDTI) structure is disposed at boundary regions of the pixel regions surrounding the photodiode. The BDTI structure extends from the back-side of the substrate to a first depth within the substrate. A multiple deep trench isolation (MDTI) structure is disposed at inner regions of the pixel regions overlying the photodiode. The MDTI structure extends from the back-side of the substrate to a second depth within the substrate smaller than the first depth. The MDTI structure is a continuous integral unit having a ring shape.

Abstract: The present disclosure relates to a semiconductor device. The semiconductor device includes a gate structure arranged on a first surface of a substrate. A doped isolation region is arranged within the substrate along opposing sides of the gate structure. The substrate includes a first region between sides of the doped isolation region and a second region having a different doping characteristic than the first region. The second region contacts a bottom of the first region and a bottom of the doped isolation region.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: A semiconductor device comprises a first chip bonded on a second chip. The first chip comprises a first substrate and first interconnection components formed in first IMD layers. The second chip comprises a second substrate and second interconnection components formed in second IMD layers. The device further comprises a first conductive plug formed within the first substrate and the first IMD layers, wherein the first conductive plug is coupled to a first interconnection component and a second conductive plug formed through the first substrate and the first IMD layers and formed partially through the second IMD layers, wherein the second conductive plug is coupled to a second interconnection component.

Abstract: An image-sensor device is provided. The image-sensor device includes a semiconductor substrate and a radiation-sensing region in the semiconductor substrate. The image-sensor device also includes a doped isolation region in the semiconductor substrate and a dielectric film extending into the doped isolation region from a surface of the semiconductor substrate. A portion of the doped isolation region is between the dielectric film and the radiation-sensing region.

Abstract: A method includes bonding a first semiconductor chip on a second semiconductor chip, applying an etching process to the first semiconductor chip and the second semiconductor chip until a metal surface of the second semiconductor chip is exposed, wherein as a result of applying the etching process, an opening is formed in the first semiconductor chip and the second semiconductor chip and plating a conductive material in the opening to from a conductive plug.

Abstract: A method includes bonding a first wafer to a second wafer, with a first plurality of dielectric layers in the first wafer and a second plurality of dielectric layers in the second wafer bonded between a first substrate of the first wafer and a second substrate in the second wafer. A first opening is formed in the first substrate, and the first plurality of dielectric layers and the second wafer are etched through the first opening to form a second opening. A metal pad in the second plurality of dielectric layers is exposed to the second opening. A conductive plug is formed extending into the first and the second openings.

Abstract: The present disclosure, in some embodiments, relates to a semiconductor device. The semiconductor device has a gate stack arranged over a first surface of a substrate. A doped isolation feature is arranged within the substrate along opposing sides of the gate stack. A photodetector is also arranged within the substrate. An isolation well region extends below the gate stack and contacts the doped isolation feature along a horizontal plane that is parallel to the first surface and that intersects sides of the photodetector.

Abstract: A method for manufacturing an image sensing device includes forming an interconnection layer over a front surface of a semiconductor substrate. A trench is formed to extend from a back surface of the semiconductor substrate. An etch stop layer is formed along the trench. A buffer layer is formed over the etch stop layer. An etch process is performed for etching the buffer layer. The buffer layer and the etch stop layer include different materials.

Abstract: The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within a substrate and respectively comprising a photodiode. The photodiode comprises a doped layer with a first doping type and an adjoining region of the substrate with a second doping type that is different than the first doping type. A boundary deep trench isolation (BDTI) structure is disposed between adjacent pixel regions. A multiple deep trench isolation (MDTI) structure overlies the doped layer of the photodiode. The MDTI structure comprises a stack of dielectric layers lining sidewalls of a MDTI trench. A plurality of color filters is disposed at the back-side of the substrate corresponding to the respective photodiode of the plurality of pixel regions and overlying the MDTI structure.

Abstract: A semiconductor device comprises a first chip bonded on a second chip. The first chip comprises a first substrate and first interconnection components formed in first IMD layers. The second chip comprises a second substrate and second interconnection components formed in second IMD layers. The device further comprises a first conductive plug formed within the first substrate and the first IMD layers, wherein the first conductive plug is coupled to a first interconnection component and a second conductive plug formed through the first substrate and the first IMD layers and formed partially through the second IMD layers, wherein the second conductive plug is coupled to a second interconnection component.

Abstract: An image-sensor device is provided. The image-sensor device includes a substrate having a front side and a back side. The image-sensor device also includes a radiation-sensing region operable to detect incident radiation that enters the substrate through the back side. The image-sensor device further includes a deep-trench isolation structure extending from the back side towards the front side. The deep-trench isolation structure includes a dielectric layer, and the dielectric layer contains hafnium or aluminum.

Abstract: Some embodiments relate an integrated circuit (IC). The IC includes a first substrate including an array of photodetectors, wherein a bond pad opening extends through the first substrate and is defined by an inner sidewall of the first substrate. An interconnect structure is disposed over the first substrate and includes a plurality of metal layers stacked over one another and disposed within a dielectric structure. The bond pad opening further extends through at least a portion of the interconnect structure and is further defined by an inner sidewall of the interconnect structure. A bond pad structure directly contacts a metal layer of the plurality of metal layers in the interconnect structure and is located at an uppermost extent of the bond pad opening.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first interconnect wire disposed within a dielectric structure on a substrate. A bond pad has a lower surface contacting the first interconnect wire. A via layer is vertically between the first interconnect wire and a second interconnect wire within the dielectric structure. The via layer includes a plurality of support vias having a first size and a plurality of additional vias having a second size that is smaller than the first size. The plurality of support vias extend from directly under the lower surface of the bond pad to laterally past outermost edges of the lower surface of the bond pad.