Patents by Inventor Fenton R. McFeely
Fenton R. McFeely has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100015790Abstract: A compound metal comprising TiC which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the TiC compound metal. Furthermore, the TiC metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000° C. allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 ? in a p-metal oxide semiconductor (pMOS) device.Type: ApplicationFiled: August 14, 2009Publication date: January 21, 2010Applicant: International Business Machines CorporationInventors: Alessandro C. Callegari, Michael A. Gribelyuk, Dianne L. Lacey, Fenton R. McFeely, Katherine L. Saenger, Sufi Zafar
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Publication number: 20100009164Abstract: A chemical vapor deposition (CVD) method for depositing materials including germanium (Ge) and antimony (Sb) which, in some embodiments, has the ability to fill high aspect ratio openings is provided The CVD method of the instant invention permits for the control of GeSb stoichiometry over a wide range of values and the inventive method is performed at a substrate temperature of less than 400° C., which makes the inventive method compatible with existing interconnect processes and materials. In addition to the above, the inventive method is a non-selective CVD process, which means that the GeSb materials are deposited equally well on insulating and non-insulating materials.Type: ApplicationFiled: August 13, 2009Publication date: January 14, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fenton R. McFeely, Alejandro G. Schrott, John J. Yurkas
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Publication number: 20090321933Abstract: Improved high aspect ratio vias and techniques for the formation thereof are provided. In one aspect, a method of fabricating a copper plated high aspect ratio via is provided. The method comprises the following steps. A high aspect ratio via is etched in a dielectric layer. A diffusion barrier layer is deposited into the high aspect ratio via and over one or more surfaces of the dielectric layer. A copper layer is deposited over the diffusion barrier layer. A ruthenium layer is deposited over the copper layer. The high aspect ratio via is filled with copper plated onto the ruthenium layer. A copper plated high aspect ratio via formed by this method is also provided.Type: ApplicationFiled: June 27, 2008Publication date: December 31, 2009Applicant: International Business Machines CorporationInventors: Fenton R. McFeely, Chih-Chao Yang
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Publication number: 20090294876Abstract: A method of forming an electropositive metal-containing capping layer atop a stack of a high k gate dielectric/interfacial layer that avoids chemically and physically altering the high k gate dielectric and the interfacial layer is provided. The method includes chemical vapor deposition of an electropositive metal-containing precursor at a temperature that is about 400° C. or less. The present invention also provides semiconductor structures such as, for example, MOSCAPs and MOSFETs, that include a chemical vapor deposited electropositive metal-containing capping layer atop a stack of a high k gate dielectric and an interfacial layer. The presence of the CVD electropositive metal-containing capping layer does not physically or chemically alter the high k gate dielectric and the interfacial layer.Type: ApplicationFiled: August 14, 2009Publication date: December 3, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Supratik Guha, Fenton R. McFeely, Vijay Narayanan, Vamsi K. Paruchuri, John J. Yurkas
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Publication number: 20090212433Abstract: A high aspect ratio metallization structure is provided in which a noble metal-containing material is present at least within a lower portion of a contact opening located in a dielectric material and is in direct contact with a metal semiconductor alloy located on an upper surface of a material stack of at least one semiconductor device. In one embodiment, the noble metal-containing material is plug located within the lower region of the contact opening and an upper region of the contact opening includes a conductive metal-containing material. The conductive metal-containing material is separated from plug of noble metal-containing material by a bottom walled portion of a U-shaped diffusion barrier. In another embodiment, the noble metal-containing material is present throughout the entire contact opening.Type: ApplicationFiled: February 21, 2008Publication date: August 27, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chih-Chao Yang, Fenton R. McFeely
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Publication number: 20090189287Abstract: An interconnect structure that includes a dielectric material having a dielectric constant of about 3.0 or less is provided. This low k dielectric material has at least one conductive material having an upper surface embedded therein. The dielectric material also has a surface layer that is made hydrophobic prior to the formation of the noble metal cap. The noble metal cap is located directly on the upper surface of the at least one conductive material. Because of the presence of the hydrophobic surface layer on the dielectric material, the noble metal cap does not substantially extend onto the hydrophobic surface layer of the dielectric material that is adjacent to the at least one conductive material and no metal residues from the noble metal cap deposition form on this hydrophobic dielectric surface.Type: ApplicationFiled: January 29, 2008Publication date: July 30, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chih-Chao Yang, Daniel C. Edelstein, Fenton R. McFeely
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Patent number: 7566938Abstract: A method of fabricating hafnium oxide and/or zirconium oxide films is provided. The methods include providing a mixture of Hf and/or Zr alkoxide dissolved, emulsified or suspended in a liquid; vaporizing at least the alkoxide and depositing the vaporized component at a temperature of greater than 400° C. The resultant film is dense, microcrystalline and is capable of self-passivation when treated in a hydrogen plasma or forming gas anneal.Type: GrantFiled: November 17, 2005Date of Patent: July 28, 2009Assignee: International Business Machines CorporationInventors: Cyril Cabral, Jr., Alessandro C. Callegari, Michael A. Gribelyuk, Paul C. Jamison, Dianne L. Lacey, Fenton R. McFeely, Vijay Narayanan, Deborah A. Neumayer, Pushkar Ranade, Sufi Zafar
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Patent number: 7521346Abstract: A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer. Furthermore, after annealing the stack of HfSiN/high k dielectric/interfacial layer at a high temperature (on the order of about 1000° C.), there is a reduction of the interfacial layer, thus the gate stack produces a very small equivalent oxide thickness (12 ? classical), which cannot be achieved using TaSiN.Type: GrantFiled: October 19, 2007Date of Patent: April 21, 2009Assignee: International Business Machines CorporationInventors: Alessandro C. Callegari, Martin M. Frank, Rajarao Jammy, Dianne L. Lacey, Fenton R. McFeely, Sufi Zafar
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Patent number: 7488656Abstract: The present invention provides a method for removing charged defects from a material stack including a high k gate dielectric and a metal contact such that the final gate stack, which is useful in forming a pFET device, has a threshold voltage substantially within the silicon band gap and good carrier mobility. Specifically, the present invention provides a re-oxidation procedure that will restore the high k dielectric of a pFET device to its initial, low-defect state. It was unexpectedly determined that by exposing a material stack including a high k gate dielectric and a metal to dilute oxygen at low temperatures will substantially eliminate oxygen vacancies, resorting the device threshold to its proper value. Furthermore, it was determined that if dilute oxygen is used, it is possible to avoid undue oxidation of the underlying semiconductor substrate which would have a deleterious effect on the capacitance of the final metal-containing gate stack.Type: GrantFiled: April 29, 2005Date of Patent: February 10, 2009Assignee: International Business Machines CorporationInventors: Eduard A. Cartier, Matthew W. Copel, Supratik Guha, Richard A. Haight, Fenton R. McFeely, Vijay Narayanan
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Publication number: 20090008725Abstract: A method of forming an electropositive metal-containing capping layer atop a stack of a high k gate dielectric/interfacial layer that avoids chemically and physically altering the high k gate dielectric and the interfacial layer is provided. The method includes chemical vapor deposition of an electropositive metal-containing precursor at a temperature that is about 400° C. or less. The present invention also provides semiconductor structures such as, for example, MOSCAPs and MOSFETs, that include a chemical vapor deposited electropositive metal-containing capping layer atop a stack of a high k gate dielectric and an interfacial layer. The presence of the CVD electropositive metal-containing capping layer does not physically or chemically alter the high k gate dielectric and the interfacial layer.Type: ApplicationFiled: July 3, 2007Publication date: January 8, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Supratik Guha, Fenton R. McFeely, Vijay Narayanan, Vamsi K. Paruchuri, John J. Yurkas
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Publication number: 20080315429Abstract: A method of forming a noble metal cap on a conductive material embedded in a dielectric material in an interconnect structure. The method includes the step of contacting (i) a conductive material having a bare upper surface partially embedded in a dielectric material and (ii) vapor of a noble metal containing compound, in the presence of carbon monoxide and a carrier gas. The contacting step is carried out at a temperature, pressure and for a length of time sufficient to produce a noble metal cap disposed directly on the upper surface of the conductive material without substantially extending into upper surface of the dielectric material or leaving a noble metal residue onto the dielectric material.Type: ApplicationFiled: September 6, 2007Publication date: December 25, 2008Inventors: Fenton R. McFeely, Chih-Chao Yang
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Publication number: 20080311745Abstract: A method for fabricating a CMOS gate electrode by using Re, Rh, Pt, Ir or Ru metal and a CMOS structure that contains such gate electrodes are described. The work functions of these metals make them compatible with current pFET requirements. For instance, the metal can withstand the high hydrogen pressures necessary to produce properly passivated interfaces without undergoing chemical changes. The thermal stability of the metal on dielectric layers such as SiO2, Al2O3 and other suitable dielectric materials makes it compatible with post-processing temperatures up to 1000° C. A low temperature/low pressure CVD technique with Re2(CO)10 as the source material is used when Re is to be deposited.Type: ApplicationFiled: August 25, 2008Publication date: December 18, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ricky Amos, Douglas A. Buchanan, Cyril Cabral, JR., Alessandro C. Callegari, Supratik Guha, Hyungjun Kim, Fenton R. McFeely, Vijay Narayanan, Kenneth P. Rodbell, John J. Yurkas
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Publication number: 20080293259Abstract: The present invention provides a gate stack structure that has high mobilities and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.Type: ApplicationFiled: August 7, 2008Publication date: November 27, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Wanda Andreoni, Alessandro C. Callegari, Eduard A. Cartier, Alessandro Curioni, Christopher P. D'Emic, Evgeni Gousev, Michael A. Gribelyuk, Paul C. Jamison, Rajarao Jammy, Dianne L. Lacey, Fenton R. McFeely, Vijay Narayanan, Carlo A. Pignedoli, Joseph F. Shepard, JR., Sufi Zafar
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Patent number: 7439180Abstract: A dispenser system for use in atomic beam assisted metal organic chemical vapor deposition is provided as well as a method of depositing an ultra-thin film using the same. The inventive dispenser system includes an atomic source having an unimpeded line of site to a substrate and an annular metal organic chemical vapor deposition showerhead having a plurality of nozzles for delivering a precursor to the substrate. In accordance with the present invention, each of the nozzles present on the showerhead is angled to provide precursor beam trajectories that crossover and are non-intercepting.Type: GrantFiled: July 28, 2006Date of Patent: October 21, 2008Assignee: International Business Machines CorporationInventors: Supratik Guha, Fenton R. McFeely, John J. Yurkas
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Publication number: 20080245658Abstract: A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer. Furthermore, after annealing the stack of HfSiN/high k dielectric/ interfacial layer at a high temperature (on the order of about 1000° C.), there is a reduction of the interfacial layer, thus the gate stack produces a very small equivalent oxide thickness (12 ? classical), which cannot be achieved using TaSiN.Type: ApplicationFiled: June 18, 2008Publication date: October 9, 2008Applicant: International Business Machines CorporationInventors: Alessandro C. Callegari, Martin M. Frank, Rajarao Jammy, Dianne L. Lacey, Fenton R. McFeely, Sufi Zafar
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Patent number: 7419702Abstract: A method for processing a substrate on a ceramic substrate heater in a process chamber. The method includes forming a protective coating on the ceramic substrate heater in the process chamber and processing a substrate on the coated substrate heater. The processing can include providing a substrate to be processed on the coated ceramic substrate heater, performing a process on the substrate by exposing the substrate to a process gas, and removing the processed substrate from the process chamber.Type: GrantFiled: March 31, 2004Date of Patent: September 2, 2008Assignees: Tokyo Electron Limited, International Business Machines Corp.Inventors: Kazuhito Nakamura, Cory Wajda, Enrico Mosca, Yumiko Kawano, Gert Leusink, Fenton R. McFeely, Sandra G. Malhotra
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Publication number: 20080166586Abstract: A chemical vapor deposition (CVD) method for selectively depositing GeSb materials onto a surface of a substrate is provided in which a metal that is capable of forming an eutectic alloy with germanium is used to catalyze the growth of the GeSb materials. A structure is also provided that includes a GeSb material located on preselected regions of a substrate. In accordance with the present invention, the GeSb material is sandwiched between a lower metal layer used to catalyze the growth of the GeSb and an upper surface metal layer that forms during the growth of the GeSb material.Type: ApplicationFiled: January 9, 2007Publication date: July 10, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Supratik Guha, Fenton R. McFeely, John J. Yurkas
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Publication number: 20080164579Abstract: A chemical vapor deposition (CVD) method for depositing materials including germanium (Ge) and antimony (Sb) which, in some embodiments, has the ability to fill high aspect ratio openings is provided. The CVD method of the instant invention permits for the control of GeSb stoichiometry over a wide range of values and the inventive method is performed at a substrate temperature of less than 400° C., which makes the inventive method compatible with existing interconnect processes and materials. In addition to the above, the inventive method is a non-selective CVD process, which means that the GeSb materials are deposited equally well on insulating and non-insulating materials.Type: ApplicationFiled: January 9, 2007Publication date: July 10, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fenton R. McFeely, Alejandro G. Schrott, John J. Yurkas
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Patent number: 7345184Abstract: A method and system for refurbishing a metal carbonyl precursor. The method includes providing a metal precursor vaporization system containing a metal carbonyl precursor containing un-reacted and partially reacted metal carbonyl precursor, flowing a CO-containing gas through the metal precursor vaporization system to a precursor collection system in fluid communication with the metal precursor vaporization system to transfer the un-reacted metal carbonyl precursor vapor to the precursor collection system, and collecting the transferred metal carbonyl precursor in the precursor collection system. A method is provided for monitoring at least one metal carbonyl precursor parameter to determine a status of the metal carbonyl precursor and the need for refurbishing the metal carbonyl precursor.Type: GrantFiled: March 31, 2005Date of Patent: March 18, 2008Assignees: Tokyo Electron Limited, International Business Machines CorporationInventors: Kenji Suzuki, Gerrit J. Leusink, Fenton R. McFeely
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Publication number: 20080026575Abstract: A dispenser system for use in atomic beam assisted metal organic chemical vapor deposition is provided as well as a method of depositing an ultra-thin film using the same. The inventive dispenser system includes an atomic source having an unimpeded line of site to a substrate and an annular metal organic chemical vapor deposition showerhead having a plurality of nozzles for delivering a precursor to the substrate. In accordance with the present invention, each of the nozzles present on the showerhead is angled to provide precursor beam trajectories that crossover and are non-intercepting.Type: ApplicationFiled: July 28, 2006Publication date: January 31, 2008Applicant: International Business Machines CorporationInventors: Supratik Guha, Fenton R. McFeely, John J. Yurkas