Patents by Inventor Fenton R. McFeely
Fenton R. McFeely has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7270848Abstract: A method for increasing deposition rates of metal layers from metal-carbonyl precursors by mixing a vapor of the metal-carbonyl precursor with CO gas. The method includes providing a substrate in a process chamber of a deposition system, forming a process gas containing a metal-carbonyl precursor vapor and a CO gas, and exposing the substrate to the process gas to deposit a metal layer on the substrate by a thermal chemical vapor deposition process.Type: GrantFiled: November 23, 2004Date of Patent: September 18, 2007Assignees: Tokyo Electron Limited, International Business Machines Corp.Inventors: Kenji Suzuki, Emmanuel P. Guidotti, Gerrit J. Leusink, Fenton R. McFeely, Sandra G. Malhotra
-
Patent number: 7189431Abstract: A method for forming a passivated metal layer that preserves the properties and morphology of an underlying metal layer during subsequent exposure to oxygen-containing ambients. The method includes providing a substrate in a process chamber, exposing the substrate to a process gas containing a rhenium-carbonyl precursor to deposit a rhenium metal layer on the substrate in a chemical vapor deposition process, and forming a passivation layer on the rhenium metal layer to thereby inhibit oxygen-induced growth of rhenium-containing nodules on the rhenium metal surface.Type: GrantFiled: September 30, 2004Date of Patent: March 13, 2007Assignees: Tokyo Electron Limited, International Business Machines Corp.Inventors: Hideaki Yamasaki, Kazuhito Nakamura, Yumiko Kawano, Gert J. Leusink, Fenton R. McFeely, Paul Jamison
-
Patent number: 7145212Abstract: A method (and resultant structure) of forming a semiconductor device, includes forming a metal-back-gate over a substrate and a metal back-gate, forming a passivation layer on the metal back-gate to prevent the metal back-gate from reacting with radical species, and providing an intermediate gluing layer between the substrate and the metal back-gate to enhance adhesion.Type: GrantFiled: June 17, 2004Date of Patent: December 5, 2006Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Lijuan Huang, Fenton R. McFeely, Paul M. Solomon, Hon-Sum Philip Wong
-
Patent number: 7115959Abstract: The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.Type: GrantFiled: June 22, 2004Date of Patent: October 3, 2006Assignee: International Business Machines CorporationInventors: Wanda Andreoni, Alessandro C. Callegari, Eduard A. Cartier, Alessandro Curioni, Christopher P. D'Emic, Evengi Gousev, Michael A. Gribelyuk, Paul C. Jamison, Rajarao Jammy, Dianne L. Lacey, Fenton R. McFeely, Vijay Narayanan, Carlo A. Pignedoli, Joseph P. Shepard, Jr., Sufi Zafar
-
Patent number: 7078341Abstract: A method for depositing metal layers on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process. The TCVD process utilizes high flow rate of a dilute process gas containing a metal-carbonyl precursor to deposit a metal layer. In one embodiment of the invention, the metal-carbonyl precursor can be selected from at least one of W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12. In another embodiment of the invention, a method is provided for depositing a W layer from a process gas comprising a W(CO)6 precursor at a substrate temperature of about 410° C. and a chamber pressure of about 200 mTorr.Type: GrantFiled: September 30, 2003Date of Patent: July 18, 2006Assignees: Tokyo Electron Limited, International Business Machines CorporationInventors: Hideaki Yamasaki, Tsukasa Matsuda, Atsushi Gomi, Tatsuo Hatano, Masahito Sugiura, Yumiko Kawano, Gert J Leusink, Fenton R McFeely, Sandra G. Malhotra
-
Patent number: 7067422Abstract: A method for forming a tantalum-containing gate electrode structure by providing a substrate having a high-k dielectric layer thereon in a process chamber and forming a tantalum-containing layer on the high-k dielectric layer in a thermal chemical vapor deposition process by exposing the substrate to a process gas containing TAIMATA (Ta(N(CH3)2)3(NC(C2H5)(CH3)2)) precursor gas. In one embodiment of the invention, the tantalum-containing layer can include a TaSiN layer formed from a process gas containing TAIMATA precursor gas, a silicon containing gas, and optionally a nitrogen-containing gas. In another embodiment of the invention, a TaN layer is formed on the TaSiN layer. The TaN layer can be formed from a process gas containing TAIMATA precursor gas and optionally a nitrogen-containing gas. A computer readable medium executable by a processor to cause a processing system to perform the method and a processing system for forming a tantalum-containing gate electrode structure are also provided.Type: GrantFiled: March 31, 2004Date of Patent: June 27, 2006Assignees: Tokyo Electron Limited, International Business Machines CorporationInventors: Kazuhito Nakamura, Hideaki Yamasaki, Yumiko Kawano, Gert J. Leusink, Fenton R. McFeely, John J. Yurkas, Vijay Narayanan
-
Patent number: 6989321Abstract: A method for depositing metal layers on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process includes introducing a process gas containing a metal carbonyl precursor in a process chamber and depositing a metal layer on a substrate. The TCVD process utilizes a short residence time for the gaseous species in the processing zone above the substrate to form a low-resistivity metal layer. In one embodiment of the invention, the metal carbonyl precursor can be selected from at least one of W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12 precursors. In another embodiment of the invention, a method is provided for depositing low-resistivity W layers at substrate temperatures below about 500° C., by utilizing a residence time less than about 120 msec.Type: GrantFiled: September 30, 2003Date of Patent: January 24, 2006Assignees: Tokyo Electron Limited, International Business Machines CorporationInventors: Hideaki Yamasaki, Tsukasa Matsuda, Atsushi Gomi, Tatsuo Hatano, Masahito Sugiura, Yumiko Kawano, Gert J Leusink, Fenton R McFeely, Sandra G. Malhotra
-
Patent number: 6982230Abstract: A method of fabricating hafnium oxide and/or zirconium oxide films is provided. The methods include providing a mixture of Hf and/or Zr alkoxide dissolved, emulsified or suspended in a liquid; vaporizing at least the alkoxide and depositing the vaporized component at a temperature of greater than 400° C. The resultant film is dense, microcrystalline and is capable of self-passivation when treated in a hydrogen plasma or forming gas anneal.Type: GrantFiled: November 8, 2002Date of Patent: January 3, 2006Assignee: International Business Machines CorporationInventors: Cyril Cabral, Jr., Alessandro C. Callegari, Michael A. Gribelyuk, Paul C. Jamison, Dianne L. Lacey, Fenton R. McFeely, Vijay Narayanan, Deborah A. Neumayer, Pushkar Ranade, Sufi Zafar
-
Patent number: 6924223Abstract: A method is provided for forming a metal layer on a substrate using an intermittent precursor gas flow process. The method includes exposing the substrate to a reducing gas while exposing the substrate to pulses of a metal-carbonyl precursor gas. The process is carried out until a metal layer with desired thickness is formed on the substrate. The metal layer can be formed on a substrate, or alternately, the metal layer can be formed on a metal nucleation layer.Type: GrantFiled: September 30, 2003Date of Patent: August 2, 2005Assignees: Tokyo Electron Limited, International Business Machines CorporationInventors: Hideaki Yamasaki, Tsukasa Matsuda, Atsushi Gomi, Tatsuo Hatano, Mitsuhiro Tachibana, Koumei Matsuzava, Yumiko Kawano, Gert J Leusink, Fenton R McFeely, Sandra G. Malhotra, Andrew H Simon, John J Yurkas
-
Publication number: 20040235284Abstract: A method (and resultant structure) of forming a semiconductor device, includes forming a metal-back-gate over a substrate and a metal back-gate, forming a passivation layer on the metal back-gate to prevent the metal back-gate from reacting with radical species, and providing an intermediate gluing layer between the substrate and the metal back-gate to enhance adhesion.Type: ApplicationFiled: June 17, 2004Publication date: November 25, 2004Applicant: International Business Machines CorporationInventors: Kevin K. Chan, Lijuan Huang, Fenton R. McFeely, Paul M. Solomon, Hon-Sum Philip Wong
-
Patent number: 6803266Abstract: A process for passivating the semiconductor-dielectric interface of a MOS structure to reduce the interface state density to a very low level. A particular example is a MOSFET having a tungsten electrode that in the past has prevented passivation of the underlying semiconductor-dielectric interface to an extent sufficient to reduce the interface state density to less than 5×1010/cm2−eV. Though substantially impervious to molecular hydrogen, thin tungsten layers are shown to be pervious to atomic hydrogen, enabling atomic hydrogen to be diffused through a tungsten electrode into an underlying semiconductor-dielectric interface.Type: GrantFiled: March 20, 2003Date of Patent: October 12, 2004Assignee: International Business Machines CorporationInventors: Paul M. Solomon, Douglas A. Buchanan, Eduard A. Cartier, Kathryn W. Guarini, Fenton R. McFeely, Huiling Shang, John J. Yourkas
-
Patent number: 6797604Abstract: A method (and resultant structure) of forming a semiconductor device, includes forming a metal-back-gate over a substrate and a metal back-gate, forming a passivation layer on the metal back-gate to prevent the metal back-gate from reacting with radical species, and providing an intermediate gluing layer between the substrate and the metal back-gate to enhance adhesion.Type: GrantFiled: March 27, 2001Date of Patent: September 28, 2004Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Lijuan Huang, Fenton R. McFeely, Paul M. Solomon, Hon-Sum Philip Wong
-
Publication number: 20040092073Abstract: A method of fabricating hafnium oxide and/or zirconium oxide films is provided. The methods include providing a mixture of Hf and/or Zr alkoxide dissolved, emulsified or suspended in a liquid; vaporizing at least the alkoxide and depositing the vaporized component at a temperature of greater than 400° C. The resultant film is dense, microcrystalline and is capable of self-passivation when treated in a hydrogen plasma or forming gas anneal.Type: ApplicationFiled: November 8, 2002Publication date: May 13, 2004Inventors: Cyril Cabral, Alessandro C. Callegari, Michael A. Gribelyuk, Paul C. Jamison, Dianne L. Lacey, Fenton R. McFeely, Vijay Narayanan, Deborah A. Neumayer, Pushkar Ranade, Sufi Zafar
-
Patent number: 6603181Abstract: A MOS structure processed to have a semiconductor-dielectric interface that is passivated to reduce the interface state density. An example is a MOSFET having a gate dielectric on which an electrode is present that is substantially impervious to molecular hydrogen, but sufficiently thin to be pervious to atomic hydrogen, enabling atomic hydrogen to be diffused therethrough into an underlying semiconductor-dielectric interface. Atomic hydrogen diffusion can be achieved by subjecting such an electrode to hydrogen plasma, forming the electrode of an aluminum-tungsten alloy in the presence of hydrogen, and implanting atomic hydrogen into the electrode. The latter two techniques are each followed by an anneal to cause the atomic hydrogen to diffuse through the electrode and into the semiconductor-dielectric interface.Type: GrantFiled: January 16, 2001Date of Patent: August 5, 2003Assignee: International Business Machines CorporationInventors: Paul M. Solomon, Douglas A. Buchanan, Eduard A. Cartier, Kathryn W. Guarini, Fenton R. McFeely, Huiling Shang, John J. Yourkas
-
Publication number: 20030132492Abstract: A process for passivating the semiconductor-dielectric interface of a MOS structure to reduce the interface state density to a very low level. A particular example is a MOSFET having a tungsten electrode that in the past has prevented passivation of the underlying semiconductor-dielectric interface to an extent sufficient to reduce the interface state density to less than 5x1010/cm2-eV. Though substantially impervious to molecular hydrogen, thin tungsten layers are shown to be pervious to atomic hydrogen, enabling atomic hydrogen to be diffused through a tungsten electrode into an underlying semiconductor-dielectric interface.Type: ApplicationFiled: March 20, 2003Publication date: July 17, 2003Applicant: International Business Machines CorporationInventors: Paul M. Solomon , Douglas A. Buchanan , Eduard A. Cartier , Kathryn W. Guarini , Fenton R. McFeely , Huiling Shang , John J. Yourkas
-
Patent number: 6579614Abstract: A method of treating structures (and the structure formed thereby), so as to prevent or retard the oxidation of a metal film, and/or prevent its delamination a substrate, includes providing a structure including a refractory metal film formed on a substrate, placing the structure into a vessel having a base pressure below approximately 10−7 torr, exposing the structure to a silane gas at a sufficiently high predetermined temperature and predetermined pressure to cause formation of a metal silicide layer on the refractory metal film, and exposing the structure to a second gas at a sufficiently high temperature and pressure to nitride the metal silicide layer into a nitrided layer.Type: GrantFiled: March 23, 2001Date of Patent: June 17, 2003Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Erin C. Jones, Fenton R. McFeely, Paul M. Solomon, John J. Yurkas
-
Publication number: 20030098489Abstract: A method for fabricating a CMOS gate electrode by using Re, Rh, Pt, Ir or Ru metal and a CMOS structure that contains such gate electrodes are described. The work functions of these metals make them compatible with current pFET requirements. For instance, the metal can withstand the high hydrogen pressures necessary to produce properly passivated interfaces without undergoing chemical changes. The thermal stability of the metal on dielectric layers such as SiO2, Al2O3 and other suitable dielectric materials makes it compatible with post-processing temperatures up to 1000° C. A low temperature/low pressure CVD technique with Re2 (CO)10 as the source material is used when Re is to be deposited.Type: ApplicationFiled: November 29, 2001Publication date: May 29, 2003Applicant: International Business Machines CorporationInventors: Ricky Amos, Douglas A. Buchanan, Cyril Cabral, Alessandro C. Callegari, Supratik Guha, Hyungjun Kim, Fenton R. McFeely, Vijay Narayanan, Kenneth P. Rodbell, John J. Yurkas
-
Publication number: 20020142562Abstract: A method (and resultant structure) of forming a semiconductor device, includes forming a metal-back-gate over a substrate and a metal back-gate, forming a passivation layer on the metal back-gate to prevent the metal back-gate from reacting with radical species, and providing an intermediate gluing layer between the substrate and the metal back-gate to enhance adhesion.Type: ApplicationFiled: March 27, 2001Publication date: October 3, 2002Inventors: Kevin K. Chan, Lijuan Huang, Fenton R. McFeely, Paul M. Solomon, Hon-Sum Philip Wong
-
Patent number: 6452276Abstract: The present invention is directed to an alpha-W layer which is employed in interconnect structures such as trench capacitors or damascene wiring levels as a diffusion barrier layer. The alpha-W layer is a single phased material that is formed by a low temperature/pressure chemical vapor deposition process using tungsten hexacarbonyl, W(CO)6, as the source material.Type: GrantFiled: April 30, 1998Date of Patent: September 17, 2002Assignee: International Business Machines CorporationInventors: Stephan A. Cohen, Fenton R. McFeely, Cevdet I. Noyan, Kenneth P. Rodbell, John J. Yurkas, Robert Rosenberg
-
Patent number: 6448131Abstract: A method for increasing the trench capacitor surface area is provided. The method, which utilizes a metal silicide to roughen the trench walls, increases capacitance due to the increase in the trench surface area after the silicide has been removed. The roughening of the trench walls can be controlled by varying one or more of the following parameters: the density of the metal, the metal film thickness, the silicide phase, and the choice of the metal. Once the metal is deposited in the trench, the method is self-limited. Shrinking the trench to its original width can be obtained by subsequent silicon deposition or by diffusion of silicon from a cap layer through the silicide.Type: GrantFiled: August 14, 2001Date of Patent: September 10, 2002Assignee: International Business Machines CorporationInventors: Cyril Cabral, Jr., Kevin K. Chan, Guy M. Cohen, Ramachandra Divakaruni, Christian Lavoie, Fenton R. McFeely