Abstract: A self-monitoring mail delivery system wherein mail is tracked as it passes through multiple delivery stages. A schedule is created of expected arrival times at each stage. Should a mail piece not arrive on time, the system is alerted to initiate a search for the late or missing mail piece, or to take other corrective action, such as expediting delivery of late pieces. A data center monitors the operations and provides management information to help enhance deliveries.

Abstract: A method and apparatus for the delivery of replacement units, particularly suited for the delivery of replacement electronic components such as Programmable Read-Only Memories (PROM's) mounted on printed circuit boards. The apparatus includes a box-like housing divided into upper and lower regions by a partition. U-shaped track guides containing flexible linkages are fixed to the inner walls of the housing and extend between the upper and lower regions. Each region is accessible through a door which when closed may only be opened by from inside the housing. To deliver a replacement unit the replacement unit is inserted into the track guides in the lower region and the lower door is closed. The housing is then wrapped, with the upper door open, with shrinkable plastic, or other suitable material. A customer's address and any necessary mailing permits are fixed to the wrapping and the whole is mailed to the customer.

Abstract: A postal rate memory module is disclosed. The module includes a memory which stores current postal data and an integral battery. The module may be used in a postal scale which includes a scale for determining the weight of an item to be mailed, a memory module for storing postal rate information, a data entry apparatus for entering postal information relating to the item and a processor operatively connected to; the scale, the postal rate memory module and the data entry apparatus, for determining the appropriate postage for the item in accordance with the weight, the entered postal information and the postal rate information. The battery has sufficient capacity to provide at least a significant portion of the power supply and is automatically replaced each time the memory module is replaced with a module containing updated postal rate information so that the user is not burdened with the need to stock and replace batteries.

Abstract: An automated mailing system includes a scale having a weighing device, a keyboard for entering postage value determining data, a postage value determining processor and a programmable read only memory containing postal rate and zip to zone conversion data. A peripheral controller interface provides communication capability between the scale processor and a plurality of peripheral mailing devices including a series of electronic postage meters each of which is adapted to provide postage value denominations for mail originating from different postal zone distribution points. A data steering interface, which may be included within the peripheral controller interface, provides interconnection between the communications lines received from the scale system processor and the communication lines of the respective electronic postage meters.

Abstract: An automated mailing system includes a scale having a weighing device, a keyboard for entering postage value determining data and an electronic postage meter selection code, a postage value determining processor and a programmable read only memory containing postal rate and zip to zone conversion data. A peripheral controller interface provides communication capability between the scale processor and a plurality of peripheral mailing devices including a series of electronic postage meters each of which is adapted to provide postage value denominations for mail originating from different postal zone distribution points. A data steering interface, which may be included within the peripheral controller interface, provides interconnection between the communications lines received from the scale system processor and the communication lines of the respective electronic postage meters.

Abstract: An interface between a system processor of an automated mailing system and selected peripheral devices carries peripheral support hardware and software for communication with the peripherals. The interface includes a board having a memory wherein programs for formatting communications with the peripherals are stored. A working memory for the temporary storage of commands and data for communication to the peripherals and a peripheral controller for establishing a communications link with a selected peripheral are also carried on the interface board. The inclusion of additional peripheral devices or the substitution of alternate peripheral devices which would require revision of communications formatting programs does not require reprogramming of the system processor and is accommodated by revising the program stored in the interface program memory.

Abstract: A postage value determining scale includes a processor which accesses postage data stored in a rate PROM carried on a card. In a basic implementation, the PROM card is mounted to a memory port socket of a circuit board which carries the processor. The processor is programmed for optional postage value related functions such as zip code to destination zone conversions and postage rate determinations for mailing from a remote origination point. The PROM carried on the rate PROM card has insufficient memory space for the optional functions. When a scale capable of providing the optional features is desired, in lieu of connecting the rate PROM card directly to the memory port, a transition board is provided for connecting the main board to a ribbon cable assembly. The ribbon cable is connected, at its opposite end, to a carrier board having a plurality of sockets and a cage for mounting a plurality of memory carrying cards including the rate PROM card.

Abstract: A peripheral interface board establishes a communications link between a postage value determining system processor associated with a postage scale and a plurality of peripheral devices. The interface includes a microcomputer which receives data and command signals from the system processor. A multiplexer interconnects the peripheral transmit line of the microcomputer with a selected peripheral device, while a further multiplexer interconnects the peripheral receive line of the microcomputer with the selected peripheral device. Typical mailing system peripheral devices include electronic postage meters, an electronic accounting system, a scale computer interface and a printer. In response to command signals from the system processor, the microcomputer establishes a communications link with a selected peripheral device.

Abstract: An automated mailing system includes a postage value determining system processor, a scale for providing weight indicative signals, a keyboard for operator entry of information relating to a determination of postage, and a plurality of peripheral devices. A peripheral controller interface establishes communications links with the peripheral devices. An incompatible systems interface interconnects a serial communications bus of the system processor and the peripheral controller interface. The incompatible systems interface includes a processor programmed to receive, decode and transmit information from or to the system processor along the serial bus and load or receive information from or to the peripheral controller interface along parallel lines. The communication timing constraints of the serial communications bus for receipt of data signals by the system processor do not permit monitoring of the data transmission by the incompatible systems processor.

Abstract: Apparatus for retrieving data from a volatile memory in a data processing system in the event of a power supply failure. Means are provided for transferring the data to an external device. Power sensing means detects a power failure; an independent power supply is provided for maintaining the data in the memory when the power sensing means detects a power failure; timing means detects a lapse of time from the power failure; and output means transfers the data from the volatile memory to the external device when the timing means indicates that a predetermined time interval has lapsed.

Abstract: A system for replacing obsolete postal rate data with new data used by a remote mail processing apparatus comprises a central data processor for generating the new data. An encoder translates the new data into electronic tone signals which are transmitted to the remote apparatus by, for example, telephone transmission lines. The electronic tone signals are translated back into new data by a decoder. A memory incorporated in the remote apparatus is equipped to store obsolete or new data at a plurality of storage locations and a programming transfer controller, which interconnects the decoder and memory, sequentially addresses each of the locations storing obsolete data, erases the obsolete data, and loads new data into the addressed location.

Abstract: An apparatus for performing mathematical calculations and for converting postal zip code information into postal zone information comprises a mathematical logic circuit which is programmed to perform mathematical calculations. A converter circuit, incorporated in the apparatus in removable, replaceable, modular form, is programmed to determine the postal zone designating each of a plurality of specific geographical destinations of mail as a function of the zip code associated with each of the geographical destinations. Since the postal zone associated with each destination zip code is also a function of the location from which mail originates, the converter logic circuit is programmed to perform the determination for a specific originating location. The apparatus may be adapted for use at different originating locations by substituting an appropriately programmed modular converter logic circuit for one which is inappropriately programmed.

Abstract: A circuit for detecting the failure of a system to respond in a planned manner to a binary control signal includes a circuit for generating a check signal which normally changes in phase with the control signal. The failure detect circuit includes inverters for generating inverted control and check signals. AND gates compare each signal with the inverted form of the other. A NOR gate produces a failure-indicating signal when an equality is sensed.

Abstract: A system for processing cyclic signal pairs generated by an optical transducer to provide an accurate measurement of the displacement of one member with respect to a reference is suitable for determining weight by measuring spring scale tare deflection. The system includes a pair of comparator Schmitt trigger circuits for shaping pulse waveform signals. The pulse signals are processed by fully clocked digital circuits including edge discriminators to generate multiple count pulses which are processed by combination logic for direction determination. Further processing includes sign determination (positive-negative) and zero identification circuits to provide up and down pulses which are filtered and fed to up/down counter stages. Counter stage information is decoded for feedback control and processing logic indication.

Abstract: For servicing digital logic circuits, a hand-held monitor can be connected to an indefinite number of different sets of test points. Numerical and binary displays indicate the current state of the selected test points. To help the user understand what is being monitored, removable cards can be mounted adjacent the displays. Each of the cards has printed information relating to a different set of test points. An operator-controlled auxiliary clock is included to permit the operator to step the circuit being monitored through its operating sequence.

Abstract: For detecting inadequate separation of successive documents (i.e., stream feed) which pass in seriatim through an apparatus, a logic circuit a counter which begins to count when a first document passes a particular point in the apparatus. A flip-flop is set by a signal from a photosensitive element when a second document passes a second predetermined point. In normal operation, a decoder will respond at a fixed count to clear the flip-flop before a third document arrives at the photosensitive element. However, if the photosensitive element output changes again, indicating the third document has reached the second point before the fixed count is attained, a NOR gate connected to the photosensitive element and the flip-flop generates an inadequate separation or stream feed signal.

Abstract: A postage meter setting device is described which includes electromechanical apparatus for positioning the various digit selector arms of a postage meter in accordance with the corresponding required postage. Stepper motors drive various digit selector arms through a mechanical linkage, which provides a one to one rotational relationship between the meter selector arms and the linkage. Use of stepper motors results in reduced wear and cost of operation.

Abstract: A delayed latch strobe generator for a display on a monitor used to service digital logic systems wherein time-based or event-based latch strobes are generated. A device on the monitor can be pre-set by a user to select the interval between the system latch strobe and the delayed latch strobe. When the normal latch strobe occurs, a binary counter is enabled. This counter is then incremented by system clock pulses. An exclusive-NOR comparator continually compares the counter contents with the setting of the user-controlled device. A match, which indicates the interval has elapsed, results in the generation of a delayed latch strobe which is applied to the display.

Abstract: A malfunction detector system includes sensors spaced along an article flow path. Recirculating shift registers shift a binary 1 signal through succeeding stages as article-detected signals are received from the associated sensors. Logic elements compare the contents of stage "n" of one shift register with the contents of stage "n+1" of the shift register connected to the next sensor on the article flow path. The concurrent existence of binary 1 signals in the compared stages indicates a jam or a sensor failure has occurred.