Patents by Inventor Fumihiko Sato

Fumihiko Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6883239
    Abstract: A hair-trimming device is disclosed. The device comprises a substantially U-shaped member having a first handle portion and a second handle portion and an elastic portion alloy the first handle portion and the second handle portion to elastically separated; a pair of razor-fastener connected to the ends of the first and second handle and one lateral edge of the razor fastener being longitudinally mounted with razor with protective cover; and a stop mounted across the first handle and the second handle such that the handles are restricted to open to an excessive scope.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: April 26, 2005
    Inventor: Fumihiko Sato
  • Publication number: 20050044723
    Abstract: A hair-trimming device is disclosed. The device comprises a substantially U-shaped member having a first handle portion and a second handle portion and an elastic portion alloy the first handle portion and the second handle portion to elastically separated; a pair of razor-fastener connected to the ends of the first and second handle and one lateral edge of the razor fastener being longitudinally mounted with razor with protective cover; and a stop mounted across the first handle and the second handle such that the handles are restricted to open to an excessive scope.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 3, 2005
    Inventor: Fumihiko Sato
  • Publication number: 20040248941
    Abstract: The present invention relates to a compound represented by the following formula 1
    Type: Application
    Filed: March 19, 2004
    Publication date: December 9, 2004
    Inventors: Keiji Kamiyama, Fumihiko Sato, Hiroshi Banno, Atsushi Hasuoka
  • Publication number: 20040129069
    Abstract: An air-fuel ratio sensor includes a sensor element inserted through a cylindrical housing for detecting an air-fuel ratio in an atmosphere of unburnt gas, and a measured gas side cover disposed on an end of the cylindrical housing so as to cover the sensor element and defining an inside chamber for storing therein a gas to be measured. The cover has a nested structure composed of a plurality of cup-shaped cover members disposed one inside another, each cover member having a gas inlet hole formed in a side wall thereof and a bottom hole formed in a bottom wall thereof. The gas inlet hole of an innermost one of the plural cover members that directly faces the sensor element is offset from an air-fuel ratio detecting portion of the sensor element toward the housing in an axial direction of the sensor.
    Type: Application
    Filed: October 17, 2003
    Publication date: July 8, 2004
    Applicants: DENSO CORPORATION, NIPPON SOKEN, INC., TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Toshihiro Sakawa, Daisuke Makino, Hiroo Imamura, Fumihiko Sato, Katsuya Hirai
  • Patent number: 6739177
    Abstract: Correction of a fuel injection amount in an internal combustion engine during purge of evaporative fuel is performed on the basis of an output from an intake-oxygen concentration sensor disposed in an intake passage of the internal combustion engine. If the amplitude of fluctuations in engine speed becomes equal to or greater than a predetermined value, it is determined that there is an anomaly in engine output. In addition, if an anomaly in engine output is detected during purge and if no anomaly in engine output is detected during stoppage of purge, an ECU determines that an anomaly has occurred in the intake-oxygen concentration sensor, cancels correction of the fuel injection amount based on an output from the intake-oxygen concentration sensor during purge, and corrects the fuel injection amount on the basis of outputs from exhaust-gas air-fuel ratio sensors.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: May 25, 2004
    Assignees: Toyota Jidosha Kabushiki Kaisha, Nippon Soken, Inc.
    Inventors: Fumihiko Sato, Takuji Matsubara, Mamoru Yoshioka, Yoshihiko Hyoudo, Takayuki Takeuchi, Naohisa Oyama, Shigeki Daido
  • Publication number: 20040039027
    Abstract: A compound represented by the formula (I) 1
    Type: Application
    Filed: April 9, 2003
    Publication date: February 26, 2004
    Inventors: Keiji Kamiyama, Fumihiko Sato
  • Patent number: 6680522
    Abstract: An object of the invention is to minimize variation in characteristics of a vertical bipolar transistor. An insulating side wall spacer composed of a silicon nitride film 10 and a silicon oxide film 9 is formed on the side surface of an opening 101 formed in a base electrode polysilicon film 7. The thickness (=WD) of the insulating side wall spacer is made thicker than the maximum thickness (=WF) within a range of variation in thickness of a polycrystalline film 12 grown from the side surface of the base electrode polysilicon film 7 exposed inside the opening 101 (namely, WD>WF). The size of an opening for forming an emitter electrode polysilicon film 16 on an intrinsic base 11 is not influenced by the thickness of a polycrystalline film 12 epitaxially growing from the side surface of the polysilicon film 7 for the base electrode, but is defined by the side wall spacer formed on a portion of the side surface of the base electrode polysilicon film.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: January 20, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Fumihiko Sato
  • Patent number: 6667749
    Abstract: A user interface system, computer program product, and method for displaying an operation menu and transferring the contents thereof based on an operation input received in response to operation menu selection. The display and transfer of the operation menu are achieved using a group of independent software objects that include a menu flow software object that controls the transfer of the contents of the operation menu and a separate operation software object that functions in cooperation with the menu flow software object to control processing of the operation input by a processor. The operation software object includes an operational information memorizing object for storage of the operation software object contents and a separate operation controlling object functioning in cooperation with the operational information memorizing object to create, change, and delete the input operation.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: December 23, 2003
    Assignee: Ricoh Company, Ltd.
    Inventor: Fumihiko Sato
  • Publication number: 20030061836
    Abstract: To provide an optical wave guide that may be produced by reproduction method in easy and simple manner, and has a structure that prevents light signal in its inside from leaking out from core, and a method for producing the same optical wave guide. A concave slot 3 for forming a core is formed on the upper surface of a cladding substrate 2. And on both sides of the concave slot 3, cavities 6 are formed via flat portions 5. An ultraviolet ray hardening type transparent resin 8 is applied onto the surface of the cladding substrate 2, thereafter the transparent resin 8 is pressed by a stamper 13. At this moment, a core 4 is formed in the concave slot 3 and excessive transparent resin 8 pressed between the stamper 13 and the flat portions 5 flows into cavities 6, as a result, it is possible to make the transparent resin 8 thin in a short time. Thereby, it is possible to make the transparent resin 8 left on the flat portions 5 into thickness and width enough to prevent light in the core 4 from leaking out.
    Type: Application
    Filed: September 25, 2002
    Publication date: April 3, 2003
    Inventors: Masayoshi Higuchi, Toshiyuki Takahashi, Hiromi Totani, Naru Yasuda, Hayami Hosokawa, Fumihiko Sato
  • Publication number: 20030058282
    Abstract: A user interface system including plural independent software objects. By the action of the cooperation of those software objects, the operation menu is displayed, and at the same time the contents of the displayed menu are transferred in accordance with the menu selecting operation. On the other hand, the processing requirement designated by the operation input from the displayed menu is understood and practiced, and then the information of the system is displayed on the display panel. The menu flow objects serve as the software objects for controlling menu transferring. The operation objects serve as the software objects for controlling the operation input. The menu flow objects and the operation objects are constructed as independent objects working in cooperation with each other.
    Type: Application
    Filed: August 13, 1999
    Publication date: March 27, 2003
    Inventor: FUMIHIKO SATO
  • Publication number: 20020139360
    Abstract: Correction of a fuel injection amount in an internal combustion engine during purge of evaporative fuel is performed on the basis of an output from an intake-oxygen concentration sensor disposed in an intake passage of the internal combustion engine. If the amplitude of fluctuations in engine speed becomes equal to or greater than a predetermined value, it is determined that there is an anomaly in engine output. In addition, if an anomaly in engine output is detected during purge and if no anomaly in engine output is detected during stoppage of purge, an ECU determines that an anomaly has occurred in the intake-oxygen concentration sensor, cancels correction of the fuel injection amount based on an output from the intake-oxygen concentration sensor during purge, and corrects the fuel injection amount on the basis of outputs from exhaust-gas air-fuel ratio sensors.
    Type: Application
    Filed: March 5, 2002
    Publication date: October 3, 2002
    Inventors: Fumihiko Sato, Takuji Matsubara, Mamoru Yoshioka, Yoshihiko Hyoudo, Takayuki Takeuchi, Naohisa Oyama, Shigeki Daido
  • Patent number: 6436781
    Abstract: A semiconductor device including a bipolar transistor formed by epitaxial growth or ion implantation is provided has an epitaxial silicon collector layer, a base region directly under an emitter defined as an intrinsic base and a peripheral region thereof defined as an outer base region is formed by the step of implanting ions into the collector layer to form a high concentration collector region at a location close to a buried region using a photoresist to form an aperture, and the step of implanting ions into the collector layer to form a high concentration collector region directly beneath the base region after forming the base region.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: August 20, 2002
    Assignee: NEC Corporation
    Inventor: Fumihiko Sato
  • Patent number: 6424176
    Abstract: A logic circuit (200) having a critical path input signal (C2) that can have a reduced input capacitance and a logic output (D2) that can have a reduced voltage swing is disclosed. According to one embodiment, the logic circuit may include an input circuit (210), a driver circuit (220), and a load circuit (230). Driver circuit (220) can include stacked transistors (N4 and N5) of the same conductivity type, which can generate a logic output (D2) that can have a reduced voltage swing. Driver circuit (220) can generate a feedback signal that can control the impedance of a load circuit (230). Load circuit (230) can be actively controlled to improve the response of a logic evaluation node (V2).
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: July 23, 2002
    Assignee: NEC Corporation
    Inventors: Fumihiko Sato, Hiroyuki Takahashi
  • Publication number: 20010015659
    Abstract: A logic circuit (200) having a critical path input signal (C2) that can have a reduced input capacitance and a logic output (D2) that can have a reduced voltage swing is disclosed. According to one embodiment, the logic circuit may include an input circuit (210), a driver circuit (220), and a load circuit (230). Driver circuit (220) can include stacked transistors (N4 and N5) of the same conductivity type, which can generate a logic output (D2) that can have a reduced voltage swing. Driver circuit (220) can generate a feedback signal that can control the impedance of a load circuit (230). Load circuit (230) can be actively controlled to improve the response of a logic evaluation node (V2).
    Type: Application
    Filed: February 20, 2001
    Publication date: August 23, 2001
    Inventors: Fumihiko Sato, Hiroyuki Takahashi
  • Publication number: 20010009793
    Abstract: A semiconductor device including a bipolar transistor formed by epitaxial growth or ion implantation is provided has an epitaxial silicon collector layer, a base region directly under an emitter defined as an intrinsic base and a peripheral region thereof defined as an outer base region is formed by the step of implanting ions into the collector layer to form a high concentration collector region at a location close to a buried region using a photoresist to form an aperture, and the step of implanting ions into the collector layer to form a high concentration collector region directly beneath the base region after forming the base region.
    Type: Application
    Filed: February 26, 2001
    Publication date: July 26, 2001
    Applicant: NEC Corporation
    Inventor: Fumihiko Sato
  • Publication number: 20010008298
    Abstract: A method of manufacturing a semiconductor device simultaneously forms a first vertical bipolar transistor which operates at a relatively low speed and is of a high withstand voltage and a low power requirement and a second vertical bipolar transistor which operates at a relatively high speed and is of a high power requirement. The method comprises the steps of forming openings for selectively forming single crystal base regions respectively in the vertical bipolar transistors, forming single crystal base regions via the openings, forming an insulating film on a device forming surface of a semiconductor substrate after the base regions are formed, and introducing ions of an impurity of the same conductivity type as a collection region via the insulating film. The opening in the second vertical bipolar transistor is of a size greater than the opening in the first vertical bipolar transistor.
    Type: Application
    Filed: January 11, 2001
    Publication date: July 19, 2001
    Inventor: Fumihiko Sato
  • Patent number: 6230189
    Abstract: A communications terminal includes a first memory, an address conversion table, a first web page generator, an electronic mail generator, and first and second communications controllers. The first memory stores a transfer-request image file based on image information, which is sent through a transfer-request call with a destination address from a facsimile terminal. The address conversion table converts the destination address into at least one transfer address which individually corresponds to at least one data terminal. The first web page generator opens a first web page including a link to the transfer-requested image file. The electronic mail generator informs the data terminal of the transfer-request image file by electronic mail including a first web page locator.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: May 8, 2001
    Assignee: Ricoh Company, Ltd.
    Inventors: Fumihiko Sato, Futoshi Oseto
  • Patent number: 6130560
    Abstract: The present invention provides a circuitry comprising: at least a sense amplifier further comprising at least a pair of invertor circuits having output sides connected to output invertors; and a control circuit connected to the sense amplifier and the output invertors for performing at least one of the following operations: returning output signals from the output invertors to the sense amplifier when the sense amplifier is activated; and disconnecting the output invertors from the sense amplifier when the sense amplifier is inactivated.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: October 10, 2000
    Assignee: NEC Corporation
    Inventor: Fumihiko Sato
  • Patent number: 6125462
    Abstract: A semiconductor integrated circuit device includes logic circuits for internally generating a desired pulse. Also, the device includes a plurality of logic stages for logical processes, the logic stages, in each logic stage, having constituent elements having sizes in common and having, between adjacent ones of the logic stages, parasitic capacitances and resistances in common. The semiconductor integrated circuit device can realize a minimum pulse width from a rising edge to a falling edge or from a falling edge to a rising edge of a pulse, which has been difficult to form in a testing device.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: September 26, 2000
    Assignee: NEC Corporation
    Inventor: Fumihiko Sato
  • Patent number: 6049098
    Abstract: A bipolar transistor comprises a collector region composed of an N type silicon, a base region composed of a P type silicon film in contact with the N type collector region and a P type SiC film in contact with at least one portion of P type silicon film, and an emitter region of an N type SiC film in contact with at least one portion of the P type SiC film.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: April 11, 2000
    Assignee: NEC Corporation
    Inventor: Fumihiko Sato