Abstract: The present invention realizes a manufacturing method of bipolar transistors allowing omission of photolithographic process of the emitter electrode polysilicon and measurement of the characteristics of the transistor before forming metal electrodes. The present invention discloses a diffusion check transistor within a wafer for mass producing the bipolar transistor having the same structure and the same electrical characteristics.

Abstract: A semiconductor device including a bipolar transistor is provided, which can reduce the base resistance of the transistor. This device includes a semiconductor base region having a first semiconductor active region of a first conductivity type in its inside. A first insulating layer is formed on the main surface of the substructure to cover the first active region. The first insulating layer has a first penetrating window exposing the first active region. A semiconductor contact region of a second conductivity type is formed on the first insulating layer. The contact region has an overhanging part which overhangs the first window. The second window is defined by the inner end of the overhanging part to be entirely overlapped with the first window. The contact region is made of a polycrystalline semiconductor. A second semiconductor active region of the second conductivity type is formed on the first active region in the first window.

Abstract: In a logic circuit including a NAND type or a NOR type decoder, a p-MOS type transistor for precharge or an n-MOS type transistor for discharge is connected to a common node. The transistor allows precharge or discharge to be completed in a short period of time by promoting the charging or discharging of stray capacitances. Therefore, the circuit reduces the period of time necessary for the decoder to produce a high level output or a low level output.

Abstract: To provide a capacitive sensor which produces a sensor output excellent in linearity. The capacitive sensor comprises a first semiconductor substrate and a second substrate. The first semiconductor substrate is formed with a frame portion and a diaphragm portion serving as a movable electrode, and bonded with the second substrate at the upper surface of the frame portion by anodic bonding. The second substrate is provided with a fixed electrode on a surface facing the diaphragm portion. A fixing projection is provided on a center of the diaphragm portion and is fixed to the second substrate through a hole of the fixed electrode. When external force is applied to the sensor, the diaphragm portion displaces upward and/or downward. The external force is detected based on change of electrostatic capacitance. Since the center of the diaphragm portion is fixed by the fixing projection, the maximum displacement region of the diaphragm portion forms a ring, resulting in enhancement of linearity of the sensor output.

Abstract: A semiconductor device including a bipolar transistor is provided, which can reduce the base resistance of the transistor. This device includes a semiconductor base region having a first semiconductor active region of a first conductivity type in its inside. A first insulating layer is formed on the main surface of the substructure to cover the first active region. The first insulating layer has a first penetrating window exposing the first active region. A semiconductor contact region of a second conductivity type is formed on the first insulating layer. The contact region has an overhanging part which overhangs the first window. The second window is defined by the inner end of the overhanging part to be entirely overlapped with the first window. The contact region is made of a polycrystalline semiconductor. A second semiconductor active region of the second conductivity type is formed on the first active region in the first window.

Abstract: A SiGe alloy film containing electrically active impurity in a concentration higher than the intrinsic base layer is formed on the eaves-structured polycrystalline silicon film for base electrode. After that, SiGe only just under the opening is removed completely by dry etching under a condition that etching speed of SiGe is faster than that of Si, and subsequently the intrinsic base layer is formed.

Abstract: A fabrication method of a semiconductor device in which a single-crystal semiconductor layer can be epitaxially grown on an entire growth surface with less or no thickness fluctuation. A first insulating film is formed on a first single-crystal semiconductor layer of a first conductivity type. A first polycrystalline semiconductor film and a second insulating film are selectively formed on the first insulating film. The first insulating film is exposed through a first opening formed between the first polycrystalline semiconductor film and the second insulating film. The first insulating film is selectively removed using the first polycrystalline semiconductor film and the second insulating film as a mask, thereby forming a second opening greater in plan size than the first opening. A second single-crystal semiconductor layer of the second conductivity type is epitaxially grown on the first single-crystal semiconductor layer in the second opening.

Abstract: A bipolar transistor includes a base structure in a hollow space on a single crystal silicon collector region defined by a silicon oxide layer, and the base structure has an extrinsic base provided around a single crystal silicon emitter region and an intrinsic base layer of single crystal silicon germanium decreasing the thickness from a central portion toward an outer periphery so as to decrease dislocation due to thermal stress in a heat treatment for the emitter region.

Abstract: A semiconductor device having a first insulation film, a base contact and a second insulation film on a semiconductor substrate. The first and second insulation films and the base contact respectively have openings which forms a hole extending therethrough on the substrate. An end of the base contact is projected over the substrate in the hole. A base connection region is in contact with the side and bottom faces of the projected end of the base contact and with a surface of a base region in the hole. An emitter region is formed in the base region. Reduced contact resistance between the base contact and the base connection region can be obtained.

Abstract: A bipolar transistor has a first semiconductor region of an n-type epitaxial layer surrounded by a first insulating film, a second insulating film of silicon oxide having an opening, a second semiconductor region as a base link region of a p-type formed in the opening and having a high impurity concentration and a thickness substantially the same as that of the second insulating film, a third semiconductor region as an intrinsic base of a p-type having a thickness thinner than that of the second insulating film, a sidewall insulating film covering the third semiconductor region, and a fourth semiconductor of a p-type formed on the third semiconductor region and surrounded by the side-wall insulating film. The reduction in the thickness of the intrinsic base is achieved without reducing the thickness of the base link region and thus it is possible to realize a bipolar transistor in which a cut-off frequency is high and yet the base resistance is low.

Abstract: A hollow extruding die for extruding a hollow section of a zinc-containing aluminum alloy is provided. The die is protected from cracks and has an extended life, without requiring any substantial structural changes to the die. In the die mandrel of the die a mandrel is connected by bridges with an outer cylindrical member. The bridges have a tapered projection facing toward the mandrel. A 3 mm thick coating composed of a nickel alloy is bonded on the surface of the projection by padding the welding material. Instead of coating the bridges, a covering can be attached to the surface of the bridges. To receive the covering, an engaging groove extends from the root of the mandrel and along the surface of the bridges to the outer cylindrical member of the die mandrel. The covering is composed of the same steel material as that of the die or of the nickel alloy. The covering has a through hole for receiving the mandrel formed on the base.

Abstract: In a process for manufacturing a bipolar transistor, an intrinsic base is formed by a selective epitaxial growth while the lower surface of a base electrode single crystal silicon film 33 and the surface of a collector epitaxial layer 3 are exposed. In this process, the intrinsic base 8 and an extrinsic base 34 are grown as a single crystal to form a self-alignment type bipolar transistor having a reduced parasitic capacitance between the base and the collector.

Abstract: A semiconductor device having a monocrystalline semiconductor layer, a first insulating film, a base leading electrode, and a second insulating film is arranged such that a predetermined pattern window is provided in the second insulating film, a third insulating film of silicon oxide is provided between two peripheries of the predetermined pattern window, a first window is provided between a side of the second insulating film and a side of the third insulating film, a second window extends from the first window and is larger than the first window so that the base leading electrode and the third insulating film have overhang portions, first spacers are provided respectively in alignment with the peripheries of the predetermined pattern window and in alignment with the sides of the third insulating film, second spacers cover the first spacers and the overhang portions, and emitter layers are provided between and in self-alignment with the second spacers.

Abstract: A bipolar transistor has a base rink structure epitaxially grown from an overhang portion of a poly-crystal silicon base electrode and an epitaxial collector layer and an intrinsic base structure grown on a concave central portion of the base rink structure after a diffusion stage of a dopant impurity into the base rink structure, and the intrinsic base structure is electrically connected through a buried collector region passing through the concave central portion into an epitaxial collector layer, thereby maintaining the dopant impurity profile in the intrinsic base structure without deterioration of transistor characteristics.

Abstract: A bipolar transistor with a structure such that it is possible to reduce the parasitic capacity without sacrificing improvements in cut-off frequency f.sub.T, in which a P.sup.+ -type polycrystalline silicon film 122A is provided on the side wall of an opening 143A which is provided in a silicon nitride film 152A serving as the middle layer of a laminated insulation film 107A, and, a P-type single crystal silicon layer 121A constituting the intrinsic base region is connected to a P.sup.+ -type polycrystalline silicon film 111 which is a base drawing electrode via a thin P.sup.+ -type polycrystalline silicon film 123A.

Abstract: A method of fabricating a vertical bipolar semiconductor device includes a step of forming an N.sup.- -type silicon epitaxial layer which constitutes a part of a collector region and a P.sup.+ -type polycrystalline silicon film which functions as a base lead-out electrode. The silicon epitaxial layer and the polycrystalline silicon film are insulated by a silicon oxide film which is a sufficiently thick insulating film, covers the silicon epitaxial layer and has an opening. In this opening, by selective growth of a first and a second semiconductor film and ion implantation using a first insulating film spacer, there are formed a P.sup.- -type single crystal silicon layer, a P.sup.+ -type polycrystalline silicon film, a P.sup.+ type single crystal silicon layer (intrinsic base region), a P.sup.+ -type polycrystalline silicon film, and an N-type single crystal silicon layer.

Abstract: A Si-SiGe-Si heterojunction bipolar transistor which has a very thin epitaxial base layer. The device possesses an optimum doping profile across a base layer. The emitter region is higher doping concentration of n.sup.+ -type. The base layer of p-type comprises both a monocrystalline SiGe layer having a lightly doped region on a collector side and a heavily doped region, and a lightly doped monocrystalline Si layer on an emitter side. An emitter side Si-SiGe heterojunction exists in the base layer and a collector side Si-SiGe heterojunction exists in the collector region. Those provides a slope negative gradient of a potential profile from the emitter to collector without a potential barrier for carriers, or electrons or holes. The very thin base layer is connected to an aluminium contact through an external base layer and a base contact layer thereby permitting the very thin base layer to be free from a damage by contacting with a metal such as aluminium.

Abstract: The present invention relates to a semiconductor device which comprises: an n.sup.- type buried collector provided on an n type silicon epitaxial layer disposed in an emitter opening; an n.sup.- type silicon collector disposed on said collector; a p.sup.+ type single crystal silicon intrinsic base layer; and an n.sup.+ type single crystal silicon emitter wherein said p.sup.+ type single crystal silicon intrinsic base layer is connected with a p.sup.+ type base electrode polycrystalline silicon through a p.sup.+ type polycrystalline silicon graft base.

Abstract: A semiconductor integrated circuit includes a sequential circuit including a plurality of flip-flops which latch and keep data supplied to an input terminal at a prescribed timing and which perform prescribed sequential treatments of the input data, and a combinational circuit implemented at the input and/or output terminals of the sequential circuit and which performs a prescribed combinational treatment or treatments of the input and/or output data to and/or from the sequential circuit. The semiconductor integrated circuit also includes a data-through circuit operated by an external control signal configured to transfer the data supplied to the input terminal direct to an output terminal of a prescribed flip-flop of the plurality flip-flops constituting the sequential circuit.

Abstract: A method of manufacturing a semiconductor device includes a monocrystalline semiconductor layer of one conductivity type with a first insulating film covering the semiconductor layer. An aperture is selectively formed in the first insulating film to expose a part of the semiconductor layer. A first polycrystalline semiconductor film of an opposite conductivity type is formed on the first insulating film and has an overhang portion projecting over the aperture from an edge of the first insulating film defining the aperture.