Abstract: A controller of a switching power converter sets an actual turn-on time of a switch in the switching power converter in each switching cycle by selecting one of a plurality of valley points of the output voltage of the switching power converter occurring subsequent to the desired turn-on time of the switch. The desired turn-on time of the switch may be calculated according to the regulation scheme employed by the switching power converter. The controller selects one of the plurality of valley points randomly from switching cycle to switching cycle. The controller generates a control signal to turn on the switching power converter at the selected one of the plurality of valley points of the output voltage occurring subsequent to the desired turn-on time.

Abstract: A switching power converter provides regulated output power to a load. The switching power converter comprises a transformer including a primary winding coupled to an input voltage, a secondary winding coupled to an output of the switching power converter, an auxiliary winding on a primary side of the transformer, and a switch coupled to the primary winding of the transformer. Output voltage across the secondary winding is reflected as a feedback voltage across the auxiliary winding. The switching power converter detects output current based on a reset time of the transformer. Based on the detected output power, the switching power converter controls switching of the switch to provide regulated output power.

Abstract: A switching power converter provides regulated voltage to a load. The switching power converter comprises a transformer including a first primary winding coupled to an input voltage, a second primary winding, a secondary winding coupled to an output of the switching power converter, and an auxiliary winding, a first switch coupled to the first primary winding, and a second switch coupled to the secondary primary winding. A controller generates a first control signal to turn the first switch on or off at a first switching frequency, and a second control signal to turn the second switch on or off at a second switching frequency that is higher than the first frequency. During off cycles of the switches, feedback voltage representing the output voltage of the power converter is generated across the auxiliary winding. The controller controls switching of the first switch to regulate the output voltage based on the feedback.

Abstract: A method of a controller of a switching power converter that provides a configurable power factor control method for the switching power converter. The controller combines power regulation control methods of constant on-time control and constant power control to adjust the power factor of the switching power converter. The controller switches between constant on-time control and constant power control based on an input voltage of the power converter.

Abstract: The embodiments herein include a primary-side controller for a switching power converter that is capable of receiving a detection signal from a secondary-side detection circuit indicating that an output voltage has reached a condition. The controller determines the appropriate action once a detection signal has been received by distinguishing whether a dynamic load condition has been placed on the power supply versus other operating conditions.

Abstract: A power converter includes a transformer with a primary and a secondary winding and a switch. A controller of the power converter at the primary winding side of the transformer generates a control signal to turn on or turn off the switch, the switch being turned on responsive to the control signal being in a first state and the switch being turned off responsive to the control signal being in a second state. The controller determines current through the primary winding generated while the switch is turned on and indirectly detects an input voltage to the power converter based on the current through the primary winding generated while the switch is turned on. The controller in turn may detect conditions such as a loss of power or brown out at the input of the power converter based on the indirectly detected input voltage.

Abstract: The embodiments disclosed herein describe a method of a controller of a switching power converter that provides a configurable power factor control method for the switching power converter. In one embodiment, the controller combines power regulation control methods of constant on-time control and constant power control to adjust the power factor of the switching power converter.

Abstract: Embodiments described herein describe a power supply configured to provide power to an output load via a power supply transformer. The power supply includes a controller configured to operate in a configuration state and an operating state. During the configuration state, the controller receives a configuration signal from a sense circuit coupled to the controller and selects one of a plurality of operating modes from the configuration signal. During the operating state, the controller controls a switch coupled to the transformer based on the selected operating mode and a sense signal received from the sense circuit representative of the power provided to the output load by the power supply. When the switch is closed, current flows from a power source through the transformer, and when the switch is open, current is prevented from flowing from the power source through the transformer.

Abstract: Embodiments disclosed herein describe the use of a power supply to provide power to an LED load. The power supply provides a present output current to the LED, and receives a temperature signal representing the operating temperature of the LED. A target output current is determined, for instance based on the temperature signal. An output current rate of change is determined, and the power supply adjusts the output current to the LED at the determined rate of change until the output current is substantially equal to the target current.

Abstract: A switching power converter provides regulated voltage to a load according to a desired regulation voltage. The switching power converter includes a transformer coupled to a switch and a switch controller for generating a control signal to control switching. The switch controller monitors a sensed voltage representing the output voltage of the switching power converter. The switch controller controls switching of the switch to operate the switching power converter in a continuous conduction mode while the sensed output voltage indicates that the output voltage is less than a first threshold voltage. The switch controller controls switching of the switch to operate the switching power converter in a discontinuous conduction mode while the sensed output voltage is above the first threshold voltage.

Abstract: A controller integrated circuit (IC) for controlling a power converter uses one or more IC pins having plurality of functions such as configuration of a parameter supported by the controller IC and shutdown protection. Several different functions may be supported by a single IC pin, thereby reducing the number of pins required in the controller IC and also reducing the cost of manufacturing the controller IC. The controller IC may also share a comparison circuit among different pins and the different functions provided by those pins. Use of a shared comparison circuit further reduces the cost of manufacturing the controller IC without sacrificing the performance of the IC.

Abstract: The embodiments herein describe a dynamic metal-oxide-semiconductor field-effect transistor (MOSFET) gate driver system architecture and control scheme. The MOSFET gate driver system dynamically adjusts both the gate driver turn-on-resistance and the gate driver turn-off resistance within a single (i.e., one) switching cycle to reduce electromagnetic interference (EMI) in the system and to minimize the conduction loss of a power MOSFET during operation.

Abstract: A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU includes an instruction set whose instructions are optimized to perform the atomic operations of a PLL. The RCU is clocked at a fast enough processor clock rate to insure that all PLL atomic operations are performed within a single PLL reference clock cycle.

Abstract: A switch controller is disclosed that adaptively controls the operating frequency of a switching power converter in order to improve one-time load response and repetitive dynamic load responses. During a transition from a high load to low load condition, the switch controller clamps the operating frequency of the switching power converter at an intermediate frequency for a period of time before allowing the operating frequency to return to a frequency associated with the low load condition. The clamped frequency is higher than the frequency associated with the low load condition thereby allowing improved response to a subsequent load change to a high load condition. Thus, the system improves dynamic load response without compromising no-load power consumption.

Abstract: A switching power converter provides regulated voltage to a load according to a desired regulation voltage. The switching power converter includes a transformer coupled to a switch and a switch controller for generating a control signal to control switching. The switch controller monitors a sensed voltage representing the output voltage of the switching power converter. The switch controller controls switching of the switch to operate the switching power converter in a continuous conduction mode while the sensed output voltage indicates that the output voltage is less than a first threshold voltage. The switch controller controls switching of the switch to operate the switching power converter in a discontinuous conduction mode while the sensed output voltage is above the first threshold voltage.

Abstract: A switch controller is disclosed that adaptively controls the operating frequency of a switching power converter in order to improve one-time load response and repetitive dynamic load responses. During a transition from a high load to low load condition, the switch controller clamps the operating frequency of the switching power converter at an intermediate frequency for a period of time before allowing the operating frequency to return to a frequency associated with the low load condition. The clamped frequency is higher than the frequency associated with the low load condition thereby allowing improved response to a subsequent load change to a high load condition. Thus, the system improves dynamic load response without compromising no-load power consumption.

Abstract: A novel and useful apparatus for and method of spur reduction using computation spreading with dithering in a digital phase locked loop (DPLL) architecture. A software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU is adapted to spread the computation of the atomic operations out over a PLL reference clock period wherein each computation is performed at a much higher processor clock frequency than the PLL reference clock rate. This significantly reduces the per cycle current transient generated by the computations. The frequency content of the current transients is at the higher processor clock frequency which results in a significant reduction in spurs within sensitive portions of the output spectrum.

Abstract: Adaptive multi-mode digital control schemes that improve the light-load efficiency (and thus the overall average efficiency) in switch-mode power converters without causing performance issues such as audible noises or excessive voltage ripples. Embodiments include a switch-mode power converter that reduces current in the power converter using a second pulse-width-modulation (PWM) mode before reaching switching frequencies that generate audible noises. As the load across the output of the power converter is reduced, the power converter transitions from a first PWM mode in high load conditions to a first pulse-frequency-modulation (PFM) mode, then to a second PWM mode, and finally to a second PFM mode. During the second PFM mode, the switching frequency is dropped to audible frequency levels. Current in the power converter, however, is reduced in the second PWM mode before transitioning to the second PFM mode.

Abstract: A novel and useful apparatus for and method of spur reduction using computation spreading in a digital phase locked loop (DPLL) architecture. A software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU is adapted to spread the computation of the atomic operations out over and completed within an entire PLL reference clock period. Each computation being performed at a much higher processor clock frequency than the PLL reference clock rate. This functions to significantly reduce the per cycle current transient generated by the computations. Further, the frequency content of the current transients is at the higher processor clock frequency. This results in a significant reduction in spurs within sensitive portions of the output spectrum.

Abstract: A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU includes an instruction set whose instructions are optimized to perform the atomic operations of a PLL. A multi-stage data stream based processor incorporates a parallel/pipelined architecture optimized to perform data stream processing efficiently. The multi-stage parallel/pipelined processor provides significantly higher processing speeds by combining multiple RCUs wherein input data samples are input in parallel to all RCUs while computation results from one RCU are used by adjacent downstream RCUs. A register file provides storage for historical values while local storage in each RCU provides storage for temporary results.