Abstract: The present invention generally includes a coupling between components. When igniting a plasma remote from a processing chamber, the reactive gas ions may travel to the processing chamber through numerous components. The reactive gas ions may be quite hot and cause the various components to become very hot and thus, the seals between apparatus components may fail. Therefore, it may be beneficial to cool any metallic components through which the reactive gas ions may travel. However, at the interface between the cooled metallic component and a ceramic component, the ceramic component may experience a temperature gradient sufficient to crack the ceramic material due to the heat of the reactive gas ions and the coolness of the metallic component. Therefore, extending a flange of the metallic component into the ceramic component may lessen the temperature gradient at the interface and reduce cracking of the ceramic component.

Abstract: The present invention generally includes a plasma enhanced chemical vapor deposition (PECVD) processing chamber having an RF power source coupled to the backing plate at a location separate from the gas source. By feeding the gas into the processing chamber at a location separate from the RF power, parasitic plasma formation in the gas tubes leading to the processing chamber may be reduced. The gas may be fed to the chamber at a plurality of locations. At each location, the gas may be fed to the processing chamber from the gas source by passing through a remote plasma source as well as an RF choke or RF resistor.

Abstract: The present invention generally includes a plasma enhanced chemical vapor deposition (PECVD) processing chamber having an RF power source coupled to the backing plate at a location separate from the gas source. By feeding the gas into the processing chamber at a location separate from the RF power, parasitic plasma formation in the gas tubes leading to the processing chamber may be reduced. The gas may be fed to the chamber at a plurality of locations. At each location, the gas may be fed to the processing chamber from the gas source by passing through a remote plasma source as well as an RF choke or RF resistor.

Abstract: The present invention generally provides apparatus for supporting a large area substrate in a plasma reactor. One embodiment, a substrate support for using in a plasma reactor includes an electrically conductive body has a top surface with a plurality of roll-formed indents.

Abstract: Systems, methods, and apparatus involve a plasma processing chamber for depositing a film on a substrate. The plasma processing chamber includes a lid assembly having a ground plate, a backing plate, and a non-uniformity existing between the ground plate and the backing plate. The non-uniformity may interfere with RF wave uniformity and cause an impedance imbalance between portions of the ground plate and backing plate. The non-uniformity may include a structure or a reduced spacing of non-uniform surfaces. A reduced spacing of non-uniform surfaces may exist where a first distance between the ground plate and the backing plate at a first end is different from a second distance between the ground plate and the backing plate at a second end. The structure may be from 2 cm to 10 cm thick, cover from 20% to 50% of the backing plate, and be located away from a discontinuity existing inside the chamber.

Abstract: The present invention generally includes a chamber liner spaced from a chamber wall to permit processing gases to be pulled between the chamber liner and the chamber wall when withdrawing gases from the processing chamber. When the vacuum pump is below the susceptor, processing gases will be drawn below the susceptor and may lead to undesired deposition onto process chamber components. Additionally, the processing gases will be pulled past the slit valve opening and potentially deposit within the slit valve opening. When material deposits in the slit valve opening, flaking may occur and contaminate the substrates. By drawing the processing gases along the sidewalls other than the one having the slit valve opening therethrough, undesired deposition on the slit valve opening may be reduced.

Abstract: The present invention generally comprises a method for cleaning a large area substrate processing chamber. As chamber volume increases, it has surprisingly been found that simply scaling up the cleaning conditions may not effectively clean silicon from the exposed chamber surfaces. Undesired silicon deposits on exposed chamber surfaces may lead to contamination in solar panel formation. Increasing the pressure of the chamber to about 10 Torr or greater while maintaining the chamber at a temperature between about 150 degrees Celsius and 250 degrees Celsius increases plasma cleaning effectiveness such that silicon deposits are removed from the chamber. The combination of high pressure and low temperature may reduce substrate contamination without sacrificing substrate throughput in solar panel fabrication.

Abstract: The present invention generally comprises an RF shutter assembly for use in a plasma processing apparatus. The RF shutter assembly may reduce the amount of plasma creep below the substrate and shadow frame during processing, thereby reducing the amount of deposition that occurs on undesired surfaces. By reducing the amount of deposition on undesired surfaces, particle flaking and thus, substrate contamination may be reduced.

Abstract: An asymmetrically grounded susceptor used in a plasma processing chamber for chemical vapor deposition onto large rectangular panels supported on and grounded by the susceptor. A plurality of grounding straps are connected between the periphery of the susceptor to the grounded vacuum chamber to shorten the grounding paths for RF electrons. Flexible straps allow the susceptor to vertically move. The straps provide a conductance to ground which is asymmetric around the periphery. The straps may be evenly spaced but have different thicknesses or different shapes or be removed from available grounding point and hence provide different RF conductances. The asymmetry is selected to improve the deposition uniformity and other qualities of the PECVD deposited film.

Abstract: A method and apparatus is provided for controlling the etch profile of a multilayer layer stack by depositing a first and second material layer with differential etch rates in the same or different processing chamber.

Abstract: A method and apparatus for reducing arcing in a plasma processing system when processing large area substrates which contain one or more holes. In one embodiment of the invention, a substrate support member includes an electrically insulating insert located beneath a hole in an insulating, large area substrate. The insulating insert is made of aluminum oxide, and is located within a hole in the support member such that the insert is disposed beneath a hole in a glass substrate. The substrate support member is made of aluminum with an anodized surface.

Abstract: Embodiments of a gas distribution plate for distributing gas in a processing chamber for large area substrates are provided. The embodiments describe a gas distribution plate assembly for a plasma processing chamber having a cover plate comprises a diffuser plate having an upstream side, a downstream side facing a processing region, and a plurality of gas passages formed through the diffuser plate, and a baffle plate, placed between the cover plate of the process chamber and the diffuser plate, having a plurality of holes extending from the upper surface to the lower surface of the baffle plate, wherein the plurality of holes have at least two sizes. The small pinholes of the baffle plate are used to allow sufficient pass-through of gas mixture, while the large holes of the baffle plate are used to improve the process uniformity across the substrate.

Abstract: We have developed a method of PECVD depositing a-SiNx:H films which are useful in a TFT device as gate dielectric and passivation layers, when a series of TFT devices are arrayed over a substrate having a surface area larger than about 1 m2, which may be in the range of about 4.1 m2, and even as large as 9 m2. The a-SiNx:H films provide a uniformity of film thickness and uniformity of film properties, including chemical composition, which are necessary over such large substrate surface areas. The films produced by the method are useful for both liquid crystal active matrix displays and for organic light emitting diode control.

Abstract: Embodiments of a gas distribution plate for distributing gas in a processing chamber for large area substrates are provided. The embodiments describe a gas distribution plate assembly for a plasma processing chamber having a cover plate comprises a diffuser plate having an upstream side, a downstream side facing a processing region, and a plurality of gas passages formed through the diffuser plate, and a baffle plate, placed between the cover plate of the process chamber and the diffuser plate, having a plurality of holes extending from the upper surface to the lower surface of the baffle plate, wherein the plurality of holes have at least two sizes. The small pinholes of the baffle plate are used to allow sufficient pass-through of gas mixture, while the large holes of the baffle plate are used to improve the process uniformity across the substrate.

Abstract: We have a method of improving the deposition rate uniformity of the chemical vapor deposition (CVD) of films when a number of substrates are processed in series, sequentially in a deposition chamber. The method includes the plasma pre-heating of at least one processing volume structure within the processing volume which surrounds the substrate when the substrate is present in the deposition chamber. We also have a device-controlled method which adjusts the deposition time for a few substrates at the beginning of the processing of a number of substrates in series, sequentially in a deposition chamber, so that the deposited film thickness remains essentially constant during processing of the series of substrates. A combination of these methods into a single method provides the best overall results in terms of controlling average film thickness from substrate to substrate.

Abstract: We have developed a method of PECVD depositing a-SiNx:H films which are useful in a TFT device as gate dielectric and passivation layers, when a series of TFT devices are arrayed over a substrate having a surface area larger than about 1 m2, which may be in the range of about 4.1 m2, and even as large as 9 m2. The a-SiNx:H films provide a uniformity of film thickness and uniformity of film properties, including chemical composition, which are necessary over such large substrate surface areas. The films produced by the method are useful for both liquid crystal active matrix displays and for organic light emitting diode control.

Abstract: A method has been provided for etching adjoining layers of indium tin oxide (ITO) and silicon in a single, continuous dry etching process. A conventional dry etching gas, such as HI, is used to etch ITO using RF or plasma energy. When the silicon layer underlying the ITO layer is reached, oxygen or nitrogen is added to etching gas to improve the selectivity of ITO to silicon. In some aspects of the invention an etch-stop layer is formed in the silicon layer. A specific example of fabricating a bottom gate thin film transistor (TFT) is also provided where adjoining layers of source metal, ITO, and channel silicon are etched in the same dry etch step.

Abstract: A method has been provided for etching adjoining layers of indium tin oxide (ITO) and silicon in a single, continuous dry etching process. A conventional dry etching gas, such as H1, is used to etch ITO using RF or plasma energy. When the silicon layer underlying the ITO layer is reached, oxygen or nitrogen is added to etching gas to improve the selectivity of ITO to silicon. In some aspects of the invention an etch-stop layer is formed in the silicon layer. A specific example of fabricating a bottom gate thin film transistor (TFT) is also provided where adjoining layers of source metal, ITO, and channel silicon are etched in the same dry etch step.