Patents by Inventor Ganesan Thiagarajan
Ganesan Thiagarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180293998Abstract: In described examples, a method for detecting voice activity includes: receiving a first input signal containing noise; sampling the first input signal to form noise samples; determining a first value corresponding to the noise samples; subsequently receiving a second input signal; sampling the second input signal to form second signal samples; determining a second value corresponding to the second signal samples; forming a ratio of the second value to the first value; comparing the ratio to a predetermined threshold value; and responsive to the comparing, indicating whether voice activity is detected in the second input signal.Type: ApplicationFiled: April 11, 2017Publication date: October 11, 2018Inventors: Ganesan Thiagarajan, Tarkesh Pande, David Patrick Magee
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Patent number: 10038586Abstract: According to an aspect of the present disclosure, a method in a digital communication system comprising, receiving a first data packet comprising a set of preamble bits for transmission, selecting a first modulation parameter in relation with a first bit sequence property of the first data packet, modulating a carrier signal with the first modulation parameter to generate a first baseband signal embedding information in the data packet, receiving a second baseband signal at a receiver, performing correlation of the second baseband signal and a reference baseband signal to generate a correlation result and demodulating the second baseband signal to form a received bits when the correlation result peaks above a threshold value.Type: GrantFiled: February 25, 2017Date of Patent: July 31, 2018Inventors: Ganesan Thiagarajan, Saravanakumar Ganeshan
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Publication number: 20180152334Abstract: According to an aspect of the present disclosure, a method in a digital communication system comprising, receiving a first data packet comprising a set of preamble bits for transmission, selecting a first modulation parameter in relation with a first bit sequence property of the first data packet, modulating a carrier signal with the first modulation parameter to generate a first baseband signal embedding information in the data packet, receiving a second baseband signal at a receiver, performing correlation of the second baseband signal and a reference baseband signal to generate a correlation result and demodulating the second baseband signal to form a received bits when the correlation result peaks above a threshold value.Type: ApplicationFiled: February 25, 2017Publication date: May 31, 2018Applicant: MMRFIC Technology Pvt. Ltd.Inventors: Ganesan Thiagarajan, Saravanakumar Ganeshan
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Publication number: 20180149757Abstract: According to present disclosure, a navigational device comprises a radio frequency (RF) receiver section providing a digital baseband signal streams carrying information bands from plurality of satellite systems and a processor determining position information from the digital baseband signal stream, in that, the processor sends control bits to the RF receiver to include information from at least one information band from at least one satellite systems in the digital baseband signal streams. Further, the RF receiver section comprises the first mixer and a second mixer to convert plurality of RF signals received from the plurality of satellite systems into the digital baseband signal stream and the control bits selects a first reference signal and a second reference signal for mixing at the first mixer and the second mixer to include the information from first satellite system and a second satellite system in the digital baseband signal streams.Type: ApplicationFiled: February 8, 2017Publication date: May 31, 2018Inventors: Ganesan Thiagarajan, Saravanakumar Ganeshan
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Patent number: 9778327Abstract: Methods and apparatus for magnetic sensors and integrated calibration. In an example arrangement, a system includes a magnetic sensor configured to output a signal corresponding to magnetic fields; a calibration trace disposed proximal to the magnetic sensor; a controlled current source coupled to the calibration trace and configured to output a current resulting in a magnetic field output from the calibration trace; and a comparator coupled to the output signal from the magnetic sensor and to an expected signal. In the example arrangement, the comparator outputs a signal indicating whether the output signal from the magnetic sensor corresponds to the expected signal. Methods are also disclosed.Type: GrantFiled: September 9, 2015Date of Patent: October 3, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ganesan Thiagarajan, Arup Polley, Terry Lee Sculley
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Publication number: 20170067980Abstract: Methods and apparatus for magnetic sensors and integrated calibration. In an example arrangement, a system includes a magnetic sensor configured to output a signal corresponding to magnetic fields; a calibration trace disposed proximal to the magnetic sensor; a controlled current source coupled to the calibration trace and configured to output a current resulting in a magnetic field output from the calibration trace; and a comparator coupled to the output signal from the magnetic sensor and to an expected signal. In the example arrangement, the comparator outputs a signal indicating whether the output signal from the magnetic sensor corresponds to the expected signal. Methods are also disclosed.Type: ApplicationFiled: September 9, 2015Publication date: March 9, 2017Inventors: Ganesan Thiagarajan, Arup Polley, Terry Lee Sculley
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Patent number: 9281832Abstract: A bandwidth estimator circuit for an analog to digital converter. The bandwidth estimator computes a bandwidth estimate of an analog signal and includes: an amplitude averaging block configured to determine an average change in amplitude of N samples, a delta time block configured to determine a minimum time difference; a peak voltage block configured to determine the maximum magnitude; a peak to root mean square block configured to determine a ratio of a peak voltage to the root mean square of the magnitude; a bandwidth estimator block configured to compute a product of a ratio of the average change in amplitude to the minimum time difference, multiplied by a ratio of the peak voltage to the root mean square, squared, to the peak voltage multiplied by a constant; and a parameter adjustment circuit configured to modify sampler parameters controlling an analog signal sampling rate. Methods are described.Type: GrantFiled: December 31, 2014Date of Patent: March 8, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Ganesan Thiagarajan
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Patent number: 9184761Abstract: A method, comprising: selecting three Two-Tuples before and three after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time difference between the asynchronous samples surrounding the selected sample, and the five linear slopes of the line segments between the three points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.Type: GrantFiled: February 28, 2014Date of Patent: November 10, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Abhijit A. Patki, Ganesan Thiagarajan, Udayan Dasgupta
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Patent number: 9100035Abstract: A snapout calculator, and wherein the snapout calculator determines where the reference levels for the various comparators shall be placed after each asynchronous sample is generated.Type: GrantFiled: February 28, 2014Date of Patent: August 4, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Udayan Dasgupta, Abhijit A. Patki, Ganesan Thiagarajan, Janakiraman S, Madhulatha Bonu, Venugopal Gopinathan
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Patent number: 9077360Abstract: An apparatus, comprising: an analog to digital converter including: a clipping detector; and a post-processor, wherein the post processor generates synchronous values of clipped data based on non-clipped values of non-clipped data.Type: GrantFiled: February 28, 2014Date of Patent: July 7, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Udayan Dasgupta, Ganesan Thiagarajan, Venugopal Gopinathan
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Patent number: 9077359Abstract: A method, comprising: selecting two Two-Tuples before and two after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time differences between each of the asynchronous samples surrounding the selected sample, and the three linear slopes of the line segments between the two points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.Type: GrantFiled: February 28, 2014Date of Patent: July 7, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ganesan Thiagarajan, Udayan Dasgupta, Abhijit A. Patki
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Publication number: 20150138995Abstract: According to an aspect of the present disclosure, a baseband signal and a pilot signal are combined for a transmission. The combined signal is then translated to higher frequency band by mixing a local oscillator signal and the combined signal. On the receiver, the pilot signal is used to remove the phase noise in the baseband signal, as both baseband signal and the pilot signal are affected/modified by substantially the same phase noise. In one embodiment, the pilot signal may be selected either centered outside the bandwidth of the base band signal or centered inside the bandwidth of the base band signal with enough guard band around it so that it can be filtered out using filters. The pilot signal is used in a similar fashion to eliminate the effect of the phase noise introduced by the local oscillator present in the tester in testing the receiver device.Type: ApplicationFiled: November 18, 2013Publication date: May 21, 2015Applicant: Texas Instruments IncorporatedInventors: Shankar Ram NarayanaMoorthy, Ganesan Thiagarajan, Subhashish Mukherjee
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Patent number: 8988266Abstract: A method, comprising: receiving an analog input; determining an upper outer rail and a lower outer rail as polling values to be used by voltage comparators; blanking at least three comparators; determining which two of the at least three comparators are closest to the input analog voltage levels; defining the two comparators which are closest to the analog input signal to be the next comparators of the next sampling process; assigning a remaining comparator at a voltage level in between the new top and bottom voltage levels; enabling the outer rails, but blanking the inner rail; progressively narrowing down the voltage range spanned by the two outer comparators; and generating a 2-tuple value of an asynchronous voltage comparator crossing.Type: GrantFiled: February 28, 2014Date of Patent: March 24, 2015Assignee: Texas Instruments IncorporatedInventors: Janakiraman S, Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
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Patent number: 8981984Abstract: A method, comprising: receiving a plurality of 2-tuples of asynchronously sampled inputs at an asynchronous to synchronous reconstructor; performing a coarse asynchronous to synchronous conversion using the plurality of 2-tuples to generate a plurality of low precision synchronous outputs; generating a high precision synchronous output, z0, using a plurality of asynchronous 2-tuples, low precision synchronous outputs after it, and its own high precision outputs from previous steps; calculating c0 and c?1 by summing future low precision outputs and the past high precision outputs after they are weighted with the appropriate windowed sinc. values and then subtracted from appropriate asynchronous samples; calculating, the four quantities “s?11”, “s01”, “s00” and “s?10” based on particular values of the windowed sinc. function; and using c0, c?1, s?11, s01, s00 and s?10, the high precision synchronous output of interest, z0 is generated.Type: GrantFiled: February 28, 2014Date of Patent: March 17, 2015Assignee: Texas Instruments IncorporatedInventors: Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki
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Patent number: 8830106Abstract: A method is provided. An analog signal is received. The analog input signal is compared to first and second reference signals to generate a first comparison result, and the first comparison result and a first time stamp corresponding to the first comparison result are registered. A first portion of a digital signal is generated from the first comparison result. At least one of the first and second reference signals is adjusted. A second comparison result is generated if the analog signal reaches an adjusted one of the first and second reference signals within a predetermined interval, and a second portion of the digital signal is generated from the second comparison result.Type: GrantFiled: August 30, 2012Date of Patent: September 9, 2014Assignee: Texas Instruments IncorporatedInventors: Udayan Dasgupta, Ganesan Thiagarajan, Venugopal Gopinathan
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Publication number: 20140247171Abstract: A method, comprising: receiving an analog input; determining an upper outer rail and a lower outer rail as polling values to be used by voltage comparators; blanking at least three comparators; determining which two of the at least three comparators are closest to the input analog voltage levels; defining the two comparators which are closest to the analog input signal to be the next comparators of the next sampling process; assigning a remaining comparator at a voltage level in between the new top and bottom voltage levels; enabling the outer rails, but blanking the inner rail; progressively narrowing down the voltage range spanned by the two outer comparators; and generating a 2-tuple value of an asynchronous voltage comparator crossing.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Inventors: Janakiraman S., Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
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Publication number: 20140247172Abstract: A snapout calculator, and wherein the snapout calculator determines where the reference levels for the various comparators shall be placed after each asynchronous sample is generated.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Inventors: Udayan Dasgupta, Abhijit A. Patki, Ganesan Thiagarajan
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Publication number: 20140247176Abstract: An apparatus, comprising: an analog to digital converter including: a clipping detector; and a post-processor, wherein the post processor generates synchronous values of clipped data based on non-clipped values of non-clipped data.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Inventors: Janakiraman S, Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
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Publication number: 20140247175Abstract: A method, comprising: receiving a plurality of 2-tuples of asynchronously sampled inputs at an asynchronous to synchronous reconstructor; performing a coarse asynchronous to synchronous conversion using the plurality of 2-tuples to generate a plurality of low precision synchronous outputs; generating a high precision synchronous output, z0, using a plurality of asynchronous 2-tuples, low precision synchronous outputs after it, and its own high precision outputs from previous steps; calculating c0 and c?1 by summing future low precision outputs and the past high precision outputs after they are weighted with the appropriate windowed sinc. values and then subtracted from appropriate asynchronous samples; calculating, the four quantities “s?11”, “s01”, “s00” and “s?10” based on particular values of the windowed sinc. function; and using c0, c?1, s?11, s01, s00 and s?10, the high precision synchronous output of interest, z0 is generated.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Udayan Dasgupta, Janakiraman S, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
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Publication number: 20140247174Abstract: A method, comprising: selecting two Two-Tuples before and two after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time differences between each of the asynchronous samples surrounding the selected sample, and the three linear slopes of the line segments between the two points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Inventors: Ganesan Thiagarajan, Udayan Dasgupta, Venugopal Gopinathan