Abstract: A configuration space enable/disable mechanism for transferring configuration data to and from peripheral components coupled to one or more peripheral component buses. Bridge circuits implement four configuration modes: a NORMAL mode, a BLOCK mode, a CONFIG mode, and a PASS mode. The configuration mode of each bridge circuit is controlled by writing to a configuration space enable (CSE) register. The BLOCK mode blocks predetermined types of accesses in order to allow configuration access through a peer bridge circuit. The CONFIG mode maps preselected types of accesses into configuration space accesses. The PASS mode passes the preselected types of accesses to the secondary bus to allow configuration space access through a bridge circuit in one of the lower levels of the hierarchy.

Abstract: A method and apparatus for reducing cost and complexity of devices in a bus bridge circuit by dividing address and data paths between separate devices to reduce pin count, and by looping back "bridged" configuration data to access configuration registers. The host bridge circuit "bridges" all I/O accesses received over a host bus directly to a peripheral component bus without any decoding. The CDC is both initiator and target on the peripheral component bus for I/O access cycles generated by the host bridge circuit that are targeted for a host bridge configuration register.

Abstract: A standard interface between a system motherboard and a control card that can operate different types of screens, including LCD and VGA monitors. The interface has a plurality of pins each designated to a particular signal or power line. The signals and power provided by the interface allow the design of a control card that can drive any type of monitor or LCD screen.