Abstract: Techniques for physically implementing fiber ring networks which achieve full mesh connectivity, such networks including a 2-fiber WDM ring network composed of a clockwise ring and counter clockwise ring, and a 4-fiber WDM Self-Healing Ring network. The number of wavelengths required is derived for both odd and even number of nodes on the ring. To physically set-up all required connections in the network, optimal wavelength assignment algorithms are devised so that the wavelength assignment between nodes on the ring is systematic and engenders full mesh connectivity while avoiding any possible violation of the color clash constraint. An illustrative algorithm uses a simple matrix approach for calculating the interconnection arrangement.

Abstract: The present invention is directed to a system for the wavelength division multiplexing/asynchronous transfer mode (WDM/ATM) operation of high-capacity optical communication networks. The optical components of the network can transport vast amounts of information, while the ATM-based electronics provides data processing, and information distribution. The capacity of the communications network to reconfigure and rearrange itself is maximized through wavelength translation of its data signals using a limited set of fixed-wavelength channels. The system incorporates an optical fiber communication network ring, or several optical fiber communication network rings that are connected to each other, through which data signals are transmitted and received. Optical WDM cross-connecting switch devices 4a-4e connect adjacent optical fiber rings 3a, 3b to each other, and control the routing of the data signals into and out of the optical fiber rings 3a, 3b.

Abstract: In a multiwavelength lightwave communications system automatic self-power regulation on a channel-by-channel basis is achieved with a cascade of multiwavelength amplifier modules (200), wherein each multiwavelength amplifier module in the cascade includes a plurality of pump-shared parallel fiber amplifiers (208) operated in gain-saturation and connected between an optical demultiplexer (203) and multiplexer (209). An optional first gain stage (202) improves performance with higher optical signal-to-noise ratio. By self-regulating the power in each channel, the communications system is scalable, allowing the system to grow without deleterious effects due to power spread.

Abstract: Our invention is a differential transimpedance amplifier circuit with shunt-shunt local feedback gain stages. These shunt-shunt feedback gain stages comprise an additional resistor and two transistors in a shunt-shunt feedback configuration to provide a low output impedance while maintaining the transimpedance gain. Cascading circuits of this structure results in a high bandwidth receiver with sufficient gain to drive conventional data regeneration circuits.

Abstract: A switched multi-channel optical receiver having N metal-semiconductor-metal photo-detectors receiving different optical signals, N switches selectively applying a bias voltage to one of the photo-detectors, and a single amplifier. All the elements are integrated in an InP opto-electronic integrated circuit. The switching to a single amplifier allows a reduced number of components.

Abstract: A wideband transimpedance amplifier utilizing a differential amplifier circuit structure whereby the differential pair is bridged by a signal detector which, as an example, would be a photodetector when the transimpedance amplifier is employed within a optical receiver. In order to bias the signal detector the differential pair is operated asymmetric with respect to the DC voltage but the circuit maintains a symmetric AC response to the signal detector current input. The circuit is designed to operate at the unity gain frequency. The signal detector is placed between the source (or emitter) electrodes of the transistors which helps to reduces the impact of gate (or base) capacitance on circuit response speed. These factors combined maximize the bandwidth capabilities of circuit. The circuit is responsive to a current input to produce two voltage outputs equal in magnitude but opposite in phase.

Abstract: A solid-state relay is combined with a control circuit to form a switch which is bilateral and linear through the origin, can withstand large current or voltage surges, and can be toggled either electrically or optically. The relay portion comprises either a pair of or two subsets of DMOS transistors, and the pair of transistors or selected ones of each subset cooperate to form a pair of oppositely poled thyristors. The control circuit provides well regulated turn-on and turn-off of the relay and provides good immunity against high voltage transients on the switch's main terminals. The control circuit also serves to limit the maximum voltage that is applied to the gate oxides of the transistors.

Abstract: High-speed p-i-n and avalanche photodetectors (photodiodes) use a heavily doped buried layer to greatly limit minority carriers generated by incident light in the buried layers and the substrates of the devices from reaching the cathodes and thus enhances response time while substantially decreasing dark current. A p-i-n diode of this type with a 1.1 square millimeter active area can operate with 4 volt reverse bias and is capable of having edge rise and fall times in the 4 nanosecond range.

Abstract: A semiconductor structure contains two interconnected gated diode switches in a common dielectrically isolated semiconductor tub. This structure functions as a bidirectional switch. A gate region physically located between the two switches provides electrical isolation to allow proper operation.

Abstract: An optically toggled bidirectional normally-on switch is provided with protection against bilateral voltage and bidirectional current surges by the inclusion of a pair of oppositely poled thyristors. One version uses a large junction-type field-effect transistor in its main path and a pair of smaller junction-type transistors in the subsidiary path. A photodiode array controls the gate voltage on each of the transistors and turns them off when illuminated. A control node in the subsidiary path is connected to the gates of the SCRs so that excess current in this path turns on the appropriately-poled thyristor to provide an additional shunt path for the current.