Abstract: The semiconductor device comprises a bipolar transistor with emitter, base and collector, a current or voltage source electrically connected with the emitter, and a quenching component electrically connected with the collector, the bipolar transistor being configured for operation at a collector-to-base voltage above the breakdown voltage.

Abstract: A avalanche diode arrangement comprises an avalanche diode (11) that is coupled to a first voltage terminal (14) and to a first node (15), a latch comparator (12) with a first input (16) coupled to the first node (15), a second input (17) for receiving a reference voltage (VREF) and an enable input (21) for receiving a comparator enable signal (CLK), and a quenching circuit (13) coupled to the first node (15).

Abstract: A single photon avalanche diode, SPAD, comprises an active area which is arranged to generate a photon triggered avalanche current. A cover is arranged on or above the active area. The cover shields the active area from incident photons. The cover comprises a stack of at least the first and a second metal layer. At least one of the metal layers, e.g. the first metal layer, comprises an aperture. The metal layers are arranged in the stack with respect to an optical axis such as to open an effective aperture along the optical axis. By way of the effective aperture a portion of the active area is exposed to incident photons being incident along the optical axis. The effective aperture is smaller than the aperture arranged in the first metal layer.

Abstract: The SPAD device comprises a single-photon avalanche diode and a further single-photon avalanche diode having breakdown voltages, the single-photon avalanche diodes being integrated in the same device. The breakdown voltages are equal or differ by less than 10%. The single-photon avalanche diode is configured to enable to induce triggering or to have a dark count rate that is higher than the dark count rate of the further single-photon avalanche diode.

Abstract: The device comprises a bipolar transistor with emitter, base, collector, base-collector junction and base-emitter junction, a collector-to-base breakdown voltage, a quenching component electrically connected with the base or the collector, and a switching circuitry configured to apply a forward bias to the base-emitter junction. The bipolar transistor is configured for operation at a reverse collector-to-base voltage above the breakdown voltage.

Abstract: A well of a first type of conductivity is formed in a semiconductor substrate, and wells of a second type of conductivity are formed in the well of the first type of conductivity at a distance from one another. By an implantation of dopants, a doped region of the second type of conductivity is formed in the well of the first type of conductivity between the wells of the second type of conductivity and at a distance from the wells of the second type of conductivity. Source/drain contacts are applied to the wells of the second type of conductivity, and a gate dielectric and a gate electrode are arranged above regions of the well of the first type of conductivity that are located between the wells of the second type of conductivity and the doped region of the second type of conductivity.

Abstract: An optical sensor arrangement for time-of-flight comprises a first and a second cavity separated by an optical barrier and covered by a cover arrangement. An optical emitter is arranged in the first cavity, a measurement and a reference photodetector are arranged in the second cavity. The cover arrangement comprises a plate and layers of material arranged on an inner main surface thereof. The layers comprise an opaque coating with a first and second aperture above the first cavity, and with a third and fourth aperture above the second cavity. The measurement photodetector is configured to detect light entering the second cavity through the fourth aperture. The second and the third aperture establish a reference path for light from the emitter to the reference photodetector.

Abstract: The field effect transistor device comprises a substrate (1) of semiconductor material, a body well of a first type of electric conductivity in the substrate, a source region in the body well, the source region having an opposite second type of electric conductivity, a source contact (3) on the source region, a body contact region of the first type of electric conductivity in the body well, a body contact (5) on the body contact region, and a gate electrode layer (2) partially overlapping the body well. A portion (2*) of the gate electrode layer (2) is present between the source contact (3) and the body contact (5).

Abstract: A Hall sensor has at least four sensor terminals for connecting the Hall sensor and a plurality of Hall sensing element shaving element terminals. The Hall sensing elements are interconnected with the element terminals in a connection grid in between the sensor terminals, the connection having more than one dimension. The Hall sensing elements are physically arranged in an arrangement grid having more than one dimension and being different from the connection grid. At least some of the Hall sensing elements are connected to at least two adjacent Hall sensing elements in the connection grid.

Abstract: A bolometer (10) comprises a first and a second suspension beam (12, 13) and a semiconductor portion (11) that is suspended by the first and the second suspension beam (12, 13) and comprises a first region (17) of a first conductivity type and a second region (18) of a second conductivity type. The first region (17) comprises a first triangle (21) or at least two stripes (40, 41) or islands (60, 61) which each contribute to a non-short-circuited diode (20) with the second region (18).

Abstract: A Hall sensor (HS) comprises at least four sensor terminals (EXT_A, EXT_B, EXT_C, EXT_D) for connecting the Hall sensor (HS) in at least two Hall sensing elements (11, 12, . . . , 44) connected together, element terminals (A, B, C, D) of the Hall sensing elements (11, 12, . . . , 44) are connected in between the sensor terminals (EXT_A, EXT_B, EXT_C, EXT_D). Each of the Hall sensing elements (11, 12, . . . , 44) is configured to provide an individual sensor value between two of its element terminals (A, B, C, D). The at least two Hall sensing elements (11, 12, . . . , 44) are distributed basically equally into two halves (B1, B2) and are connected such that a difference value is electrically formed between two of the sensor terminals (EXT_A, EXT_B, EXT_C, EXT_D) resulting from the respective individual sensor values.

Abstract: The field effect transistor device comprises a substrate (1) of semiconductor material, a body well of a first type of electric conductivity in the substrate, a source region in the body well, the source region having an opposite second type of electric conductivity, a source contact (3) on the source region, a body contact region of the first type of electric conductivity in the body well, a body contact (5) on the body contact region, and a gate electrode layer (2) partially overlapping the body well. A portion (2*) of the gate electrode layer (2) is present between the source contact (3) and the body contact (5).

Abstract: A method for manufacturing a semiconductor element comprising a single photon avalanche diode having a multiplication zone (AR) a guard ring structure with a second type of electrical conductivity comprises providing a semiconductor wafer with a first region (R) comprising a semiconductor material with the first type of conductivity. The method further comprises generating by a first doping process a first well (W1) of the guard ring structure having a first vertical depth, the first well (W1) laterally surrounding the multiplication zone (AR) and having a lateral distance (A) from the multiplication zone (AR). The method further comprises generating by a second doping process a second well (W2) of the guard ring structure having a second vertical depth, the second well (W2) laterally surrounding and adjoining a part of the first region for laterally defining the multiplication zone (AR).

Abstract: An isolation area (10) is provided over a drift region (12) with a spacing (d) to a contact area (4) provided for a drain connection (D). The isolation area is used as an implantation mask, in order to produce a dopant profile of the drift region in which the dopant concentration increases toward the drain. The implantation of the dopant can be performed instead before the production of the isolation area, and the later production of the isolation area (10) changes the dopant profile also in a way that the dopant concentration increases toward the drain.

Abstract: A well of a first type of conductivity is formed in a semiconductor substrate, and wells of a second type of conductivity are formed in the well of the first type of conductivity at a distance from one another. By an implantation of dopants, a doped region of the second type of conductivity is formed in the well of the first type of conductivity between the wells of the second type of conductivity and at a distance from the wells of the second type of conductivity. Source/drain contacts are applied to the wells of the second type of conductivity, and a gate dielectric and a gate electrode are arranged above regions of the well of the first type of conductivity that are located between the wells of the second type of conductivity and the doped region of the second type of conductivity.

Abstract: A method for manufacturing a semiconductor element comprising a single photon avalanche diode having a multiplication zone (AR) a guard ring structure with a second type of electrical conductivity comprises providing a semiconductor wafer with a first region (R) comprising a semiconductor material with the first type of conductivity. The method further comprises generating by a first doping process a first well (W1) of the guard ring structure having a first vertical depth, the first well (W1) laterally surrounding the multiplication zone (AR) and having a lateral distance (A) from the multiplication zone (AR). The method further comprises generating by a second doping process a second well (W2) of the guard ring structure having a second vertical depth, the second well (W2) laterally surrounding and adjoining a part of the first region for laterally defining the multiplication zone (AR).

Abstract: A magnetic field sensor system has a plurality of magnetic field sensor elements, which each are configured to provide an individual sensor value, and of which a first portion is arranged in a first contiguous area and a second portion is arranged in a second contiguous area, and a coil wire arrangement with a first coil portion and at least a second coil portion being connected to the first coil portion, wherein the first coil portion is arranged close to the sensor elements of the first area and the second coil portion is arranged close to the sensor elements of the second area such that, if a predetermined current is applied to the coil wire arrangement, a first magnetic field component is generated at the first area and a second magnetic field component is generated at the second area being opposite to the first magnetic field component.

Abstract: A bolometer (10) comprises a first and a second suspension beam (12, 13) and a semiconductor portion (11) that is suspended by the first and the second suspension beam (12, 13) and comprises a first region (17) of a first conductivity type and a second region (18) of a second conductivity type. The first region (17) comprises a first triangle (21) or at least two stripes (40, 41) or islands (60, 61) which each contribute to a non-short-circuited diode (20) with the second region (18).

Abstract: A Hall sensor comprises at least three Hall sensor elements (1, 2, . . . , 94) that respectively comprise at least three element terminals (A, B, C, D, E, F, G, H) and are interconnected in a circuit grid with a structure that is more than one-dimensional, as well as at least three sensor terminals (EXT_A, EXT_B, EXT_C, EXT_D) for contacting the Hall sensor. In this case, each sensor terminal (EXT_A, EXT_B, EXT_C, EXT_D) is connected to at least one of the Hall sensor elements (1, 2, . . . , 94) at one of its element terminals (A, B, C, D, E, F, G, H).

Abstract: According to a method for operating a Hall sensor assembly, at least two values (I1, I2) of an input signal (I) of a Hall sensor (11) of the Hall sensor assembly (10) having different magnitudes are set and the associated values (V1, V2) of an output signal (V) of the Hall sensor (11) are determined. Furthermore, a residual offset value (k, VOFF) of the output signal (V) is determined according to the values (V1, V2) of the output signal (V) that were determined at the at least two values (I1, I2) of the input signal (I).