Patents by Inventor George Beshara Bendak

George Beshara Bendak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6873605
    Abstract: A system and method is provided which describe a self-healing bidirectional lines switch ring (BLSR) communication node. Two interconnected relay elements, having default and duplex input and output ports, enable bidirectional communications through a node. In the event of a ring failure, the relays can be enabled to return communications to a source node so that the ring remains unbroken.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: March 29, 2005
    Assignee: Applied Micro Circuits Corporation
    Inventors: George Beshara Bendak, Alan Michael Sorgi
  • Patent number: 6847657
    Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention permits the number of frames, with recognizable frame synchronization bytes (FSBs), required for synchronization to be made programmable, so that the system and method are flexible for changes in communication protocols. This flexibility also impacts the number, value, location, bandwidth, and the bit error rate (BER) of the located FSBs.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: January 25, 2005
    Assignee: Applied Micro Circuits Corporation
    Inventors: George Beshara Bendak, Alan Michael Sorgi
  • Patent number: 6836485
    Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention programs the number of frames, with non-recognizable frame synchronization bytes (FSBs), required for the communication link to fall out of synchronization, so that the system and method are flexible for changes in communication protocols. This flexibility also impacts the number, value, location, bandwidth, and the bit error rate (BER) of the located FSBs.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: December 28, 2004
    Assignee: Applied Micro Circuits Corporation
    Inventors: George Beshara Bendak, Alan Michael Sorgi
  • Patent number: 6715113
    Abstract: A system and method are provided for using an analysis of forward error corrections (FEC) in a digital communications signal as feedback information to improve the performance of an analog receiver system. The FEC decoder supplies the number of “1” bit and “0” bit corrections made to a control unit. In response to the FEC corrections, the control unit changes receiver control parameters. The control signal modifies processing in the receiver front end to achieve the fewest number of FEC corrections.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: March 30, 2004
    Assignee: Applied Micro Circuits Corporation
    Inventors: George Beshara Bendak, Alan Michael Sorgi, Daniel M. Castagnozzi
  • Patent number: 6684351
    Abstract: A system and method is provided for in situ testing of communications links employing digitally wrapped communications. Portions of the payload to be wrapped are replaced with test patterns. These test patterns can be sent simultaneously with real information. The invention provides that the receiving node generate a test pattern, extract the transmitted test pattern, and determine errors in response to comparing the two test patterns. Analysis of the errors can be used to determine the state of the link between the transmitting and receiving nodes.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: January 27, 2004
    Assignee: Applied Micro Circuits Corporation
    Inventors: George Beshara Bendak, Alan Michael Sorgi