Patents by Inventor Geraint North
Geraint North has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10649853Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: August 21, 2018Date of Patent: May 12, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams
-
Patent number: 10613940Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: November 7, 2017Date of Patent: April 7, 2020Assignee: International Business Machines CorporationInventors: Guy Lynn Gutherie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams
-
Patent number: 10397122Abstract: A technique for managing a data network includes monitoring data transfer rates and data transfer thresholds for data transferred between storage and an application. Feedback on the suitability of the data transfer rate is collected from the application. A data transfer threshold for the application is changed based on the monitored data transfer rate and the collected feedback.Type: GrantFiled: October 15, 2014Date of Patent: August 27, 2019Assignee: International Business Machines CorporationInventors: Matthew J. Jarvis, Geraint North
-
Patent number: 10346255Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: August 22, 2018Date of Patent: July 9, 2019Assignee: International Business Machines CorporationInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams
-
Patent number: 10339009Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: August 22, 2018Date of Patent: July 2, 2019Assignee: International Business Machines CorporationInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams
-
Patent number: 10225197Abstract: A technique for managing a data network includes monitoring data transfer rates and data transfer thresholds for data transferred between storage and an application. Feedback on the suitability of the data transfer rate is collected from the application. A data transfer threshold for the application is changed based on the monitored data transfer rate and the collected feedback.Type: GrantFiled: June 9, 2015Date of Patent: March 5, 2019Assignee: International Business Machines CorporationInventors: Matthew J. Jarvis, Geraint North
-
Publication number: 20190004902Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: ApplicationFiled: August 21, 2018Publication date: January 3, 2019Inventors: GUY LYNN GUTHRIE, NARESH NAYAR, GERAINT NORTH, HUGH SHEN, WILLIAM STARKE, PHILLIP WILLIAMS
-
Publication number: 20180357131Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: ApplicationFiled: August 22, 2018Publication date: December 13, 2018Inventors: GUY LYNN GUTHRIE, NARESH NAYAR, GERAINT NORTH, HUGH SHEN, WILLIAM STARKE, PHILLIP WILLIAMS
-
Publication number: 20180357129Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: ApplicationFiled: August 22, 2018Publication date: December 13, 2018Inventors: GUY LYNN GUTHRIE, NARESH NAYAR, GERAINT NORTH, HUGH SHEN, WILLIAM STARKE, PHILLIP WILLIAMS
-
Patent number: 10152385Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: July 3, 2014Date of Patent: December 11, 2018Assignee: International Business Machines CorporationInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams
-
Patent number: 10133641Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: November 7, 2017Date of Patent: November 20, 2018Assignee: International Business Machines CorporationInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams
-
Patent number: 10108498Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: February 19, 2016Date of Patent: October 23, 2018Assignee: International Business Machines CorporationInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams
-
Patent number: 10084663Abstract: Method to display the status of tags applied to objects in a cloud computing environment, by comparing an attribute of an object to a criterion of a tag applied to the object, wherein the object is part of the cloud computing environment, and outputting for display a graphical representation of the tag, wherein the graphical representation comprises a text of the tag and an indication of a result of the comparison.Type: GrantFiled: September 26, 2014Date of Patent: September 25, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Randal L. Bertram, Gregory R. Hintermeister, Geraint North, Paul B. Tippett
-
Patent number: 9996378Abstract: A technique for failure monitoring and recovery of a first application executing on a first virtual machine includes storing machine state information during execution of the first virtual machine at predetermined checkpoints. An error message that includes an application error state at a failure point of the first application is received, by a hypervisor, from the first application. The first virtual machine is stopped in response to the error message. The hypervisor creates a second virtual machine and a second application from the stored machine state information that are copies of the first virtual machine and the first application. The second virtual machine and the second application are configured to execute from a checkpoint preceding the failure point. In response to receipt of a failure interrupt by the second application, one or more recovery processes are initiated in an attempt to avert the failure point.Type: GrantFiled: September 29, 2015Date of Patent: June 12, 2018Assignee: International Business Machines CorporationInventor: Geraint North
-
Patent number: 9984086Abstract: Systems, methods, and computer program products to tag objects in a cloud computing environment, by tagging an object with a first tag, of a plurality of tags, wherein each of the plurality of tags specifies a respective criterion for objects tagged by each tag, and upon determining that the object not satisfy the criterion of the first tag, performing an action associated with the first tag to modify the object to meet the criterion of the first tag.Type: GrantFiled: August 5, 2014Date of Patent: May 29, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Randal L. Bertram, Gregory R. Hintermeister, Geraint North, Paul B. Tippett
-
Patent number: 9984087Abstract: Methods to tag objects in a cloud computing environment, by tagging an object with a first tag, of a plurality of tags, wherein each of the plurality of tags specifies a respective criterion for objects tagged by each tag, and upon determining that the object not satisfy the criterion of the first tag, performing an action associated with the first tag to modify the object to meet the criterion of the first tag.Type: GrantFiled: September 26, 2014Date of Patent: May 29, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Randal L. Bertram, Gregory R. Hintermeister, Geraint North, Paul B. Tippett
-
Publication number: 20180074911Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: ApplicationFiled: November 7, 2017Publication date: March 15, 2018Inventors: GUY LYNN GUTHRIE, NARESH NAYAR, GERAINT NORTH, HUGH SHEN, WILLIAM STARKE, PHILLIP WILLIAMS
-
Publication number: 20180067816Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: ApplicationFiled: November 7, 2017Publication date: March 8, 2018Inventors: GUY LYNN GUTHRIE, NARESH NAYAR, GERAINT NORTH, HUGH SHEN, WILLIAM STARKE, PHILLIP WILLIAMS
-
Patent number: 9886350Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: February 19, 2016Date of Patent: February 6, 2018Assignee: International Business Machines CorporationInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams
-
Patent number: 9880905Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.Type: GrantFiled: July 2, 2014Date of Patent: January 30, 2018Assignee: International Business Machines CorporationInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William Starke, Phillip Williams