Patents by Inventor Geraint North

Geraint North has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120296877
    Abstract: Fine-grained detection of data modification of original data is provided by associating separate guard bits with granules of memory storing original data from which translated data has been obtained. The guard bits indicating whether the original data stored in the associated granule is protected for data coherency. The guard bits are set and cleared by special-purpose instructions. Responsive to attempting access to translated data obtained from the original data, the guard bit(s) associated with the original data is checked to determine whether the guard bit(s) fail to indicate coherency of the original data, and if so, discarding of the translated data is initiated to facilitate maintaining data coherency between the original data and the translated data.
    Type: Application
    Filed: May 17, 2011
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Guy L. GUTHRIE, Geraint NORTH, William J. STARKE, Derek E. WILLIAMS
  • Publication number: 20120271615
    Abstract: A method, system and computer program product is provided for emulating two or more processes for executing a source application, comprising: providing virtual trampoline memory whereby each emulated process has a respective private trampoline memory; providing shared code heap memory, wherein each emulated process only sees the code heap and its respective private trampoline memory; fetching a fragment of source instructions from the application; generating equivalent target instructions for writing to the code heap, the fragment of target instruction being indexed by its physical address in the code heap; generating, for each jump instruction in the fragment, a jump to a slot in the virtual trampoline memory; and writing a trap in each private trampoline slot, each trap adapted to be replaced by a jump to a physical address in the code heap corresponding the start of the same or a different target instruction fragment.
    Type: Application
    Filed: April 5, 2012
    Publication date: October 25, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Geraint North
  • Publication number: 20120266150
    Abstract: This invention relates to a method and framework for invisible code rewriting. A method, system, and computer program for allowing modification of executable program code in a computer platform comprising: providing a virtual address space on the platform, said virtual space comprising a first and second address space; identifying a program into the first address space; identifying an enhancement to the program; copying the program into the second address space; modifying the program copy in the second address space to provide the enhancement; and configuring the platform to execute the program and executing the enhanced program in second address space.
    Type: Application
    Filed: April 5, 2012
    Publication date: October 18, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Geraint North
  • Publication number: 20120191908
    Abstract: Performing storage writes in a mirrored virtual machine system by receiving a state of a primary virtual machine during execution of an application, wherein the primary virtual machine runs on a first physical machine and a secondary virtual machine runs on a second physical machine, wherein the state is captured by checkpointing, and the primary virtual machine is configured to write data to a first block and concurrently write the data to a write buffer on the secondary virtual machine. The method also includes storing a copy of data within a second block to a rollback buffer for the secondary virtual machine, in response to identifying a checkpoint in the application, merging the rollback buffer with the write buffer, in response to detecting a failover, writing a copy of the rollback buffer to the disk storage, and continuing execution on the secondary virtual machine from the last checkpoint.
    Type: Application
    Filed: January 25, 2012
    Publication date: July 26, 2012
    Applicant: International Business Machines Corporation
    Inventors: Geraint North, Adam McNeeney, Bruce G. Mealey, Brian C. Twichell
  • Publication number: 20120117355
    Abstract: A dynamic binary translator apparatus, method and program for translating a first block of binary computer code intended for execution in a subject execution environment having a first memory of one page size into a second block for execution in a second execution environment having a second memory of another page size, comprising a redirection page mapper responsive to a page characteristic of the first memory for mapping an address of the first memory to an address of the second memory; a memory fault behaviour detector operable to detect memory faulting during execution of the second block and to accumulate a fault count to a trigger threshold; and a regeneration component responsive to the fault count reaching the trigger threshold to discard the second block and cause the first block to be retranslated with its memory references remapped by a page table walk.
    Type: Application
    Filed: November 8, 2011
    Publication date: May 10, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Neil A. Campbell, Geraint North, Graham Woodward
  • Patent number: 7934204
    Abstract: A partitioning technique utilized by a translator to divide the subject code space into regions, referred to hereafter as partitions, where each partition contains a distinct set of basic blocks of subject code and corresponding target code. The partitioning technique divides the translator's representation of subject code and subject code translations into non-overlapping regions of subject memory. In this manner, when the subject program modifies subject code, only those partitions actually affected by the self-modifying code need be discarded and all translations in unaffected partitions can be kept. This partitioning technique is advantageous in limiting the amount of target code that must be retranslated in response to self-modifying code operation. In another process, the partitioning technique allows multithreaded subject programs that also involve self-modifying code to perform code modification in a thread-safe manner.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: April 26, 2011
    Assignee: International Business Machines Corporation
    Inventors: Alex Brown, Paul Thomas Knowles, Geraint North
  • Patent number: 7805710
    Abstract: Subject program code is translated to target code in basic block units at run-time in a process wherein translation of basic blocks is interleaved with execution of those translations. A shared code cache mechanism is added to persistently store subject code translations, such that a translator may reuse translations that were generated and/or optimized by earlier translator instances.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventor: Geraint North
  • Patent number: 7793272
    Abstract: In program code conversion, particularly dynamic binary translation, subject code 17 is translated into target code 21 through a translator 19 for execution on a target processor 13. Selected portions of subject code, such as library functions SFuncA 172, are replaced by instead executing a portion of native code such as a native function NFuncA 282. The native function is native to the target processor 13. The method further includes executing a subject code portion such as a subject function SFuncB 173 in place of a native code portion such library function NFuncB 283. This reverse binding technique substitutes subject code for selected portions of the native code, particularly native library functions in order to keep control within the translator 19. This helps to maintain an accurate subject state in the translator 19, amongst other advantages.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Jonathan J. Andrews, Geraint North
  • Publication number: 20090094586
    Abstract: A native binding technique is provided for inserting calls to native functions during translation of subject code to target code, such that function calls in the subject program to subject code functions are replaced in target code with calls to native equivalents of the same functions. Parameters of native function calls are transformed from target code representations to be consistent with native code representations, native code calling conventions, and native function prototypes.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 9, 2009
    Applicant: TRANSITIVE LIMITED
    Inventors: Alex BROWN, Geraint NORTH, Frank Thomas WEIGEL, Gareth Anthony KNIGHT
  • Patent number: 7434209
    Abstract: A native binding technique is provided for inserting calls to native functions during translation of subject code to target code, such that function calls in the subject program to subject code functions are replaced in target code with calls to native equivalents of the same functions. Parameters of native function calls are transformed from target code representations to be consistent with native code representations, native code calling conventions, and native function prototypes.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: October 7, 2008
    Assignee: Transitive Limited
    Inventors: Alex Brown, Geraint North, Frank Thomas Weigel, Gareth Anthony Knight
  • Publication number: 20080177985
    Abstract: An emulator allows subject code written for a subject processor having subject processor registers and condition code flags to run in a non-compatible computing environment. The emulator identifies and records parameters of instructions in the subject code that affect status of the subject condition code flags. Then, when an instruction in the subject code is encountered, such as a branch or jump, that uses the flag status to make a decision, the flag status is resolved from the recorded instruction parameters. Advantageously, emulation overhead is substantially reduced.
    Type: Application
    Filed: December 14, 2007
    Publication date: July 24, 2008
    Applicant: TRANSITIVE LIMITED
    Inventors: John H. SANDHAM, Geraint NORTH
  • Patent number: 7331040
    Abstract: An emulator (30) allows subject code (10) written for a subject processor (12) having subject processor registers (14) and condition code flags (16) to run in a non-compatible computing environment (2). The emulator (30) identifies and records parameters of instructions in the subject code (10) that affect status of the subject condition code flags (16). Then, when an instruction in the subject code (10) is encountered, such as a branch or jump, that uses the flag status to make a decision, the flag status is resolved from the recorded instruction parameters. Advantageously, emulation overhead is substantially reduced.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: February 12, 2008
    Assignee: Transitive Limted
    Inventors: John H. Sandham, Geraint North
  • Publication number: 20070006184
    Abstract: In program code conversion, particularly dynamic binary translation, subject code 17 is translated into target code 21 through a translator 19 for execution on a target processor 13. Selected portions of subject code, such as library functions SFuncA 172, are replaced by instead executing a portion of native code such as a native function NFuncA 282. The native function is native to the target processor 13. The method further includes executing a subject code portion such as a subject function SFuncB 173 in place of a native code portion such library function NFuncB 283. This reverse binding technique substitutes subject code for selected portions of the native code, particularly native library functions in order to keep control within the translator 19. This helps to maintain an accurate subject state in the translator 19, amongst other advantages.
    Type: Application
    Filed: November 14, 2005
    Publication date: January 4, 2007
    Applicant: Transitive Limited
    Inventors: Jonathan Andrews, Geraint North
  • Publication number: 20050015756
    Abstract: A partitioning technique utilized by a translator to divide the subject code space into regions, referred to hereafter as partitions, where each partition contains a distinct set of basic blocks of subject code and corresponding target code. The partitioning technique divides the translator's representation of subject code and subject code translations into non-overlapping regions of subject memory. In this manner, when the subject program modifies subject code, only those partitions actually affected by the self-modifying code need be discarded and all translations in unaffected partitions can be kept. This partitioning technique is advantageous in limiting the amount of target code that must be retranslated in response to self-modifying code operation.
    Type: Application
    Filed: March 17, 2004
    Publication date: January 20, 2005
    Inventors: Alex Brown, Paul Knowles, Geraint North
  • Publication number: 20050015781
    Abstract: A native binding technique is provided for inserting calls to native functions during translation of subject code to target code, such that function calls in the subject program to subject code functions are replaced in target code with calls to native equivalents of the same functions. Parameters of native function calls are transformed from target code representations to be consistent with native code representations, native code calling conventions, and native function prototypes.
    Type: Application
    Filed: December 29, 2003
    Publication date: January 20, 2005
    Inventors: Alex Brown, Geraint North, Frank Weigel, Gareth Knight
  • Publication number: 20050015758
    Abstract: Subject program code is translated to target code in basic block units at run-time in a process wherein translation of basic blocks is interleaved with execution of those translations. A shared code cache mechanism is added to persistently store subject code translations, such that a translator may reuse translations that were generated and/or optimized by earlier translator instances.
    Type: Application
    Filed: March 30, 2004
    Publication date: January 20, 2005
    Inventor: Geraint North
  • Publication number: 20040158822
    Abstract: An emulator (30) allows subject code (10) written for a subject processor (12) having subject processor registers (14) and condition code flags (16) to run in a non-compatible computing environment (2). The emulator (3) identifies and records parameters of instructions in the subject code (10) that affect status of the subject condition code flags (16). Then, when an instruction in the subject code (10) is encountered, such as a branch or jump, that uses the flag status to make a decision, the flag status is resolved from the recorded instruction parameters. Advantageously, emulation overhead is substantially reduced.
    Type: Application
    Filed: February 6, 2003
    Publication date: August 12, 2004
    Inventors: John H. Sandham, Geraint North