Abstract: A system for modeling a circuit breaker assembly and its components. The system comprises a computer generated and interactive system model, the system model comprising hierarchically arranged sub-models, each sub-model representing a different circuit breaker function, a first pin for passing simulated load current to the system model, and a second pin for passing simulated load current from the system model.

Abstract: A method and an apparatus for managing signal-processing resources of a multimedia platform that is designed for applying signal-processing operations to multimedia signals defines multimedia functions each capable of monitoring the operation of a set of multimedia platform signal-processing resources, puts them in contact, adapts the contents of the signal-processing resource set depending on the multimedia signal to be processed, and uses the multimedia functions to apply the signal-processing operations to the multimedia signals.

Abstract: Process for transmitting compressed voice circuits over a packet switching network of the type comprising a plurality of switching nodes (SW-1 to SW-7) interconnected by connection lines and including at least an end switching node (SW-1) connected to a source exchange telephone device (PABX A) and another end switching node (SW-3) connected to a destination exchange telephone device (CX), and comprising the steps of receiving from the source exchange telephone device a sequence of uncompressed frames wherein each frame contains n slots containing each J bytes respectively associated to J voice circuits, compressing the data bits of each voice circuit in order to build a packet containing J compressed voice circuits, and providing this packet to the end switching node for transmission to the destination exchange telephone device.

Abstract: Repetitive packets in a voice/data stream, are detected and suppressed in the transmitting side of a network, after a predefined number of consecutive repetitive packets have been transmitted. Then, at the receiving side of the network, suppressed repetitive packets are reconstituted by filling the resulting gap in the voice/data stream with the repetitive pattern contained in the last received repetitive packet. When the input voice/data stream is compressed, only non-repetitive packets are compressed so that repetitive patterns are not corrupted by compression.

Abstract: A system for coding voice signal to optimize bandwidth occupation in a High Speed Packet Switching network while ensuring best voice transmission quality.The voice signal is first encoded using a conventional GSM like RPE/LTP coder providing first sub-frames of coded signal and tagging these first sub-frames as being non-discardable. In addition, a convenient difference between an RPE/LTP provided signal and a corresponding synthesized image is performed (see 36) and is also block encoded into second sub-frames which second sub-frames are tagged as being discardable sub-frames. Said second sub-frames when concatenated to corresponding first sub-frames provide so-called multirate frames. Then, when transmitting said multirate frames over the High Speed packet switching network, dropping discardable tagged data enables solution network congestion situations in any network node and at random with no significant disturbing effect over the voice communication operation.

Abstract: A method and apparatus for discriminating between voice and voiceband data (fax/modem data) in an input signal from a voiceband channel, which is available by blocks (packets) of samples. Said discrimination is based upon the computation of two characteristics of the input signal: an autocorrelation function and a power variation function, the combination of which provides a discrimination factor which is highly accurate while requiring a low computing power.

Abstract: This invention deals with a method and system for dynamically adjusting the communication bandwidth assigned to an audio channel connection in a high speed digital network. More particularly, the invention is made to track the activity of a voice assigned connection (e.g. a PBX or PABX entry to the network), define a so-called activity bit for each block of audio channel signal and then dynamically adjust the assigned network communication bandwidth accordingly. Adjustment of the communication bandwidth is accomplished by integrating the audio channel activity bits through a predefined integration function, the result of which is then compared against predefined threshold values in order to determine an appropriate bandwidth setting for the audio channel.

Abstract: A process for computing the coefficients C(i) of an adaptive filter (206) used in an echo-cancellation structure for a telecommunication apparatus. The process is based on the Least Mean Squared (L.M.S.) or gradient algorithm for computing the coefficients of the filter in accordance with the formula: ##EQU1## where e(i) is the estimation error and .alpha. is the step size used for performing an adjustement of the convergence of the filtering process. The process uses two different estimations of the power of the analog signal, a former short-term estimation and a latter long-term estimation in order to derive the appropriate value of the stepsize .alpha. which is used for computing the new coefficients. In the preferred embodiment the value of .alpha. is determined by dividing a constant .alpha..sub.0 being slightly lower than the maximum value ensuring stability of the convergence process by the greater of the two different estimations of the power of the analog signals.

Abstract: A method and an apparatus for removing the silence from the digitalized voice signals conveyed through packets or cells switching networks. The silence samples are neither packetized nor sent over the network but are regenerated at the output of the network. The silence samples generated are white noise samples, where the level is adapted to the background noise of the silence samples received at the input node of the network. For long periods of silence, the white noise level is periodically refreshed to be adapted to the last silence samples received at the input node of the network. The method provides also a control of packet or cell loss. The method uses are not control packets; in the later case, it can be used for ATM networks with AAL1. The method is implemented as a program executed in a Digital Signal Processor located on adapter cards dedicated to voice processing in the network access nodes.

Abstract: A processing unit for performing convolution computation according to the HARVARD architecture which includes a first and second input register for receiving a first and second operand, a multiplier for multiplying the operand and a Arithmetic and Logic Unit (ALU) circuit. The unit further includes a coefficient storage memory which is used for loading at least one set of coefficients allowing the convolution computation. The memory storage is addressed either from an internal address generator or directly from the internal data bus thereby allowing the possibility to store either coefficients or data into the memory. The flexibility is still increased by the use of a particular set of multiplexing circuits allowing multiple configurations. An internal address generation circuit is used for performing a partial addressing of the set of coefficients thereby providing decimation capability.

Abstract: A method for detecting the presence of voice, single tone and dual tone signals compares a ratio r which equals the square of the maximum value of the received signal (A max) during a sampling period divided by a measure E of the energy to three different thresholds. If r is less than the first threshold (3), a single tone is indicated. If it is greater than the first but less than the second, the received signal level is compared to the third threshold (-43 dB) and receipt of a voice signal is indicted if the level of the received signal exceeds this threshold.

Abstract: A method for detecting the presence of voice, single tone and dual tone signals compares a ratio r which equals the square of the maximum value of the received signal (A max) during a sampling period divided by a measure E of the energy to three different thresholds. If r is less than the first threshold (3) a single tone is indicated. If it is greater than the first but less than the second (5.2) a dual tone is indicated. If it is greater than the second, the received signal level is compared to the third threshold (-43 dB) and receipt of a voice signal is indicated if the level of the received signal exceeds this threshold.

Abstract: A method for detecting the presence of single tone and dual tone signals compares a ratio r which equals the square of the maximum value of the received signal (A max) during a sampling period divided by a measure E of the energy to three different thresholds. If r is less than the first threshold (3) a single tone is indicated. If it is greater than the first but less than the second (5.2) a dual tone is indicated. When a single tone is indicated the received signal is subjected to a second order autoregressive process to determine the frequency of the single tone. If a dual tone is indicated the received signal is subjected to a fourth order autoregressive process to determine the frequencies of the dual tones.

Abstract: A Decimation filter for converting a train of sigma-delta pulses S(i) in synchronism with a sigma-delta clock (fs) into a train of Pulse Coded Modulation (PCM) samples in accordance with the formula ##EQU1## where Cn is the sequence of the coefficients of the decimation filter which corresponds to a determined decimation factor, and the PCM samples being processed by a Digital Signal Processor (DSP). The decimation filter includes a device for storing a digital value representative of the DC component introduced during the sigma-delta coding process, with the digital value being computing by the DSP processor during an initialization phase. The decimation filter further includes a device operating after the latter initialization phase for subtracting the stored digital value from each of the PCM samples so that the resulting sequence of PCM samples appears free of any DC component introduced during the sigma-delta coding.

Abstract: Adaptive equalization system for allowing the equalization of a base-band line of a DCE, includes an adaptive filter for adjusting its coefficients in accordance with an adaptive algorithm. The equalizer includes controls to work during a preliminary period, in an adaptive or non-adaptive mode according to the convergence of the recursive algorithm process. The algorithm is triggered depending on whether the equalized signal belongs to one of several predefined intervals of convergence. After this preliminary period, when the mean square of the residual error is considered small enough to ensure the convergence of the adaptive process, the algorithm is computed on a continuous mode.

Abstract: A decimation filter for converting a received train of sigma-delta pulses in synchronism with a sigma-delta clock (fs) into a train of Pulse Code Modulation (PCM) samples having a PCM clock in accordance with the formula ##EQU1## includes a computer for computing one PCM sample from a sequence of sigma-delta samples in synchronism with the PCM clock and also a comparison circuit for determining whether phase correction of the PCM clock is necessary to lock the generation of the PCM samples on the sigma-delta clock extracted from the received sigma-delta signal, the decimation filter including shifters which shift the computation process at least one sigma-delta clock pulse in order to provide phase control in the generation of the PCM samples.

Abstract: A decimation filter for converting a train of sigma-delta pulses S(i) in synchronism with a sigma-delta clock (fs) into a train of PCM samples which includes counters (321, 331, 341) driven by the sigma-delta clock (fs) and which is continuously incremented by one during N sigma-delta clock pulses, then decremented by two during N following sigma-delta clock pulses and then incremented again by one during N following sigma-delta clock pulses in order to provide a sequence of incrementation parameter DELTA(n). The decimation filter further includes storages (320, 330, 340) for storing the value of the coefficient C(n) corresponding to the decimation filter transfer function, and incrementers (327, 337, 347) driven by the sigma-delta clock fs for incrementing the storages with the incrementation parameter DELTA(n).

Abstract: An adaptive equalization system for allowing the equalization of a base-band line of a DCE within a predetermined range, includes an adaptive equalizer for continuously adapting its coefficients in accordance with a predetermined adaptive algorithm. The equalizer includes storage for a plurality of sets of initial coefficients for the equalization process corresponding to a plurality of telecommunication line characteristics and circuits for estimating the energy of the received signal. From the estimation of the energy of the signal on the line, there is derived one set among the plurality of sets of initial coefficients which are then used for setting the equalization before initiating the convergence process. An efficient and very simple equalization process is therefore provided which is ensured to converge whatever the characteristics of the line within the considered range.

Abstract: Sigma-delta converter for converting an analog input signal into a sigma-delta code. The converter includes a threshold device (222) for generating an output and feedback signal, a filter receiving said analog input signal and said feedback signal from at least one feedback loop. The sigma-delta converter further includes circuits (221, 222) located in said feedback loop for performing a return-to-zero of the sigma-delta code generated by said threshold device at every period of the sigma delta clock, whereby said sigma-delta converter is insensitive to the asymmetry of the rise and fall time of the threshold device. This results in an increase of the signal-to-noise ratio and linearity of the converter, allowing the manufacture of a sigma-delta convertor with discrete components without requiring the development of an integrated circuit using switched capacitor technology.

Abstract: A sigma-delta converter including a switching component controlled by a first clock having determined transitions for generating a train of sigma-delta code pulses corresponding to an analog input value. The sigma-delta includes circuits for generating a second clock of a same frequency as the first clock and having a negative transition followed after a defined period of time (d2) by a positive transition. The determined transitions of the first clock controlling the switching element occur during said defined period of time. There is also included a circuit controlled by the sigma-delta code pulse train and said second clock for generating a train of sigma-delta pulses insensitive to the mismatch of the rise and fall times of the switching element thereby improving the linearity and the signal-to-noise ratio of the converter.