Patents by Inventor Gi-Jung Kim
Gi-Jung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180138155Abstract: A semiconductor package and a method of manufacturing a semiconductor package.Type: ApplicationFiled: January 15, 2018Publication date: May 17, 2018Inventors: Jin Seong Kim, Edwin J. Adlam, Ludovico E. Bancod, Gi Jung Kim, Robert Lanzone, Jae Ung Lee, Yung Woo Lee, Mi Kyeong Choi
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Patent number: 9219656Abstract: Provided are approaches for remote managing comprising at least one or more agents being resident in at least one or more management terminals connected to each other through a network and controlling the corresponding management terminals; and a management server transmitting to the agents a request for a service for managing the management terminals, where the management server transmits the request to the agent through a control channel. An independent control channel is formed between a management server and a management device separately from an ordinary communication channel and, in case the management device is required to perform a server role for a particular service, makes the corresponding management device require a request related to the service through a control channel and thus, the server role is assigned to the management server at the time of carrying out a service.Type: GrantFiled: March 25, 2013Date of Patent: December 22, 2015Assignee: LG CNS CO., LTD.Inventors: Gi Jung Kim, Jae Young Park, Ji Seong Song
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Patent number: 9035309Abstract: A three-dimensional (3D) CMOS image sensor (CIS) that sufficiently absorbs incident infrared-rays (IRs) and includes an infrared-ray (IR) receiving unit formed in a thin epitaxial film, thereby being easily manufactured using a conventional CIS process, a sensor system including the 3D CIS, and a method of manufacturing the 3D CIS, the 3D CIS including an IR receiving part absorbing IRs incident thereto by repetitive reflection to produce electron-hole pairs (EHPs); and an electrode part formed on the IR receiving part and collecting electrons produced by applying a predetermined voltage thereto.Type: GrantFiled: January 5, 2011Date of Patent: May 19, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Young-soo Park, Won-joo Kim, Kyoo-chul Cho, Gi-jung Kim, Sam-jong Choi
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Publication number: 20140067906Abstract: Provided are approaches for remote managing comprising at least one or more agents being resident in at least one or more management terminals connected to each other through a network and controlling the corresponding management terminals; and a management server transmitting to the agents a request for a service for managing the management terminals, where the management server transmits the request to the agent through a control channel. An independent control channel is formed between a management server and a management device separately from an ordinary communication channel and, in case the management device is required to perform a server role for a particular service, makes the corresponding management device require a request related to the service through a control channel and thus, the server role is assigned to the management server at the time of carrying out a service.Type: ApplicationFiled: March 25, 2013Publication date: March 6, 2014Inventors: Gi Jung Kim, Jae Young Park, Ji Seong Song
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Publication number: 20130262557Abstract: Disclosed herein is a city facility managing server and system. The city facility managing server is connected to a plurality of agents, each of which manages at least one city facility according to event processing scripts. The city facility managing server includes a schedule database, a schedule register, and a scheduler. The schedule database stores schedules, each including a specific event processing script for controlling at least one specific city facility. The schedule register registers the schedules in the schedule database. The scheduler continuously reads the stored schedules, registers the schedules in an event queue, reads a schedule corresponding to a current time from the schedule event queue, and sends the read schedule to at least one corresponding agent, thereby allowing the at least one corresponding agent to control a corresponding city facility according to a corresponding event processing script.Type: ApplicationFiled: September 28, 2012Publication date: October 3, 2013Applicant: LG CNS CO., LTDInventors: Gi Jung KIM, Ji Seong SONG, Jae Young PARK
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Publication number: 20130029143Abstract: The present invention relates to a multilayer sheet for insert molding, in which a first thermosetting transparent resin layer protects the surface of the sheet, and a second thermoplastic transparent resin layer maintains moldability. The multilayer sheet may reduce gloss variation on the surface layer caused by change in surface microstructure of a base sheet in the multilayer sheet, which can occur during molding, and exhibits excellent scratch and abrasion resistance.Type: ApplicationFiled: April 8, 2011Publication date: January 31, 2013Applicant: LG HAUSYS, LTD.Inventors: Hyung-Gon Kim, Dong-Gon Kim, Min-Ho Lee, Gi-Jung Kim
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Patent number: 8293613Abstract: An embodiment of a semiconductor device includes a semiconductor substrate, a first insulating layer formed over the semiconductor substrate, and a first semiconductor layer formed over the first insulation layer. At least one gettering region is formed in at least one of the first insulating layer and the first semiconductor layer. The gettering region includes a plurality of gettering sites, and at least one gettering site includes one of a precipitate, a dispersoid, an interface with the dispersoid, a stacking fault and a dislocation.Type: GrantFiled: November 29, 2010Date of Patent: October 23, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Soo Park, Young-Nam Kim, Young-Sam Lim, Gi-Jung Kim, Pil-Kyu Kang
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Patent number: 8143142Abstract: A method of fabricating an epi-wafer includes providing a wafer including boron by cutting a single crystal silicon ingot, growing an insulating layer on one surface of the wafer, performing thermal treatment of the wafer, removing the insulating layer formed on one surface of the wafer, mirror-surface-grinding one surface of the wafer, and growing an epitaxial layer on one surface of the wafer and forming a high-density boron layer within the wafer that corresponds to the interface between the wafer and the epitaxial layer.Type: GrantFiled: March 15, 2010Date of Patent: March 27, 2012Assignee: SAMSUNG Electronics Co., Ltd.Inventors: Young-Soo Park, Gi-Jung Kim, Won-Je Park, Jae-Sik Bae
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Publication number: 20110193940Abstract: A three-dimensional (3D) CMOS image sensor (CIS) that sufficiently absorbs incident infrared-rays (IRs) and includes an infrared-ray (IR) receiving unit formed in a thin epitaxial film, thereby being easily manufactured using a conventional CIS process, a sensor system including the 3D CIS, and a method of manufacturing the 3D CIS, the 3D CIS including an IR receiving part absorbing IRs incident thereto by repetitive reflection to produce electron-hole pairs (EHPs); and an electrode part formed on the IR receiving part and collecting electrons produced by applying a predetermined voltage thereto.Type: ApplicationFiled: January 5, 2011Publication date: August 11, 2011Inventors: Young-soo Park, Won-joo Kim, Kyoo-chul Cho, Gi-jung Kim, Sam-jong Choi
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Publication number: 20110076838Abstract: An embodiment of a semiconductor device includes a semiconductor substrate, a first insulating layer formed over the semiconductor substrate, and a first semiconductor layer formed over the first insulation layer. At least one gettering region is formed in at least one of the first insulating layer and the first semiconductor layer. The gettering region includes a plurality of gettering sites, and at least one gettering site includes one of a precipitate, a dispersoid, an interface with the dispersoid, a stacking fault and a dislocation.Type: ApplicationFiled: November 29, 2010Publication date: March 31, 2011Inventors: Young-Soo Park, Young-Nam Kim, Young-Sam Lim, Gi-Jung Kim, Pil-Kyu Kang
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Patent number: 7815496Abstract: The surface(s) of a polishing pad for polishing an object has a first portion including hydrophilic material and a second portion including hydrophobic material. The first portion of the polishing surface is located in a first region of the polishing pad and the second portion of the polishing surface is located in a second region of the polishing pad juxtaposed with the first region in the radial direction of the pad. The hydrophilic material may be a polymer resin that contains hydrophilic functional groups having OH and/or ?O at bonding sites of the polymer. The hydrophobic material may be a polymer resin that contains hydrophobic functional groups having H and/or F at bonding sites of the polymer. The polishing pad is manufactured by extruding respective lines of the hydrophilic and hydrophobic materials. The extruders and a backing are moved relative to each other such that the lines form concentric rings of the hydrophilic and hydrophobic materials.Type: GrantFiled: February 15, 2007Date of Patent: October 19, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Sam Lim, Young-Nam Kim, Gi-Jung Kim
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Publication number: 20100233869Abstract: A method of fabricating an epi-wafer includes providing a wafer including boron by cutting a single crystal silicon ingot, growing an insulating layer on one surface of the wafer, performing thermal treatment of the wafer, removing the insulating layer formed on one surface of the wafer, mirror-surface-grinding one surface of the wafer, and growing an epitaxial layer on one surface of the wafer and forming a high-density boron layer within the wafer that corresponds to the interface between the wafer and the epitaxial layer.Type: ApplicationFiled: March 15, 2010Publication date: September 16, 2010Applicant: Samsung Electronics Co., Ltd.Inventors: Young-Soo PARK, Gi-Jung KIM, Won-Je PARK, Jae-Sik BAE
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Publication number: 20080224269Abstract: An embodiment of a semiconductor device includes a semiconductor substrate, a first insulating layer formed over the semiconductor substrate, and a first semiconductor layer formed over the first insulation layer. At least one gettering region is formed in at least one of the first insulating layer and the first semiconductor layer. The gettering region includes a plurality of gettering sites, and at least one gettering site includes one of a precipitate, a dispersoid, an interface with the dispersoid, a stacking fault and a dislocation.Type: ApplicationFiled: March 11, 2008Publication date: September 18, 2008Inventors: Young-Soo Park, Young-Nam Kim, Young-Sam Lim, Gi-Jung Kim, Pil-Kyu Kang
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Publication number: 20080213982Abstract: Provided is a method of fabricating a semiconductor wafer. The method includes preparing a substrate wafer having a non-single-crystalline thin layer; disposing at least one single crystalline pattern adjacent to the non-single-crystalline thin layer on the substrate wafer; and forming a material layer contacting the single crystalline pattern on the non-single-crystalline thin layer.Type: ApplicationFiled: February 28, 2008Publication date: September 4, 2008Inventors: Young-Soo Park, Young-Sam Lim, Young-Nam Kim, Dae-Lok Bae, Joon-Young Choi, Gi-Jung Kim
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Patent number: 7372150Abstract: A semiconductor wafer including an identification indication is provided. The wafer includes a convex edge with an upper surface area and a lower surface area. The identification indication is in a marking region which is disposed on a lower side surface of the convex edge. The lower side surface has a wide region where the marking region is located. This wide region has a width that is wider than an upper side surface of the wafer and thus makes a cross-section of a side of the wafer asymmetrical. With the present invention, the entire top surface of the semiconductor wafer can be utilized for a semiconductor chip region and prevents manufacturing problems associated with the uneven nature of the identification indication when the identification is located on the top surface of the wafer.Type: GrantFiled: October 10, 2003Date of Patent: May 13, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Sam-Jong Choi, Gi-Jung Kim, Kyoo-Chul Cho, Yeon-Sook Kim, Shin-Hyeok Han, Hoe-Sik Chung
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Publication number: 20070287280Abstract: A composition for removing a photoresist and a method of forming a bump electrode using the composition are provided. The composition includes an amine compound having a hydroxyl group, a polar organic solvent having a heteroatom, an alkylammonium hydroxide and water. The method of forming the bump electrode includes forming a conductive pattern on a substrate, forming a passivation layer on the substrate, the passivation layer having a first opening that partially exposes the conductive pattern, forming a photoresist pattern on the passivation layer, the photoresist pattern having a second opening that exposes the first opening forming a bump electrode that fills the first opening and the second opening, and removing the photoresist pattern from the substrate using a composition including an amine compound having a hydroxyl group, a polar organic solvent having a heteroatom, an alkylammonium hydroxide and water.Type: ApplicationFiled: June 12, 2007Publication date: December 13, 2007Inventors: Dong-Min Kang, Young-Sam Lim, Gi-Jung Kim, Young-Nam Kim, Yun-Deok Kang, Ji-Sung Lee, Ki-Hyeon Kim, Kyoung-Jin Choi
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Publication number: 20070197143Abstract: The surface(s) of a polishing pad for polishing an object has a first portion including hydrophilic material and a second portion including hydrophobic material. The first portion of the polishing surface is located in a first region of the polishing pad and the second portion of the polishing surface is located in a second region of the polishing pad juxtaposed with the first region in the radial direction of the pad. The hydrophilic material may be a polymer resin that contains hydrophilic functional groups having OH and/or ?O at bonding sites of the polymer. The hydrophobic material may be a polymer resin that contains hydrophobic functional groups having H and/or F at bonding sites of the polymer. The polishing pad is manufactured by extruding respective lines of the hydrophilic and hydrophobic materials. The extruders and a backing are moved relative to each other such that the lines form concentric rings of the hydrophilic and hydrophobic materials.Type: ApplicationFiled: February 15, 2007Publication date: August 23, 2007Inventors: Young-Sam Lim, Young-Nam Kim, Gi-Jung Kim
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Patent number: 7258931Abstract: Semiconductor wafers utilize asymmetric edge profiles (EP) to facilitate higher yield semiconductor device processing. These edge profiles are configured to reduce the volume of thin film residues that may form on a top surface of a semiconductor wafer at locations adjacent a peripheral edge thereof. These edges profiles are also configured to inhibit redeposition of residue particulates on the top surfaces of the wafers during semiconductor processing steps. Such steps may include surface cleaning and rinsing steps that may include passing a cleaning or rinsing solution across a wafer or batch of wafers that are held by a cartridge and submerged in the solution.Type: GrantFiled: June 23, 2003Date of Patent: August 21, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Gi-Jung Kim, Woo-Serk Kim, Sang-Mun Chon, Tae-Yeol Heo
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Publication number: 20060216942Abstract: A wafer carrier is provided. The wafer carrier includes a storage holding member for storing a plurality of wafers and includes a plurality of open portions. The wafer carrier further includes a front fixing plate and a rear fixing plate disposed at a front and a rear end of the storage holding member, respectively. The front and rear fixing plates each face a side of at least one of the plurality of wafers. Moreover, left and right edges of the plurality of wafers stored in the storage holding member are exposed by the plurality of open portions.Type: ApplicationFiled: March 10, 2006Publication date: September 28, 2006Inventors: Gi-Jung Kim, Sang-Mun Chon, Young-Nam Kim, Dae-Won Kang, Young-Sam Lim
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Patent number: 6919214Abstract: An apparatus for analyzing a substrate employing a copper decoration includes a bath having at least two receiving containers for receiving electrolytes, slots formed at insides of the receiving containers for receiving substrates to be analyzed in a direction that is normal to a bottom face of the bath, lower copper plates provided in the receiving containers, the lower copper plates making contact with entire rear faces of the substrates received in the receiving containers, upper copper plates provided in the receiving containers, each of the upper copper plates corresponding to a respective one of the lower copper plates, and separated from front faces of the substrates, and a power source connected to the upper copper plates and the lower copper plates for providing voltages to the same. A plurality of substrates may be simultaneously analyzed using one apparatus thereby greatly reducing an amount of time required for the analysis.Type: GrantFiled: October 21, 2003Date of Patent: July 19, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: Gi-Jung Kim, Kyoo-Chul Cho, Tae-Yeol Heo, Sook-Hyun Park