Abstract: A phase current estimator for a switching power converter includes analog circuitry for generating a phase current estimate error by comparing a phase current of the switching power converter to an analog representation of an estimate of the phase current. The phase current estimator further includes digital circuitry for revising the phase current estimate based on the phase current estimate error and a plurality of parameters associated with operation of the switching power converter. An estimator fault detection unit is provided for determining whether a difference between the phase current and estimate exceeds a threshold for indicating substandard phase current estimation.

Abstract: A semiconductor device includes a main transistor and a sense transistor. The main transistor is disposed in a semiconductor body and includes a plurality of sections which are individually controllable via separate gate electrodes disposed above the semiconductor body. The sense transistor is disposed in the same semiconductor body as the main transistor and has the same number of individually controllable sections as the main transistor. Each individually controllable section of the sense transistor is configured to mirror current flowing through one of the individually controllable sections of the main transistor and is connected to the same gate electrode as that individually controllable section of the main transistor. An electronic circuit that includes the semiconductor device and a current sense circuit that outputs a current sense signal representing the current mirrored by the sense transistor is also provided.

Abstract: A switching regulator includes a multiphase converter which includes a plurality of main phases configured to covert a power supply voltage to a lower voltage for application to an electronic device at different load conditions. The switching regulator also includes an auxiliary phase configured to operate in a pulse frequency modulation mode during a light load condition so that power is supplied to the electronic device by at least the auxiliary phase during the light load condition.

Abstract: A switching regulator includes an output phase having a high-side transistor and a low-side transistor operable to switch on and off at different periods responsive to a pulse width modulation (PWM) signal applied to the output phase, each cycle of the PWM signal having an on-portion and an off-portion. The switching regulator further includes a current sense circuit operable to sense the current of the low-side transistor, an analog-to-digital converter operable to sample the sensed low-side transistor current during the off-portion for each PWM cycle and a current estimator operable to estimate a cycle average current for the present PWM cycle based on the low-side transistor current sampled during the off-portion for the immediately preceding PWM cycle and a pulse width estimate for the on-portion for the present PWM cycle.

Abstract: A power converter with an isolated topology may include a power transistor, a sense transistor, and a read-out circuit. The sense transistor may be arranged in a current mirror configuration with the power transistor such that the gate terminal of the sense transistor is coupled to the gate terminal of the power transistor and the first drain/source terminal of the sense transistor is coupled to the first drain/source terminal of the power transistor. The read-out circuit may be coupled to the second drain/source terminal of the power transistor and the second drain source/terminal of the sense transistor. The read-out circuit may be arranged to cause a voltage at the second drain/source terminal of the sense transistor to be substantially the same as a voltage at the second drain/source terminal of the power transistor.

Abstract: A multiphase switching regulator includes a power stage with at least a first phase and a second phase for supplying power to a load through inductors coupling the phases to the load. The multiphase switching regulator is operated by switching the first phase at a higher switching frequency than the second phase via pulse width modulation (PWM) signals provided to the phases. A phase-specific target current is generated for each phase at the switching frequency for that phase based on the difference between an output voltage of the power stage and a reference voltage. The current in the inductors coupling the phases to the load is sensed, and a duty cycle of the PWM signal provided to each phase is adjusted based on the phase-specific target current and sensed inductor current for that phase.

Abstract: A power stage of a voltage regulator includes a first switch for connecting a load to a supply voltage in a first switching state of the power stage, a second switch for connecting the load to ground in a second switching state of the power stage and driver circuitry for setting the power stage in the first switching state, the second switching state or a non-switching state in which both switches are off responsive to a switching control signal received by the power stage. A power management unit moves the power stage from a nominal power mode to a first low power mode if the power stage is in the non-switching state for a predetermined time period.

Abstract: In one example, a method includes receiving a first differential signal including a first voltage signal and a second voltage signal, wherein the first differential signal includes a first common mode voltage; receiving a second common mode voltage. The method further includes determining, by a circuit, a second differential signal including a third voltage signal and a fourth voltage signal, wherein a difference between the third voltage signal and the fourth voltage signal is based on a difference between the first voltage signal and the second voltage signal, wherein the second differential signal includes the second common mode voltage. The method further includes outputting, substantially continuously, the second differential signal.

Abstract: A phase current estimator for a switching power converter includes analog circuitry for generating a phase current estimate error by comparing a phase current of the switching power converter to an analog representation of an estimate of the phase current. The phase current estimator further includes digital circuitry for revising the phase current estimate based on the phase current estimate error and a plurality of parameters associated with operation of the switching power converter. An estimator fault detection unit is provided for determining whether a difference between the phase current and estimate exceeds a threshold for indicating substandard phase current estimation.

Abstract: In accordance with an embodiment, switch driver includes a first switch driver configured to be coupled to a control node of a first switch, a second driver configured to be coupled to a control node of a second switch, and a first terminal and a second terminal configured to be couple to a boot capacitor. The first terminal is coupled between a boot input of the first switch driver and the second terminal is configured to be coupled to outputs of the first switch and the second switch. The switch driver further includes a voltage measurement circuit coupled to the first terminal and the second terminal, and a control circuit configured to activate the second switch driver when the voltage measurement circuit indicates that a voltage across boot capacitor is below a first threshold.

Abstract: A switching regulator includes a multiphase converter which includes a plurality of main phases configured to covert a power supply voltage to a lower voltage for application to an electronic device at different load conditions. The switching regulator also includes an auxiliary phase configured to operate in a pulse frequency modulation mode during a light load condition so that power is supplied to the electronic device by at least the auxiliary phase during the light load condition.

Abstract: A switching regulator includes a multiphase converter which includes a plurality of main phases configured to covert a power supply voltage to a lower voltage for application to an electronic device at different load conditions. The switching regulator also includes an auxiliary phase configured to operate in a pulse frequency modulation mode during a light load condition so that power is supplied to the electronic device by at least the auxiliary phase during the light load condition.

Abstract: An apparatus and method of generating a drive signal for a switch in a switching converter having input terminals for applying an input voltage, output terminals for providing an output signal, and at least one inductive storage element coupled to the switch. The method includes sampling the output signal to provide a sampled output signal, and generating a pulsewidth modulated drive signal having a duty cycle that is dependent on the sampled output signal, wherein the output voltage is sampled at sampling times that are dependent on the duty cycle.

Abstract: A multiphase switching regulator includes a power stage with at least a first phase and a second phase for supplying power to a load through inductors coupling the phases to the load. The multiphase switching regulator is operated by switching the first phase at a higher switching frequency than the second phase via pulse width modulation (PWM) signals provided to the phases. A phase-specific target current is generated for each phase at the switching frequency for that phase based on the difference between an output voltage of the power stage and a reference voltage. The current in the inductors coupling the phases to the load is sensed, and a duty cycle of the PWM signal provided to each phase is adjusted based on the phase-specific target current and sensed inductor current for that phase.

Abstract: A switching regulator includes an output phase having a high-side transistor and a low-side transistor operable to switch on and off at different periods responsive to a pulse width modulation (PWM) signal applied to the output phase, each cycle of the PWM signal having an on-portion and an off-portion. The switching regulator further includes a current sense circuit operable to sense the current of the low-side transistor, an analog-to-digital converter operable to sample the sensed low-side transistor current during the off-portion for each PWM cycle and a current estimator operable to estimate a cycle average current for the present PWM cycle based on the low-side transistor current sampled during the off-portion for the immediately preceding PWM cycle and a pulse width estimate for the on-portion for the present PWM cycle.

Abstract: A switching regulator includes a multiphase converter which includes a plurality of main phases configured to covert a power supply voltage to a lower voltage for application to an electronic device at different load conditions. The switching regulator also includes an auxiliary phase configured to operate in a pulse frequency modulation mode during a light load condition so that power is supplied to the electronic device by at least the auxiliary phase during the light load condition.

Abstract: A system and method for statistics recording of power devices is disclosed. A power circuit includes a power device to provide a specified electrical power to a load and a host controller coupled to the power device. The host controller is configured to provide issue instructions to and retrieve status information from the power device. A communications and control interface (CCI) is coupled between the power device and the host controller. The CCI is configured to operate as a communications interface between the power device and the host controller and to retrieve and store status information from the power device. The CCI may be capable of performing statistical analysis on the status information to help reduce the amount of information exchanged between the host controller and the power device, thereby reducing bandwidth requirements.

Abstract: A switching converter according includes a control arrangement to furnish a control signal dependent on the output voltage, as well as a first and at least one second converter stage. Each converter includes an inductive storage element, a ramp signal generator to furnish a signal having a ramp slope, a pulse width modulator which receives the control signal and the ramplike signal and which furnishes a pulse width modulated signal, and a driver circuit which receives the pulse width modulated signal and the input voltage and which applies the input voltage to the inductive storage element depending on the pulse width modulated signal. The ramp slope of the ramplike signal of the at least one second converter stage is adjustable. The ramp signal generator of the second converter stage receives a calibration signal which depends on the inductance of the inductive storage element of the first converter stage.

Abstract: In a circuit, a high side driver control circuit outputs gating signals to a high side driver of a synchronous converter responsive to a pulse width modulated input signal. A synchronous rectifier driver circuit outputs a gating signal to a synchronous rectifier of the synchronous converter responsive to the pulse width modulated input signal. An inhibit circuit inhibits the gating signal to the synchronous rectifier upon detection of a zero crossing condition. A circuit detects the zero crossing condition respective to comparing a measured value to a nominal value adjusted by a delta value. A duty cycle observer circuit determines the average duty cycle of the pulse width modulated input signal and varies the reference value.

Abstract: An output ripple control circuit and method for a PWM system uses a hysteresis threshold to clamp the output ripple of the PWM system such that the output ripple will not vary with the dc level of the output voltage, and therefore the output ripple control may be combined into any main loop technologies.