Abstract: An oscillator circuit for producing a frequency signal has a resonator element, an amplifier circuit and a coupling apparatus. The coupling apparatus connects the amplifier circuit to the resonator element for the duration of a switching-on process in the oscillator circuit.

Abstract: One embodiment of the present invention relates to a communication system having a digital to analog converter, a first input, a summation component, a compensation filter, and a compensation unit. The converter is configured to receive a first signal. The first input is configured to receive a phase modulation signal. The compensation filter generates a filtered frequency deviation signal to mitigate frequency distortions, such as those from a digital controlled oscillator. The compensation unit includes one or more inputs and is configured to generate a correction signal according to the filtered frequency deviation signal and the first signal. The correction signal at least partially accounts for estimated distortions of the phase modulation signal from the amplitude modulation path and mitigates frequency induced distortions. The summation component is configured to receive the phase modulation signal and the correction signal and to generate a corrected phase modulation signal as a result.

Abstract: The disclosed polar modulation transmitter circuit is configured to generate an output signal having a transmission frequency that minimizes crosstalk effects between different transmission bands (e.g., Bluetooth, GSM, UMTS, etc.). In particular, a polar modulation transceiver circuit, having an amplitude modulated (AM) signal and a phase modulated (PM) signal, comprises a digitally controlled oscillator (DCO) configured to generate a DCO signal having a DCO frequency. The DCO signal is provided to one or more frequency dividers that are configured to selectively divide the DCO signal to generate various lower frequency signals, used to select a sampling rate for a DAC operating on the AM signal and an RF carrier signal frequency, which result in an output signal having a frequency that does not interfere with other RF systems on the same IC (e.g., that falls outside of the downlink frequency of other RF systems). Other systems and methods are also disclosed.

Abstract: A polar modulator for generating a polar-modulated signal based on amplitude information and phase information includes a phase-locked loop which is implemented to enable a setting of a frequency depending on a control value to obtain a phase-locked loop output signal. The polar modulator further includes a modulation means which is implemented to combine an amplitude modulation signal derived from the amplitude information with the phase-locked loop output signal to generate the polar-modulated signal. The polar modulator further includes a control value generator which is implemented to high-pass filter an amplitude signal derived from the amplitude information, to obtain a high-pass filtered amplitude signal, wherein the control value generator is implemented to combine the high-pass filtered amplitude signal with a phase signal based on the phase information to generate the control value signal representing the control value.

Abstract: The present invention relates to a communication system having a digital to analog converter, a first input, a summation component, and a compensation unit. The converter is configured to receive a first. The first input is configured to receive a phase modulation signal. The compensation unit includes one or more inputs and is configured to measure amplitude samples of the first signal at a first of the one or more inputs and to generate a correction signal according to the one or more inputs. The correction signal at least partially accounts for estimated distortions of the phase modulation signal from the amplitude modulation path. The summation component is configured to receive the phase modulation signal and the correction signal and to generate a corrected phase modulation signal as a result.

Abstract: One embodiment of the invention relates to a communication system having an amplitude modulation path, a frequency deviation component, a characterization component, a peak cancellation component and a compensation unit. The amplitude modulation path is configured to provide an amplitude modulation signal. The frequency deviation component is configured to generate a frequency deviation signal. The characterization component is configured to generate characterization coefficients according to the amplitude modulation signal and the frequency deviation signal. The peak cancellation component is configured to identify peaks according to the amplitude modulation signal and generate a peak cancellation signal to compensate for peak distortion by the identified peaks.

Abstract: One embodiment of the present invention relates to a communication system having a digital to analog converter, a first input, a summation component, a compensation filter, and a compensation unit. The converter is configured to receive a first signal. The first input is configured to receive a phase modulation signal. The compensation filter generates a filtered frequency deviation signal to mitigate frequency distortions, such as those from a digital controlled oscillator. The compensation unit includes one or more inputs and is configured to generate a correction signal according to the filtered frequency deviation signal and the first signal. The correction signal at least partially accounts for estimated distortions of the phase modulation signal from the amplitude modulation path and mitigates frequency induced distortions. The summation component is configured to receive the phase modulation signal and the correction signal and to generate a corrected phase modulation signal as a result.

Abstract: One embodiment of the present invention relates to a digital phase locked loop (ADPLL) configured to generate a plurality of time-aligned output clock signals having different frequency values. The ADPLL comprises a digital controlled oscillator configured to generate a variable clock signal that is separated into two signal paths operating according to two separate clock domains. A first signal path is configured to generate a feedback signal that synchronizes the variable clock signal with a reference signal. A second signal path comprises a clock divider circuit configured to synchronously divide the variable clock signal to automatically generate a plurality of time-aligned output clock signals having different frequencies.

Abstract: One embodiment of the present invention relates to a digital phase locked loop (ADPLL) configured to generate a plurality of time-aligned output clock signals having different frequency values. The ADPLL comprises a digital controlled oscillator configured to generate a variable clock signal that is separated into two signal paths operating according to two separate clock domains. A first signal path is configured to generate a feedback signal that synchronizes the variable clock signal with a reference signal. A second signal path comprises a clock divider circuit configured to synchronously divide the variable clock signal to automatically generate a plurality of time-aligned output clock signals having different frequencies.

Abstract: The invention relates to an integrated circuit in a mobile radio transceiver. This circuit includes a radio-frequency assembly for producing a mobile radio signal and a modulator for converting transmission data into an analogue, modulated transmission signal which is broadcast in a frequency band outside the mobile radio frequency range.

Abstract: A polar modulator for generating a polar-modulated signal based on amplitude information and phase information includes a phase-locked loop which is implemented to enable a setting of a frequency depending on a control value to obtain a phase-locked loop output signal. The polar modulator further includes a modulation means which is implemented to combine an amplitude modulation signal derived from the amplitude information with the phase-locked loop output signal to generate the polar-modulated signal. The polar modulator further includes a control value generator which is implemented to high-pass filter an amplitude signal derived from the amplitude information, to obtain a high-pass filtered amplitude signal, wherein the control value generator is implemented to combine the high-pass filtered amplitude signal with a phase signal based on the phase information to generate the control value signal representing the control value.

Abstract: A polar modulator for generating a polar-modulated signal based on amplitude information and phase information includes a phase-locked loop which is implemented to enable a setting of a frequency depending on a control value to obtain a phase-locked loop output signal. The polar modulator further includes a modulation means which is implemented to combine an amplitude modulation signal derived from the amplitude information with the phase-locked loop output signal to generate the polar-modulated signal. The polar modulator further includes a control value generator which is implemented to high-pass filter an amplitude signal derived from the amplitude information, to obtain a high-pass filtered amplitude signal, wherein the control value generator is implemented to combine the high-pass filtered amplitude signal with a phase signal based on the phase information to generate the control value signal representing the control value.

Abstract: A two-point polar modulator for generating a polar-modulated signal based on an amplitude information and a phase information includes a two-point modulation phase-locked loop which is implemented to enable a frequency setting depending on a first control value via a feedback path of the two-point modulation phase-locked loop and to enable a frequency setting depending on a second control value, directly, bypassing the feedback path, wherein the two-point modulation phase-locked loop is implemented to provide a phase-locked loop output signal depending on the two control values.

Abstract: Amplifier for an ultra-wideband (UWB) signal receiver having a signal input (15) for receiving an ultra-wideband signal which is sent by a transmitter (1) and which is transmitted in a sequence of transmission channels (K.sub.i) (which each have a particular frequency bandwidth) which has been agreed between the transmitter (1) and the receiver (4); a transistor (18) whose control connection is connected to the signal input (15); a resonant circuit (26, 30, 31) which is connected to the transistor (18) and whose resonant frequency can be set for the purpose of selecting the transmission channel (K.sub.i) in line with the agreed sequence of transmission channels; and having a signal output (29) for outputting the amplified ultra-wideband signal, the signal output being tapped off between the transistor (18) and the resonant circuit.

Abstract: The disclosed polar modulation transmitter circuit is configured to generate an output signal having a transmission frequency that minimizes crosstalk effects between different transmission bands (e.g., Bluetooth, GSM, UMTS, etc.). In particular, a polar modulation transceiver circuit, having an amplitude modulated (AM) signal and a phase modulated (PM) signal, comprises a digitally controlled oscillator (DCO) configured to generate a DCO signal having a DCO frequency. The DCO signal is provided to one or more frequency dividers that are configured to selectively divide the DCO signal to generate various lower frequency signals, used to select a sampling rate for a DAC operating on the AM signal and an RF carrier signal frequency, which result in an output signal having a frequency that does not interfere with other RF systems on the same IC (e.g., that falls outside of the downlink frequency of other RF systems). Other systems and methods are also disclosed.

Abstract: A circuit arrangement and method for power regulation and an amplifier arrangement for power regulation are described.

Abstract: Amplifier for an ultra-wideband (UWB) signal receiver having a signal input (15) for receiving an ultra-wideband signal which is sent by a transmitter (1) and which is transmitted in a sequence of transmission channels (Ki) (which each have a particular frequency bandwidth) which has been agreed between the transmitter (1) and the receiver (4); a transistor (18) whose control connection is connected to the signal input (15); a resonant circuit (26, 30, 31) which is connected to the transistor (18) and whose resonant frequency can be set for the purpose of selecting the transmission channel (Ki) in line with the agreed sequence of transmission channels; and having a signal output (29) for outputting the amplified ultra-wideband signal, the signal output being tapped off between the transistor (18) and the resonant circuit.

Abstract: An assembly includes a substrate, a chip mounted on the substrate, a voltage controlled oscillator circuit including an inductor and further circuit elements. The inductor is mounted on or in the substrate, and the further circuit elements are mounted on or in the chip. An assembly is disclosed that includes a substrate including a first metallization plane and a second metallization plane, a chip mounted on the substrate, and an inductor mounted on or in the substrate. The inductor includes a first inductor portion in the first metallization plane and a second inductor portion in the second metallization plane. An assembly is also disclosed including a substrate, a chip mounted onto the substrate, and a transformer formed at least in part on or in the substrate.

Abstract: An oscillator circuit for producing a frequency signal has a resonator element, an amplifier circuit and a coupling apparatus. The coupling apparatus connects the amplifier circuit to the resonator element for the duration of a switching-on process in the oscillator circuit.

Abstract: A circuit arrangement and method for power regulation and an amplifier arrangement for power regulation are described.